From: Michael Cheng <michael.cheng@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: michael.cheng@intel.com, lucas.demarchi@intel.com,
dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v10 0/6] Use drm_clflush* instead of clflush
Date: Thu, 10 Feb 2022 10:36:30 -0800 [thread overview]
Message-ID: <20220210183636.1187973-1-michael.cheng@intel.com> (raw)
This patch series re-work a few i915 functions to use drm_clflush_virt_range
instead of calling clflush or clflushopt directly. This will prevent errors
when building for non-x86 architectures.
v2: s/PAGE_SIZE/sizeof(value) for Re-work intel_write_status_page and added
more patches to convert additional clflush/clflushopt to use drm_clflush*.
(Michael Cheng)
v3: Drop invalidate_csb_entries and directly invoke drm_clflush_virt_ran
v4: Remove extra memory barriers
v5: s/cache_clflush_range/drm_clflush_virt_range
v6: Fix up "Drop invalidate_csb_entries" to use correct parameters. Also
added in arm64 support for drm_clflush_virt_range.
v7: Re-order patches, and use correct macro for dcache flush for arm64.
v8: Remove ifdef for asm/cacheflush.
v9: Rebased
v10: Replaced asm/cacheflush with linux/cacheflush
Michael Cheng (6):
drm: Add arch arm64 for drm_clflush_virt_range
drm/i915/gt: Re-work intel_write_status_page
drm/i915/gt: Drop invalidate_csb_entries
drm/i915/gt: Re-work reset_csb
drm/i915/: Re-work clflush_write32
drm/i915/gt: replace cache_clflush_range
drivers/gpu/drm/drm_cache.c | 6 ++++++
.../gpu/drm/i915/gem/i915_gem_execbuffer.c | 8 +++-----
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 12 +++++------
drivers/gpu/drm/i915/gt/intel_engine.h | 13 ++++--------
.../drm/i915/gt/intel_execlists_submission.c | 20 +++++++------------
drivers/gpu/drm/i915/gt/intel_gtt.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ppgtt.c | 2 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 2 +-
8 files changed, 29 insertions(+), 36 deletions(-)
--
2.25.1
next reply other threads:[~2022-02-10 18:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-10 18:36 Michael Cheng [this message]
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 1/6] drm: Add arch arm64 for drm_clflush_virt_range Michael Cheng
2022-02-22 21:49 ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 2/6] drm/i915/gt: Re-work intel_write_status_page Michael Cheng
2022-02-22 22:04 ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 3/6] drm/i915/gt: Drop invalidate_csb_entries Michael Cheng
2022-02-22 22:31 ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 4/6] drm/i915/gt: Re-work reset_csb Michael Cheng
2022-02-22 22:35 ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 5/6] drm/i915/: Re-work clflush_write32 Michael Cheng
2022-02-22 22:37 ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 6/6] drm/i915/gt: replace cache_clflush_range Michael Cheng
2022-02-22 22:40 ` Matt Roper
2022-02-10 19:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Use drm_clflush* instead of clflush (rev9) Patchwork
2022-02-10 19:08 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-10 19:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-10 23:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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