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From: Michael Cheng <michael.cheng@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: michael.cheng@intel.com, lucas.demarchi@intel.com,
	dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v10 5/6] drm/i915/: Re-work clflush_write32
Date: Thu, 10 Feb 2022 10:36:35 -0800	[thread overview]
Message-ID: <20220210183636.1187973-6-michael.cheng@intel.com> (raw)
In-Reply-To: <20220210183636.1187973-1-michael.cheng@intel.com>

Use drm_clflush_virt_range instead of clflushopt and remove the memory
barrier, since drm_clflush_virt_range takes care of that.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 498b458fd784..0854276ff7ba 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -1332,10 +1332,8 @@ static void *reloc_vaddr(struct i915_vma *vma,
 static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)
 {
 	if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) {
-		if (flushes & CLFLUSH_BEFORE) {
-			clflushopt(addr);
-			mb();
-		}
+		if (flushes & CLFLUSH_BEFORE)
+			drm_clflush_virt_range(addr, sizeof(addr));
 
 		*addr = value;
 
@@ -1347,7 +1345,7 @@ static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)
 		 * to ensure ordering of clflush wrt to the system.
 		 */
 		if (flushes & CLFLUSH_AFTER)
-			clflushopt(addr);
+			drm_clflush_virt_range(addr, sizeof(addr));
 	} else
 		*addr = value;
 }
-- 
2.25.1


  parent reply	other threads:[~2022-02-10 18:37 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-10 18:36 [Intel-gfx] [PATCH v10 0/6] Use drm_clflush* instead of clflush Michael Cheng
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 1/6] drm: Add arch arm64 for drm_clflush_virt_range Michael Cheng
2022-02-22 21:49   ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 2/6] drm/i915/gt: Re-work intel_write_status_page Michael Cheng
2022-02-22 22:04   ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 3/6] drm/i915/gt: Drop invalidate_csb_entries Michael Cheng
2022-02-22 22:31   ` Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 4/6] drm/i915/gt: Re-work reset_csb Michael Cheng
2022-02-22 22:35   ` Matt Roper
2022-02-10 18:36 ` Michael Cheng [this message]
2022-02-22 22:37   ` [Intel-gfx] [PATCH v10 5/6] drm/i915/: Re-work clflush_write32 Matt Roper
2022-02-10 18:36 ` [Intel-gfx] [PATCH v10 6/6] drm/i915/gt: replace cache_clflush_range Michael Cheng
2022-02-22 22:40   ` Matt Roper
2022-02-10 19:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Use drm_clflush* instead of clflush (rev9) Patchwork
2022-02-10 19:08 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-02-10 19:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-10 23:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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