From: "Lisovskiy, Stanislav" <stanislav.lisovskiy@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 5/8] drm/i915: Rename pre-icl SAGV enable/disable functions
Date: Wed, 16 Mar 2022 19:57:07 +0200 [thread overview]
Message-ID: <20220316175707.GD21723@intel.com> (raw)
In-Reply-To: <20220309164948.10671-6-ville.syrjala@linux.intel.com>
On Wed, Mar 09, 2022 at 06:49:45PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Give the pre-icl SAGV control functions a skl_ prefix instead
> of the intel_ prefix to make it a bit more clear that they
> are not some kind of universal things that can be called on
> any platform. Also make the functions void since we never
> use the return value anyway.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 32 ++++++++++++++------------------
> 1 file changed, 14 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 166246fa27e4..bd936d4c5b0f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -57,7 +57,7 @@
> #include "vlv_sideband.h"
> #include "../../../platform/x86/intel_ips.h"
>
> -static int intel_disable_sagv(struct drm_i915_private *dev_priv);
> +static void skl_sagv_disable(struct drm_i915_private *dev_priv);
>
> struct drm_i915_clock_gating_funcs {
> void (*init_clock_gating)(struct drm_i915_private *i915);
> @@ -3707,7 +3707,7 @@ static void intel_sagv_init(struct drm_i915_private *i915)
> * For icl+ this was already determined by intel_bw_init_hw().
> */
> if (DISPLAY_VER(i915) < 11)
> - intel_disable_sagv(i915);
> + skl_sagv_disable(i915);
>
> drm_WARN_ON(&i915->drm, i915->sagv_status == I915_SAGV_UNKNOWN);
>
> @@ -3737,16 +3737,15 @@ static void intel_sagv_init(struct drm_i915_private *i915)
> * - All planes can enable watermarks for latencies >= SAGV engine block time
> * - We're not using an interlaced display configuration
> */
> -static int
> -intel_enable_sagv(struct drm_i915_private *dev_priv)
> +static void skl_sagv_enable(struct drm_i915_private *dev_priv)
> {
> int ret;
>
> if (!intel_has_sagv(dev_priv))
> - return 0;
> + return;
>
> if (dev_priv->sagv_status == I915_SAGV_ENABLED)
> - return 0;
> + return;
>
> drm_dbg_kms(&dev_priv->drm, "Enabling SAGV\n");
> ret = snb_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL,
> @@ -3761,26 +3760,24 @@ intel_enable_sagv(struct drm_i915_private *dev_priv)
> if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
> drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n");
> dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
> - return 0;
> + return;
> } else if (ret < 0) {
> drm_err(&dev_priv->drm, "Failed to enable SAGV\n");
> - return ret;
> + return;
> }
>
> dev_priv->sagv_status = I915_SAGV_ENABLED;
> - return 0;
> }
>
> -static int
> -intel_disable_sagv(struct drm_i915_private *dev_priv)
> +static void skl_sagv_disable(struct drm_i915_private *dev_priv)
> {
> int ret;
>
> if (!intel_has_sagv(dev_priv))
> - return 0;
> + return;
>
> if (dev_priv->sagv_status == I915_SAGV_DISABLED)
> - return 0;
> + return;
>
> drm_dbg_kms(&dev_priv->drm, "Disabling SAGV\n");
> /* bspec says to keep retrying for at least 1 ms */
> @@ -3795,14 +3792,13 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
> if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
> drm_dbg(&dev_priv->drm, "No SAGV found on system, ignoring\n");
> dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
> - return 0;
> + return;
> } else if (ret < 0) {
> drm_err(&dev_priv->drm, "Failed to disable SAGV (%d)\n", ret);
> - return ret;
> + return;
> }
>
> dev_priv->sagv_status = I915_SAGV_DISABLED;
> - return 0;
> }
>
> static void skl_sagv_pre_plane_update(struct intel_atomic_state *state)
> @@ -3815,7 +3811,7 @@ static void skl_sagv_pre_plane_update(struct intel_atomic_state *state)
> return;
>
> if (!intel_can_enable_sagv(i915, new_bw_state))
> - intel_disable_sagv(i915);
> + skl_sagv_disable(i915);
> }
>
> static void skl_sagv_post_plane_update(struct intel_atomic_state *state)
> @@ -3828,7 +3824,7 @@ static void skl_sagv_post_plane_update(struct intel_atomic_state *state)
> return;
>
> if (intel_can_enable_sagv(i915, new_bw_state))
> - intel_enable_sagv(i915);
> + skl_sagv_enable(i915);
> }
>
> static void icl_sagv_pre_plane_update(struct intel_atomic_state *state)
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-03-16 17:56 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-09 16:49 [Intel-gfx] [PATCH v2 0/8] drm/i915: SAGV block time fixes Ville Syrjala
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 1/8] drm/i915: Treat SAGV block time 0 as SAGV disabled Ville Syrjala
2022-03-09 19:29 ` Lisovskiy, Stanislav
2022-03-09 20:35 ` Ville Syrjälä
2022-03-16 17:55 ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 2/8] drm/i915: Rework SAGV block time probing Ville Syrjala
2022-03-16 17:55 ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 3/8] drm/i915: Probe whether SAGV works on pre-icl Ville Syrjala
2022-03-16 17:57 ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 4/8] drm/i915: Reject excessive SAGV block time Ville Syrjala
2022-03-16 17:58 ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 5/8] drm/i915: Rename pre-icl SAGV enable/disable functions Ville Syrjala
2022-03-16 17:57 ` Lisovskiy, Stanislav [this message]
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 6/8] drm/i915: Fix PSF GV point mask when SAGV is not possible Ville Syrjala
2022-03-09 18:59 ` Lisovskiy, Stanislav
2022-03-09 19:08 ` Ville Syrjälä
2022-03-09 19:34 ` Lisovskiy, Stanislav
2022-03-09 20:21 ` Ville Syrjälä
2022-03-16 18:01 ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 7/8] drm/i915: Unconfuses QGV vs. PSF point masks Ville Syrjala
2022-03-16 17:56 ` Lisovskiy, Stanislav
2022-03-09 16:49 ` [Intel-gfx] [PATCH v2 8/8] drm/i915: Rename QGV request/response bits Ville Syrjala
2022-03-16 17:57 ` Lisovskiy, Stanislav
2022-03-09 19:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: SAGV block time fixes (rev2) Patchwork
2022-03-09 20:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-10 5:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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