From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org, daniele.ceraolospurio@intel.com,
john.c.harrison@intel.com
Subject: [Intel-gfx] [PATCH 6/6] drm/i915/dg2: Enable Wa_22012727170/Wa_22012727685
Date: Fri, 15 Apr 2022 15:40:25 -0700 [thread overview]
Message-ID: <20220415224025.3693037-7-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20220415224025.3693037-1-umesh.nerlige.ramappa@intel.com>
From: John Harrison <John.C.Harrison@Intel.com>
The above two workaronuds regarding context isolation are implemented
by GuC. The KMD just needs to enable them.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 8 ++++++++
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 228070e31ef0..2c4ad4a65089 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -319,6 +319,14 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))
flags |= GUC_WA_RCS_RESET_BEFORE_RC6;
+ /*
+ * Wa_22012727170:dg2_g10[a0-c0), dg2_g11[a0..)
+ * Wa_22012727685:dg2_g11[a0..)
+ */
+ if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
+ IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_FOREVER))
+ flags |= GUC_WA_CONTEXT_ISOLATION;
+
return flags;
}
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index e389a3a041a2..42cb7a9a6199 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -101,6 +101,7 @@
#define GUC_WA_GAM_CREDITS BIT(10)
#define GUC_WA_DUAL_QUEUE BIT(11)
#define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13)
+#define GUC_WA_CONTEXT_ISOLATION BIT(15)
#define GUC_WA_PRE_PARSER BIT(14)
#define GUC_WA_HOLD_CCS_SWITCHOUT BIT(17)
#define GUC_WA_POLLCS BIT(18)
--
2.35.1
next prev parent reply other threads:[~2022-04-15 22:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-15 22:40 [Intel-gfx] [PATCH 0/6] Enable WAs related to DG2 Umesh Nerlige Ramappa
2022-04-15 22:40 ` [Intel-gfx] [PATCH 1/6] drm/i915: Add Wa_22011802037 force cs halt Umesh Nerlige Ramappa
2022-04-15 22:40 ` [Intel-gfx] [PATCH 2/6] drm/i915/guc: Enable Wa_22011802037 for gen12 GuC based platforms Umesh Nerlige Ramappa
2022-04-19 0:57 ` Ceraolo Spurio, Daniele
2022-04-15 22:40 ` [Intel-gfx] [PATCH 3/6] drm/i915/guc: Enable GuC based workarounds for DG2 Umesh Nerlige Ramappa
2022-04-18 22:37 ` Ceraolo Spurio, Daniele
2022-04-15 22:40 ` [Intel-gfx] [PATCH 4/6] drm/i915/guc: Apply Wa_16011777198 Umesh Nerlige Ramappa
2022-04-15 22:40 ` [Intel-gfx] [PATCH 5/6] drm/i915/dg2: Enable Wa_14014475959 - RCS / CCS context exit Umesh Nerlige Ramappa
2022-04-15 22:40 ` Umesh Nerlige Ramappa [this message]
2022-04-15 23:55 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable WAs related to DG2 Patchwork
2022-04-15 23:56 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-04-16 0:19 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-04-16 2:12 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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