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* [Intel-gfx] [PATCH 1/3] drm: Add infrastructure to allow seamless mode switches
@ 2022-04-21 19:22 José Roberto de Souza
  2022-04-21 19:22 ` [Intel-gfx] [PATCH 2/3] drm/i915/display: Replace crtc_state's has_drrs by drrs_downclock_mode José Roberto de Souza
                   ` (7 more replies)
  0 siblings, 8 replies; 14+ messages in thread
From: José Roberto de Souza @ 2022-04-21 19:22 UTC (permalink / raw)
  To: intel-gfx, dri-devel; +Cc: Sean Paul

Intel hardware supports change between modes with different refresh
rates without any glitches or visual artifacts, that feature is called
seamless DRRS.

So far i915 driver was automatically changing between preferred panel
mode and lower refresh rate mode based on idleness but ChromeOS
compositor team is requesting to be in control of the mode switch.
So for a certain types of content it can switch to mode with a lower
refresh rate without user noticing a thing and saving power.

This seamless mode switch will be triggered when user-space dispatch
a atomic commit with the new mode and clears the
DRM_MODE_ATOMIC_ALLOW_MODESET flag.

A driver that don't implement atomic_seamless_mode_switch_check
function will continue to fail in the atomic check phase with
"[CRTC:%d:%s] requires full modeset" debug message.
While a driver that implements it and support the seamless change
between old and new mode will return 0 otherwise it should return the
appropried errno.

So here adding basic drm infrastructure to that be supported by i915
and other drivers.

Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/drm_atomic.c              |  1 +
 drivers/gpu/drm/drm_atomic_helper.c       | 16 +++++++++++++++
 drivers/gpu/drm/drm_atomic_state_helper.c |  1 +
 include/drm/drm_crtc.h                    | 25 +++++++++++++++++++++++
 4 files changed, 43 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 58c0283fb6b0c..21525f9f4b4c1 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -437,6 +437,7 @@ static void drm_atomic_crtc_print_state(struct drm_printer *p,
 	drm_printf(p, "\tself_refresh_active=%d\n", state->self_refresh_active);
 	drm_printf(p, "\tplanes_changed=%d\n", state->planes_changed);
 	drm_printf(p, "\tmode_changed=%d\n", state->mode_changed);
+	drm_printf(p, "\tseamless_mode_changed=%d\n", state->seamless_mode_changed);
 	drm_printf(p, "\tactive_changed=%d\n", state->active_changed);
 	drm_printf(p, "\tconnectors_changed=%d\n", state->connectors_changed);
 	drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed);
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index 9603193d2fa13..e6f3a966f7b86 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -631,6 +631,22 @@ drm_atomic_helper_check_modeset(struct drm_device *dev,
 			drm_dbg_atomic(dev, "[CRTC:%d:%s] mode changed\n",
 				       crtc->base.id, crtc->name);
 			new_crtc_state->mode_changed = true;
+
+			if (!state->allow_modeset &&
+			    crtc->funcs->atomic_seamless_mode_switch_check) {
+				ret = crtc->funcs->atomic_seamless_mode_switch_check(state, crtc);
+				if (ret == -EOPNOTSUPP) {
+					drm_dbg_atomic(dev, "[CRTC:%d:%s] Seamless mode switch not supported\n",
+						       crtc->base.id, crtc->name);
+					return ret;
+				}
+
+				if (ret < 0)
+					return ret;
+
+				new_crtc_state->seamless_mode_changed = true;
+				new_crtc_state->mode_changed = false;
+			}
 		}
 
 		if (old_crtc_state->enable != new_crtc_state->enable) {
diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c
index 3b6d3bdbd0996..c093073ea6e11 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -142,6 +142,7 @@ void __drm_atomic_helper_crtc_duplicate_state(struct drm_crtc *crtc,
 	if (state->gamma_lut)
 		drm_property_blob_get(state->gamma_lut);
 	state->mode_changed = false;
+	state->seamless_mode_changed = false;
 	state->active_changed = false;
 	state->planes_changed = false;
 	state->connectors_changed = false;
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index a70baea0636ca..b7ce378d679d3 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -140,6 +140,16 @@ struct drm_crtc_state {
 	 */
 	bool mode_changed : 1;
 
+	/**
+	 * @seamless_mode_changed: @mode has been changed but user-space
+	 * is requesting to change to the new mode with a fastset and driver
+	 * supports this request.
+	 * To be used by drivers to steer the atomic commit control flow to
+	 * appropriate paths to change mode without any visual corruption.
+	 * Never set together with @mode_changed.
+	 */
+	bool seamless_mode_changed : 1;
+
 	/**
 	 * @active_changed: @active has been toggled. Used by the atomic
 	 * helpers and drivers to steer the atomic commit control flow. See also
@@ -939,6 +949,21 @@ struct drm_crtc_funcs {
 				     int *max_error,
 				     ktime_t *vblank_time,
 				     bool in_vblank_irq);
+
+	/**
+	 * @atomic_seamless_mode_switch_check
+	 *
+	 * Called when user-space wants to change mode without do a modeset.
+	 * Drivers can optionally support do a mode switch without any visual
+	 * corruption when changing between certain modes.
+	 *
+	 * Returns:
+	 * Zero if possible to seamless switch mode, -EOPNOTSUPP if not
+	 * supported seamless mode change or appropriate errno if an error
+	 * happened.
+	 */
+	int (*atomic_seamless_mode_switch_check)(struct drm_atomic_state *state,
+						 struct drm_crtc *crtc);
 };
 
 /**
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 1/3] drm/i915/display: Do not schedule DRRS work thread when it is not active
@ 2022-04-28 21:10 José Roberto de Souza
  2022-04-28 21:10 ` [Intel-gfx] [PATCH 3/3] drm/i915/display: Implement seamless mode switch José Roberto de Souza
  0 siblings, 1 reply; 14+ messages in thread
From: José Roberto de Souza @ 2022-04-28 21:10 UTC (permalink / raw)
  To: intel-gfx

Frontbuffer updates were scheduling the execution of DRRS work thread
even if DRRS is not active.
There was no issues with it because intel_drrs_downclock_work() checks
if DRRS is active but there is no reason to keep scheduling this work
thread and wasting CPU time.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_drrs.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 166caf293f7bc..04bc296761be0 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -236,6 +236,11 @@ static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv,
 		else
 			crtc->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;
 
+		if (!intel_drrs_is_active(crtc)) {
+			mutex_unlock(&crtc->drrs.mutex);
+			continue;
+		}
+
 		/* flush/invalidate means busy screen hence upclock */
 		intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
 
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-04-28 21:10 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-04-21 19:22 [Intel-gfx] [PATCH 1/3] drm: Add infrastructure to allow seamless mode switches José Roberto de Souza
2022-04-21 19:22 ` [Intel-gfx] [PATCH 2/3] drm/i915/display: Replace crtc_state's has_drrs by drrs_downclock_mode José Roberto de Souza
2022-04-25 11:55   ` Jani Nikula
2022-04-26 18:09     ` Souza, Jose
2022-04-21 19:22 ` [Intel-gfx] [PATCH 3/3] drm/i915/display: Implement seamless mode switch José Roberto de Souza
2022-04-22  0:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm: Add infrastructure to allow seamless mode switches Patchwork
2022-04-22  1:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-25 14:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm: Add infrastructure to allow seamless mode switches (rev2) Patchwork
2022-04-25 15:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-26 16:53 ` [Intel-gfx] [PATCH 1/3] drm: Add infrastructure to allow seamless mode switches Srinivas, Vidya
2022-04-26 18:08 ` Ville Syrjälä
2022-04-26 18:32   ` Souza, Jose
2022-04-26 18:44     ` Ville Syrjälä
  -- strict thread matches above, loose matches on Subject: below --
2022-04-28 21:10 [Intel-gfx] [PATCH 1/3] drm/i915/display: Do not schedule DRRS work thread when it is not active José Roberto de Souza
2022-04-28 21:10 ` [Intel-gfx] [PATCH 3/3] drm/i915/display: Implement seamless mode switch José Roberto de Souza

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