Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com
Subject: [Intel-gfx] [PATCH 3/7] drm/i915/dg2: DG2 MBD config
Date: Wed, 18 May 2022 18:37:12 +0530	[thread overview]
Message-ID: <20220518130716.10936-4-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20220518130716.10936-1-anshuman.gupta@intel.com>

Add DG2 Motherboard Down Config check support.

BSpec: 44477
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_opregion.c | 2 ++
 drivers/gpu/drm/i915/i915_drv.h               | 9 +++++++++
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index 3dcd54517b89..dec7628522c5 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -1271,6 +1271,8 @@ intel_opregion_vram_sr_required(struct drm_i915_private *i915)
 
 	if (IS_DG1(i915))
 		return intel_opregion_dg1_mbd_config(i915);
+	else if (IS_DG2_MBD(i915))
+		return true;
 
 	return false;
 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 10f273800645..c5ecc490dced 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1071,6 +1071,15 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 	IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G11)
 #define IS_DG2_G12(dev_priv) \
 	IS_SUBPLATFORM(dev_priv, INTEL_DG2, INTEL_SUBPLATFORM_G12)
+/*
+ * FIXME: Need to define a new SUBPLATFORM INTEL_SUBPLATFORM_DG2_MBD
+ * for PCI id range 5690..5695, but G10, G11 SUBPLATFROM conflicts
+ * with those pci id range.
+ */
+#define DG2_MBD_CONFIG_MASK	GENMASK(7, 4)
+#define DG2_MBD_CONFIG_VAL	FIELD_PREP(DG2_MBD_CONFIG_MASK, 9)
+#define IS_DG2_MBD(dev_priv) (IS_DG2(dev_priv) && \
+			      (INTEL_DEVID(dev_priv) & DG2_MBD_CONFIG_MASK) == DG2_MBD_CONFIG_VAL)
 #define IS_ADLS_RPLS(dev_priv) \
 	IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL)
 #define IS_ADLP_N(dev_priv) \
-- 
2.26.2


  parent reply	other threads:[~2022-05-18 13:07 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-18 13:07 [Intel-gfx] [PATCH 0/7] DG2 VRAM_SR Support Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 1/7] drm/i915/dgfx: OpRegion VRAM Self Refresh Support Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 2/7] drm/i915/dg1: OpRegion PCON DG1 MBD config support Anshuman Gupta
2022-05-18 13:07 ` Anshuman Gupta [this message]
2022-05-19  9:26   ` [Intel-gfx] [PATCH 3/7] drm/i915/dg2: DG2 MBD config Jani Nikula
2022-05-30  4:44     ` Gupta, Anshuman
2022-05-31 15:39       ` Matt Roper
2022-05-18 13:07 ` [Intel-gfx] [PATCH 4/7] drm/i915/dgfx: Add has_lmem_sr Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 5/7] drm/i915/pcode: DGFX PCODE MBOX headers Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 6/7] drm/i915/dgfx: Setup VRAM SR with D3COLD Anshuman Gupta
2022-05-18 13:07 ` [Intel-gfx] [PATCH 7/7] drm/i915/rpm: Enable D3Cold VRAM SR Support Anshuman Gupta
2022-05-18 14:15   ` Ville Syrjälä
2022-05-18 15:19     ` Gupta, Anshuman
2022-05-18 18:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DG2 VRAM_SR Support (rev2) Patchwork
2022-05-18 18:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-18 18:50 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220518130716.10936-4-anshuman.gupta@intel.com \
    --to=anshuman.gupta@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox