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From: Robert Beckett <bob.beckett@collabora.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	kernel@collabora.com, "Matthew Auld" <matthew.auld@intel.com>
Subject: [Intel-gfx] [PATCH v2 0/8] drm/i915: ttm for internal
Date: Wed,  8 Jun 2022 20:51:23 +0000	[thread overview]
Message-ID: <20220608205132.438596-1-bob.beckett@collabora.com> (raw)

This series refactors i915's internal buffer backend to use ttm.
It uses ttm's pool allocator to allocate volatile pages in place of the
old code which rolled its own via alloc_pages.
This is continuing progress to align all backends on using ttm.

v2:	- commit message improvements to add detail
	- fix i915_ttm_shrink to purge !is_shmem volatile buffers
	- limit ttm pool allocator to using dma32 on i965G[M]
	- fix mman selftest to always use smem buffers
	- create new internal memory region
	- make internal backend allocate from internal region
	- Fixed various issues with tests and i915 ttm usage as a result
	  of supporting regions other than lmem via ttm.

Robert Beckett (8):
  drm/i915/ttm: dont trample cache_level overrides during ttm move
  drm/i915: add gen6 ppgtt dummy creation function
  drm/i915: setup ggtt scratch page after memory regions
  drm/i915: allow volatile buffers to use ttm pool allocator
  drm/i915: limit ttm to dma32 for i965G[M]
  drm/i915/gem: further fix mman selftest
  drm/i915/ttm: trust snooping when gen 6+ when deciding default
    cache_level
  drm/i915: internal buffers use ttm backend

 drivers/gpu/drm/i915/gem/i915_gem_internal.c  | 187 +-----------------
 drivers/gpu/drm/i915/gem/i915_gem_internal.h  |   5 -
 drivers/gpu/drm/i915/gem/i915_gem_object.c    |   1 +
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c       |   8 +-
 drivers/gpu/drm/i915/gem/i915_gem_ttm.h       |   1 +
 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c  |  13 +-
 .../drm/i915/gem/selftests/i915_gem_mman.c    |  20 +-
 drivers/gpu/drm/i915/gt/gen6_ppgtt.c          |  43 +++-
 drivers/gpu/drm/i915/gt/intel_gt_gmch.c       |  20 +-
 drivers/gpu/drm/i915/gt/intel_gt_gmch.h       |   6 +
 drivers/gpu/drm/i915/i915_driver.c            |  16 +-
 drivers/gpu/drm/i915/i915_pci.c               |   4 +-
 drivers/gpu/drm/i915/intel_memory_region.c    |   8 +-
 drivers/gpu/drm/i915/intel_memory_region.h    |   2 +
 drivers/gpu/drm/i915/intel_region_ttm.c       |   7 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |   2 +-
 17 files changed, 123 insertions(+), 221 deletions(-)

-- 
2.25.1


             reply	other threads:[~2022-06-08 20:52 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-08 20:51 Robert Beckett [this message]
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 1/8] drm/i915/ttm: dont trample cache_level overrides during ttm move Robert Beckett
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 2/8] drm/i915: add gen6 ppgtt dummy creation function Robert Beckett
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 3/8] drm/i915: setup ggtt scratch page after memory regions Robert Beckett
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 4/8] drm/i915: allow volatile buffers to use ttm pool allocator Robert Beckett
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 5/8] drm/i915: limit ttm to dma32 for i965G[M] Robert Beckett
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 6/8] drm/i915/gem: further fix mman selftest Robert Beckett
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 7/8] drm/i915/ttm: trust snooping when gen 6+ when deciding default cache_level Robert Beckett
2022-06-08 20:51 ` [Intel-gfx] [PATCH v2 8/8] drm/i915: internal buffers use ttm backend Robert Beckett
2022-06-08 22:30 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: ttm for internal Patchwork
2022-06-09  1:08 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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