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* [Intel-gfx] [PATCH 0/2] drm/i915/psr: Disable PSR2 when SDP is sent on prior line
@ 2022-09-05 10:23 Jouni Högander
  2022-09-05 10:23 ` [Intel-gfx] [PATCH 1/2] drm/i915/psr: Equation changed for sending start/stop " Jouni Högander
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: Jouni Högander @ 2022-09-05 10:23 UTC (permalink / raw)
  To: intel-gfx

Selective update doesn't work if SU start address is 0 and start/end
SDP is configured to be sent prior to SU start/end lines. PSR2 has to
be disabled in this case for Alder Lake.

Additionally this patch set updates changed equation for sending
start/end SDP prior to the SU region start/end.

Cc: Mika Kahola <mika.kahola@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>

Jouni Högander (2):
  drm/i915/psr: Equation changed for sending start/stop on prior line
  drm/i915/psr: Disable PSR2 when SDP is sent on prior line

 drivers/gpu/drm/i915/display/intel_psr.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

-- 
2.34.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2022-09-13  9:14 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-09-05 10:23 [Intel-gfx] [PATCH 0/2] drm/i915/psr: Disable PSR2 when SDP is sent on prior line Jouni Högander
2022-09-05 10:23 ` [Intel-gfx] [PATCH 1/2] drm/i915/psr: Equation changed for sending start/stop " Jouni Högander
2022-09-06  9:15   ` Kahola, Mika
2022-09-05 10:23 ` [Intel-gfx] [PATCH 2/2] drm/i915/psr: Disable PSR2 when SDP is sent " Jouni Högander
2022-09-06  9:16   ` Kahola, Mika
2022-09-05 11:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-09-05 15:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-09-13  9:14 ` [Intel-gfx] [PATCH 0/2] " Ville Syrjälä

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