* [Intel-gfx] [PATCH v3 0/2] DGFX mmap with rpm
@ 2022-09-09 11:24 Anshuman Gupta
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Anshuman Gupta @ 2022-09-09 11:24 UTC (permalink / raw)
To: intel-gfx; +Cc: chris, rodrigo.vivi
As per PCIe Spec Section 5.3.1.4.1
When pcie function is in d3hot state,
Configuration and Message requests are the only TLPs accepted by a
Function in the D3hot state. All other received Requests must be
handled as Unsupported Requests, and all received Completions
may optionally be handled as Unexpected Completions.
Therefore when gfx endpoint function is in d3 state, all pcie iomem
transaction requires to transition the pcie function in D0 state.
Implementation of handling i915_gem_object_pin_map will be handled in
different series.
Anshuman Gupta (2):
drm/i915: Refactor userfault_wakeref to re-use
drm/i915/dgfx: Release mmap on rpm suspend
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 20 ++++++--
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 46 ++++++++++++++++---
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 -
drivers/gpu/drm/i915/gt/intel_gt.c | 3 ++
drivers/gpu/drm/i915/gt/intel_gt_types.h | 6 +++
drivers/gpu/drm/i915/gt/intel_gtt.h | 3 --
drivers/gpu/drm/i915/i915_driver.c | 1 -
drivers/gpu/drm/i915/i915_gem.c | 7 ++-
12 files changed, 75 insertions(+), 20 deletions(-)
--
2.26.2
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 1/2] drm/i915: Refactor userfault_wakeref to re-use
2022-09-09 11:24 [Intel-gfx] [PATCH v3 0/2] DGFX mmap with rpm Anshuman Gupta
@ 2022-09-09 11:24 ` Anshuman Gupta
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
` (3 subsequent siblings)
4 siblings, 0 replies; 10+ messages in thread
From: Anshuman Gupta @ 2022-09-09 11:24 UTC (permalink / raw)
To: intel-gfx; +Cc: chris, rodrigo.vivi
Refactor userfault_wakeref to re-use for discrete lmem mmap mapping
as well, as on discrete GTT mmap are not supported. Moving
userfault_wakeref from ggtt to gt structure.
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 -
drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
drivers/gpu/drm/i915/gt/intel_gtt.h | 3 ---
drivers/gpu/drm/i915/i915_gem.c | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 0c5c43852e24..2be222c03c82 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -413,7 +413,7 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
vma->mmo = mmo;
if (CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
- intel_wakeref_auto(&to_gt(i915)->ggtt->userfault_wakeref,
+ intel_wakeref_auto(&to_gt(i915)->userfault_wakeref,
msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
if (write) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 00359ec9d58b..3428f735e786 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -24,7 +24,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
{
GEM_TRACE("%s\n", dev_name(i915->drm.dev));
- intel_wakeref_auto(&to_gt(i915)->ggtt->userfault_wakeref, 0);
+ intel_wakeref_auto(&to_gt(i915)->userfault_wakeref, 0);
flush_workqueue(i915->wq);
/*
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index 6ebda3d65086..f920d5484132 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -842,7 +842,6 @@ void intel_ggtt_init_fences(struct i915_ggtt *ggtt)
INIT_LIST_HEAD(&ggtt->fence_list);
INIT_LIST_HEAD(&ggtt->userfault_list);
- intel_wakeref_auto_init(&ggtt->userfault_wakeref, uncore->rpm);
detect_bit_6_swizzle(ggtt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index e4bac2431e41..1ce344cfa827 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -801,6 +801,7 @@ static int intel_gt_tile_setup(struct intel_gt *gt, phys_addr_t phys_addr)
}
intel_uncore_init_early(gt->uncore, gt);
+ intel_wakeref_auto_init(>->userfault_wakeref, gt->uncore->rpm);
ret = intel_uncore_setup_mmio(gt->uncore, phys_addr);
if (ret)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index 4d56f7d5a3be..e6a662f9d7c0 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -147,6 +147,9 @@ struct intel_gt {
*/
intel_wakeref_t awake;
+ /* Manual runtime pm autosuspend delay for user GGTT/lmem mmaps */
+ struct intel_wakeref_auto userfault_wakeref;
+
u32 clock_frequency;
u32 clock_period_ns;
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index e639434e97fd..c0ca53cba9f0 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -386,9 +386,6 @@ struct i915_ggtt {
*/
struct list_head userfault_list;
- /* Manual runtime pm autosuspend delay for user GGTT mmaps */
- struct intel_wakeref_auto userfault_wakeref;
-
struct mutex error_mutex;
struct drm_mm_node error_capture;
struct drm_mm_node uc_fw;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4b76051312dd..70f082f7911a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1172,7 +1172,7 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
{
- intel_wakeref_auto_fini(&to_gt(dev_priv)->ggtt->userfault_wakeref);
+ intel_wakeref_auto_fini(&to_gt(dev_priv)->userfault_wakeref);
i915_gem_suspend_late(dev_priv);
intel_gt_driver_remove(to_gt(dev_priv));
--
2.26.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-09 11:24 [Intel-gfx] [PATCH v3 0/2] DGFX mmap with rpm Anshuman Gupta
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
@ 2022-09-09 11:24 ` Anshuman Gupta
2022-09-09 15:36 ` Matthew Auld
` (2 more replies)
2022-09-09 16:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX mmap with rpm (rev3) Patchwork
` (2 subsequent siblings)
4 siblings, 3 replies; 10+ messages in thread
From: Anshuman Gupta @ 2022-09-09 11:24 UTC (permalink / raw)
To: intel-gfx; +Cc: chris, Matthew Auld, rodrigo.vivi
Release all mmap mapping for all lmem objects which are associated
with userfault such that, while pcie function in D3hot, any access
to memory mappings will raise a userfault.
Runtime resume the dgpu(when gem object lies in lmem).
This will transition the dgpu graphics function to D0
state if it was in D3 in order to access the mmap memory
mappings.
v2:
- Squashes the patches. [Matt Auld]
- Add adequate locking for lmem_userfault_list addition. [Matt Auld]
- Reused obj->userfault_count to avoid double addition. [Matt Auld]
- Added i915_gem_object_lock to check
i915_gem_object_is_lmem. [Matt Auld]
v3:
- Use i915_ttm_cpu_maps_iomem. [Matt Auld]
- Fix 'ret == 0 to ret == VM_FAULT_NOPAGE'. [Matt Auld]
- Reuse obj->userfault_count as a bool 0 or 1. [Matt Auld]
- Delete the mmaped obj from lmem_userfault_list in obj
destruction path. [Matt Auld]
- Get a wakeref for object destruction patch. [Matt Auld]
- Use intel_wakeref_auto to delay runtime PM. [Matt Auld]
PCIe Specs 5.3.1.4.1
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++--
drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 46 ++++++++++++++++---
drivers/gpu/drm/i915/gt/intel_gt.c | 2 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 ++
drivers/gpu/drm/i915/i915_driver.c | 1 -
drivers/gpu/drm/i915/i915_gem.c | 5 ++
9 files changed, 68 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 2be222c03c82..55a4e9fba5ba 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -550,13 +550,10 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
intel_runtime_pm_put(&i915->runtime_pm, wakeref);
}
-void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
+void __i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
{
struct i915_mmap_offset *mmo, *mn;
- if (obj->ops->unmap_virtual)
- obj->ops->unmap_virtual(obj);
-
spin_lock(&obj->mmo.lock);
rbtree_postorder_for_each_entry_safe(mmo, mn,
&obj->mmo.offsets, offset) {
@@ -573,6 +570,19 @@ void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
spin_lock(&obj->mmo.lock);
}
spin_unlock(&obj->mmo.lock);
+
+ if (obj->userfault_count) {
+ list_del(&obj->userfault_link);
+ obj->userfault_count = 0;
+ }
+}
+
+void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
+{
+ if (obj->ops->unmap_virtual)
+ obj->ops->unmap_virtual(obj);
+
+ __i915_gem_object_release_mmap_offset(obj);
}
static struct i915_mmap_offset *
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
index efee9e0d2508..271039fdf875 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
@@ -27,6 +27,7 @@ int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
+void __i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
#endif
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 389e9f157ca5..f6e60cc86b9e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -238,7 +238,7 @@ static void __i915_gem_object_free_mmaps(struct drm_i915_gem_object *obj)
{
/* Skip serialisation and waking the device if known to be not used. */
- if (obj->userfault_count)
+ if (obj->userfault_count && !IS_DGFX(to_i915(obj->base.dev)))
i915_gem_object_release_mmap_gtt(obj);
if (!RB_EMPTY_ROOT(&obj->mmo.offsets)) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index 9f6b14ec189a..40305e2bcd49 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -298,7 +298,8 @@ struct drm_i915_gem_object {
};
/**
- * Whether the object is currently in the GGTT mmap.
+ * Whether the object is currently in the GGTT or any other supported
+ * fake offset mmap backed by lmem.
*/
unsigned int userfault_count;
struct list_head userfault_link;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index bc9c432edffe..bfb2074d65ae 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -509,9 +509,17 @@ static int i915_ttm_shrink(struct drm_i915_gem_object *obj, unsigned int flags)
static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo)
{
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
+ intel_wakeref_t wakeref = 0;
if (likely(obj)) {
+ if (i915_ttm_cpu_maps_iomem(bo->resource))
+ wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
+
__i915_gem_object_pages_fini(obj);
+
+ if (wakeref)
+ intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
+
i915_ttm_free_cached_io_rsgt(obj);
}
}
@@ -981,6 +989,7 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
struct ttm_buffer_object *bo = area->vm_private_data;
struct drm_device *dev = bo->base.dev;
struct drm_i915_gem_object *obj;
+ intel_wakeref_t wakeref = 0;
vm_fault_t ret;
int idx;
@@ -990,16 +999,22 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
/* Sanity check that we allow writing into this object */
if (unlikely(i915_gem_object_is_readonly(obj) &&
- area->vm_flags & VM_WRITE))
- return VM_FAULT_SIGBUS;
+ area->vm_flags & VM_WRITE)) {
+ ret = VM_FAULT_SIGBUS;
+ goto out_rpm;
+ }
ret = ttm_bo_vm_reserve(bo, vmf);
if (ret)
- return ret;
+ goto out_rpm;
+
+ if (i915_ttm_cpu_maps_iomem(bo->resource))
+ wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
if (obj->mm.madv != I915_MADV_WILLNEED) {
dma_resv_unlock(bo->base.resv);
- return VM_FAULT_SIGBUS;
+ ret = VM_FAULT_SIGBUS;
+ goto out_rpm;
}
if (!i915_ttm_resource_mappable(bo->resource)) {
@@ -1023,7 +1038,8 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
if (err) {
drm_dbg(dev, "Unable to make resource CPU accessible\n");
dma_resv_unlock(bo->base.resv);
- return VM_FAULT_SIGBUS;
+ ret = VM_FAULT_SIGBUS;
+ goto out_rpm;
}
}
@@ -1034,12 +1050,30 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
} else {
ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
}
+
if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
- return ret;
+ goto out_rpm;
+
+ /* ttm_bo_vm_reserve() already has dma_resv_lock */
+ if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
+ obj->userfault_count = 1;
+ mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
+ list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))->lmem_userfault_list);
+ mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
+ }
+
+ if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
+ intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))->userfault_wakeref,
+ msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
i915_ttm_adjust_lru(obj);
dma_resv_unlock(bo->base.resv);
+
+out_rpm:
+ if (wakeref)
+ intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
+
return ret;
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 1ce344cfa827..ee9ee815f505 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -39,6 +39,8 @@ static void __intel_gt_init_early(struct intel_gt *gt)
{
spin_lock_init(>->irq_lock);
+ INIT_LIST_HEAD(>->lmem_userfault_list);
+ mutex_init(>->lmem_userfault_lock);
INIT_LIST_HEAD(>->closed_vma);
spin_lock_init(>->closed_lock);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
index e6a662f9d7c0..a2d87e742161 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
@@ -132,6 +132,9 @@ struct intel_gt {
struct intel_wakeref wakeref;
atomic_t user_wakeref;
+ struct mutex lmem_userfault_lock; /* Protects access to usefault list */
+ struct list_head lmem_userfault_list;
+
struct list_head closed_vma;
spinlock_t closed_lock; /* guards the list of closed_vma */
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 1332c70370a6..81699aa505e2 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1591,7 +1591,6 @@ static int intel_runtime_suspend(struct device *kdev)
return -ENODEV;
drm_dbg(&dev_priv->drm, "Suspending device\n");
-
disable_rpm_wakeref_asserts(rpm);
/*
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 70f082f7911a..01f23c0e7fec 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -842,6 +842,11 @@ void i915_gem_runtime_suspend(struct drm_i915_private *i915)
&to_gt(i915)->ggtt->userfault_list, userfault_link)
__i915_gem_object_release_mmap_gtt(obj);
+ list_for_each_entry_safe(obj, on,
+ &to_gt(i915)->lmem_userfault_list, userfault_link) {
+ __i915_gem_object_release_mmap_offset(obj);
+ }
+
/*
* The fence will be lost when the device powers down. If any were
* in use by hardware (i.e. they are pinned), we should not be powering
--
2.26.2
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
@ 2022-09-09 15:36 ` Matthew Auld
2022-09-12 6:05 ` Gupta, Anshuman
2022-09-09 16:08 ` kernel test robot
2022-09-09 16:22 ` kernel test robot
2 siblings, 1 reply; 10+ messages in thread
From: Matthew Auld @ 2022-09-09 15:36 UTC (permalink / raw)
To: Anshuman Gupta, intel-gfx; +Cc: chris, rodrigo.vivi
On 09/09/2022 12:24, Anshuman Gupta wrote:
> Release all mmap mapping for all lmem objects which are associated
> with userfault such that, while pcie function in D3hot, any access
> to memory mappings will raise a userfault.
>
> Runtime resume the dgpu(when gem object lies in lmem).
> This will transition the dgpu graphics function to D0
> state if it was in D3 in order to access the mmap memory
> mappings.
>
> v2:
> - Squashes the patches. [Matt Auld]
> - Add adequate locking for lmem_userfault_list addition. [Matt Auld]
> - Reused obj->userfault_count to avoid double addition. [Matt Auld]
> - Added i915_gem_object_lock to check
> i915_gem_object_is_lmem. [Matt Auld]
>
> v3:
> - Use i915_ttm_cpu_maps_iomem. [Matt Auld]
> - Fix 'ret == 0 to ret == VM_FAULT_NOPAGE'. [Matt Auld]
> - Reuse obj->userfault_count as a bool 0 or 1. [Matt Auld]
> - Delete the mmaped obj from lmem_userfault_list in obj
> destruction path. [Matt Auld]
> - Get a wakeref for object destruction patch. [Matt Auld]
> - Use intel_wakeref_auto to delay runtime PM. [Matt Auld]
>
> PCIe Specs 5.3.1.4.1
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++--
> drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
> drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
> .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 46 ++++++++++++++++---
> drivers/gpu/drm/i915/gt/intel_gt.c | 2 +
> drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 ++
> drivers/gpu/drm/i915/i915_driver.c | 1 -
> drivers/gpu/drm/i915/i915_gem.c | 5 ++
> 9 files changed, 68 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index 2be222c03c82..55a4e9fba5ba 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -550,13 +550,10 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
> intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> }
>
> -void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> +void __i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> {
> struct i915_mmap_offset *mmo, *mn;
>
> - if (obj->ops->unmap_virtual)
> - obj->ops->unmap_virtual(obj);
> -
> spin_lock(&obj->mmo.lock);
> rbtree_postorder_for_each_entry_safe(mmo, mn,
> &obj->mmo.offsets, offset) {
> @@ -573,6 +570,19 @@ void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> spin_lock(&obj->mmo.lock);
> }
> spin_unlock(&obj->mmo.lock);
> +
> + if (obj->userfault_count) {
> + list_del(&obj->userfault_link);
> + obj->userfault_count = 0;
> + }
> +}
> +
> +void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> +{
> + if (obj->ops->unmap_virtual)
> + obj->ops->unmap_virtual(obj);
> +
> + __i915_gem_object_release_mmap_offset(obj);
> }
>
> static struct i915_mmap_offset *
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> index efee9e0d2508..271039fdf875 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> @@ -27,6 +27,7 @@ int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
> void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
> void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
>
> +void __i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
> void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj);
>
> #endif
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> index 389e9f157ca5..f6e60cc86b9e 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> @@ -238,7 +238,7 @@ static void __i915_gem_object_free_mmaps(struct drm_i915_gem_object *obj)
> {
> /* Skip serialisation and waking the device if known to be not used. */
>
> - if (obj->userfault_count)
> + if (obj->userfault_count && !IS_DGFX(to_i915(obj->base.dev)))
> i915_gem_object_release_mmap_gtt(obj);
>
> if (!RB_EMPTY_ROOT(&obj->mmo.offsets)) {
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index 9f6b14ec189a..40305e2bcd49 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -298,7 +298,8 @@ struct drm_i915_gem_object {
> };
>
> /**
> - * Whether the object is currently in the GGTT mmap.
> + * Whether the object is currently in the GGTT or any other supported
> + * fake offset mmap backed by lmem.
> */
> unsigned int userfault_count;
> struct list_head userfault_link;
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> index bc9c432edffe..bfb2074d65ae 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> @@ -509,9 +509,17 @@ static int i915_ttm_shrink(struct drm_i915_gem_object *obj, unsigned int flags)
> static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo)
> {
> struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
> + intel_wakeref_t wakeref = 0;
>
> if (likely(obj)) {
> + if (i915_ttm_cpu_maps_iomem(bo->resource))
> + wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
> +
> __i915_gem_object_pages_fini(obj);
> +
> + if (wakeref)
> + intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
> +
> i915_ttm_free_cached_io_rsgt(obj);
> }
> }
> @@ -981,6 +989,7 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> struct ttm_buffer_object *bo = area->vm_private_data;
> struct drm_device *dev = bo->base.dev;
> struct drm_i915_gem_object *obj;
> + intel_wakeref_t wakeref = 0;
> vm_fault_t ret;
> int idx;
>
> @@ -990,16 +999,22 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
>
> /* Sanity check that we allow writing into this object */
> if (unlikely(i915_gem_object_is_readonly(obj) &&
> - area->vm_flags & VM_WRITE))
> - return VM_FAULT_SIGBUS;
> + area->vm_flags & VM_WRITE)) {
> + ret = VM_FAULT_SIGBUS;
> + goto out_rpm;
> + }
>
> ret = ttm_bo_vm_reserve(bo, vmf);
> if (ret)
> - return ret;
> + goto out_rpm;
> +
> + if (i915_ttm_cpu_maps_iomem(bo->resource))
> + wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
Could maybe move this down a bit. No need to grab the wakeref if the
object is marked as DONTNEED.
>
> if (obj->mm.madv != I915_MADV_WILLNEED) {
> dma_resv_unlock(bo->base.resv);
> - return VM_FAULT_SIGBUS;
> + ret = VM_FAULT_SIGBUS;
> + goto out_rpm;
> }
>
> if (!i915_ttm_resource_mappable(bo->resource)) {
> @@ -1023,7 +1038,8 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> if (err) {
> drm_dbg(dev, "Unable to make resource CPU accessible\n");
> dma_resv_unlock(bo->base.resv);
> - return VM_FAULT_SIGBUS;
> + ret = VM_FAULT_SIGBUS;
> + goto out_rpm;
> }
> }
>
> @@ -1034,12 +1050,30 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> } else {
> ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
> }
> +
> if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
> - return ret;
> + goto out_rpm;
> +
> + /* ttm_bo_vm_reserve() already has dma_resv_lock */
> + if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
> + obj->userfault_count = 1;
> + mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> + list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))->lmem_userfault_list);
> + mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
> + }
> +
> + if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
> + intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))->userfault_wakeref,
> + msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
>
> i915_ttm_adjust_lru(obj);
>
> dma_resv_unlock(bo->base.resv);
> +
> +out_rpm:
> + if (wakeref)
> + intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
> +
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 1ce344cfa827..ee9ee815f505 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -39,6 +39,8 @@ static void __intel_gt_init_early(struct intel_gt *gt)
> {
> spin_lock_init(>->irq_lock);
>
> + INIT_LIST_HEAD(>->lmem_userfault_list);
> + mutex_init(>->lmem_userfault_lock);
> INIT_LIST_HEAD(>->closed_vma);
> spin_lock_init(>->closed_lock);
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> index e6a662f9d7c0..a2d87e742161 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> @@ -132,6 +132,9 @@ struct intel_gt {
> struct intel_wakeref wakeref;
> atomic_t user_wakeref;
>
> + struct mutex lmem_userfault_lock; /* Protects access to usefault list */
> + struct list_head lmem_userfault_list;
Probably needs a big comment explaining how this all works, since it
seems quite tricky.
"If we are outside of the runtime suspend path, access to
@lmem_userfault_list requires always first grabbing the runtime pm, to
ensure we can't race against runtime suspend removing items. Once we
have that we also need to grab @lmem_userfault_lock, at which point we
have exclusive access. The runtime suspend path is special since it
doens't really hold any locks, but instead has exlusive access by virtue
of all other accesses requiring holding the runtime pm."
Also according to that we are then missing holding lmem_userfault_lock
in i915_gem_object_release_mmap_offset(), for the object destruction
case. We are only holding the runtime pm, which only saves us from
runtime suspend, and not some other concurrent user, like a different
object destroy or fault touching the list.
> +
> struct list_head closed_vma;
> spinlock_t closed_lock; /* guards the list of closed_vma */
>
> diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
> index 1332c70370a6..81699aa505e2 100644
> --- a/drivers/gpu/drm/i915/i915_driver.c
> +++ b/drivers/gpu/drm/i915/i915_driver.c
> @@ -1591,7 +1591,6 @@ static int intel_runtime_suspend(struct device *kdev)
> return -ENODEV;
>
> drm_dbg(&dev_priv->drm, "Suspending device\n");
> -
> disable_rpm_wakeref_asserts(rpm);
>
> /*
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 70f082f7911a..01f23c0e7fec 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -842,6 +842,11 @@ void i915_gem_runtime_suspend(struct drm_i915_private *i915)
> &to_gt(i915)->ggtt->userfault_list, userfault_link)
> __i915_gem_object_release_mmap_gtt(obj);
>
> + list_for_each_entry_safe(obj, on,
> + &to_gt(i915)->lmem_userfault_list, userfault_link) {
> + __i915_gem_object_release_mmap_offset(obj);
drm_vma_node_unmap(&bo->base.vma_node, bdev->dev_mapping);
I don't think mm.offsets is tracking the ttm node...
> + }
> +
> /*
> * The fence will be lost when the device powers down. If any were
> * in use by hardware (i.e. they are pinned), we should not be powering
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
2022-09-09 15:36 ` Matthew Auld
@ 2022-09-09 16:08 ` kernel test robot
2022-09-09 16:22 ` kernel test robot
2 siblings, 0 replies; 10+ messages in thread
From: kernel test robot @ 2022-09-09 16:08 UTC (permalink / raw)
To: Anshuman Gupta, intel-gfx
Cc: rodrigo.vivi, llvm, kbuild-all, Matthew Auld, chris
Hi Anshuman,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
url: https://github.com/intel-lab-lkp/linux/commits/Anshuman-Gupta/DGFX-mmap-with-rpm/20220909-192609
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a004 (https://download.01.org/0day-ci/archive/20220910/202209100005.i5hNgIqU-lkp@intel.com/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/b3f193a1659a69de9e9025c9b02a039d0a58390d
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Anshuman-Gupta/DGFX-mmap-with-rpm/20220909-192609
git checkout b3f193a1659a69de9e9025c9b02a039d0a58390d
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c:1065:14: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand]
if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gem/i915_gem_ttm.c:1065:14: note: use '&' for a bitwise operation
if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
^~
&
drivers/gpu/drm/i915/gem/i915_gem_ttm.c:1065:14: note: remove constant to silence this warning
if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
vim +1065 drivers/gpu/drm/i915/gem/i915_gem_ttm.c
985
986 static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
987 {
988 struct vm_area_struct *area = vmf->vma;
989 struct ttm_buffer_object *bo = area->vm_private_data;
990 struct drm_device *dev = bo->base.dev;
991 struct drm_i915_gem_object *obj;
992 intel_wakeref_t wakeref = 0;
993 vm_fault_t ret;
994 int idx;
995
996 obj = i915_ttm_to_gem(bo);
997 if (!obj)
998 return VM_FAULT_SIGBUS;
999
1000 /* Sanity check that we allow writing into this object */
1001 if (unlikely(i915_gem_object_is_readonly(obj) &&
1002 area->vm_flags & VM_WRITE)) {
1003 ret = VM_FAULT_SIGBUS;
1004 goto out_rpm;
1005 }
1006
1007 ret = ttm_bo_vm_reserve(bo, vmf);
1008 if (ret)
1009 goto out_rpm;
1010
1011 if (i915_ttm_cpu_maps_iomem(bo->resource))
1012 wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
1013
1014 if (obj->mm.madv != I915_MADV_WILLNEED) {
1015 dma_resv_unlock(bo->base.resv);
1016 ret = VM_FAULT_SIGBUS;
1017 goto out_rpm;
1018 }
1019
1020 if (!i915_ttm_resource_mappable(bo->resource)) {
1021 int err = -ENODEV;
1022 int i;
1023
1024 for (i = 0; i < obj->mm.n_placements; i++) {
1025 struct intel_memory_region *mr = obj->mm.placements[i];
1026 unsigned int flags;
1027
1028 if (!mr->io_size && mr->type != INTEL_MEMORY_SYSTEM)
1029 continue;
1030
1031 flags = obj->flags;
1032 flags &= ~I915_BO_ALLOC_GPU_ONLY;
1033 err = __i915_ttm_migrate(obj, mr, flags);
1034 if (!err)
1035 break;
1036 }
1037
1038 if (err) {
1039 drm_dbg(dev, "Unable to make resource CPU accessible\n");
1040 dma_resv_unlock(bo->base.resv);
1041 ret = VM_FAULT_SIGBUS;
1042 goto out_rpm;
1043 }
1044 }
1045
1046 if (drm_dev_enter(dev, &idx)) {
1047 ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
1048 TTM_BO_VM_NUM_PREFAULT);
1049 drm_dev_exit(idx);
1050 } else {
1051 ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
1052 }
1053
1054 if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
1055 goto out_rpm;
1056
1057 /* ttm_bo_vm_reserve() already has dma_resv_lock */
1058 if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
1059 obj->userfault_count = 1;
1060 mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
1061 list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))->lmem_userfault_list);
1062 mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
1063 }
1064
> 1065 if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
1066 intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))->userfault_wakeref,
1067 msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
1068
1069 i915_ttm_adjust_lru(obj);
1070
1071 dma_resv_unlock(bo->base.resv);
1072
1073 out_rpm:
1074 if (wakeref)
1075 intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
1076
1077 return ret;
1078 }
1079
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
2022-09-09 15:36 ` Matthew Auld
2022-09-09 16:08 ` kernel test robot
@ 2022-09-09 16:22 ` kernel test robot
2 siblings, 0 replies; 10+ messages in thread
From: kernel test robot @ 2022-09-09 16:22 UTC (permalink / raw)
To: Anshuman Gupta, intel-gfx
Cc: rodrigo.vivi, llvm, kbuild-all, Matthew Auld, chris
Hi Anshuman,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-tip/drm-tip]
url: https://github.com/intel-lab-lkp/linux/commits/Anshuman-Gupta/DGFX-mmap-with-rpm/20220909-192609
base: git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a013 (https://download.01.org/0day-ci/archive/20220910/202209100051.4Wp6eLZf-lkp@intel.com/config)
compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/b3f193a1659a69de9e9025c9b02a039d0a58390d
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Anshuman-Gupta/DGFX-mmap-with-rpm/20220909-192609
git checkout b3f193a1659a69de9e9025c9b02a039d0a58390d
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/i915/gem/i915_gem_ttm.c:1065:14: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand]
if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/i915/gem/i915_gem_ttm.c:1065:14: note: use '&' for a bitwise operation
if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
^~
&
drivers/gpu/drm/i915/gem/i915_gem_ttm.c:1065:14: note: remove constant to silence this warning
if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
vim +1065 drivers/gpu/drm/i915/gem/i915_gem_ttm.c
985
986 static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
987 {
988 struct vm_area_struct *area = vmf->vma;
989 struct ttm_buffer_object *bo = area->vm_private_data;
990 struct drm_device *dev = bo->base.dev;
991 struct drm_i915_gem_object *obj;
992 intel_wakeref_t wakeref = 0;
993 vm_fault_t ret;
994 int idx;
995
996 obj = i915_ttm_to_gem(bo);
997 if (!obj)
998 return VM_FAULT_SIGBUS;
999
1000 /* Sanity check that we allow writing into this object */
1001 if (unlikely(i915_gem_object_is_readonly(obj) &&
1002 area->vm_flags & VM_WRITE)) {
1003 ret = VM_FAULT_SIGBUS;
1004 goto out_rpm;
1005 }
1006
1007 ret = ttm_bo_vm_reserve(bo, vmf);
1008 if (ret)
1009 goto out_rpm;
1010
1011 if (i915_ttm_cpu_maps_iomem(bo->resource))
1012 wakeref = intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
1013
1014 if (obj->mm.madv != I915_MADV_WILLNEED) {
1015 dma_resv_unlock(bo->base.resv);
1016 ret = VM_FAULT_SIGBUS;
1017 goto out_rpm;
1018 }
1019
1020 if (!i915_ttm_resource_mappable(bo->resource)) {
1021 int err = -ENODEV;
1022 int i;
1023
1024 for (i = 0; i < obj->mm.n_placements; i++) {
1025 struct intel_memory_region *mr = obj->mm.placements[i];
1026 unsigned int flags;
1027
1028 if (!mr->io_size && mr->type != INTEL_MEMORY_SYSTEM)
1029 continue;
1030
1031 flags = obj->flags;
1032 flags &= ~I915_BO_ALLOC_GPU_ONLY;
1033 err = __i915_ttm_migrate(obj, mr, flags);
1034 if (!err)
1035 break;
1036 }
1037
1038 if (err) {
1039 drm_dbg(dev, "Unable to make resource CPU accessible\n");
1040 dma_resv_unlock(bo->base.resv);
1041 ret = VM_FAULT_SIGBUS;
1042 goto out_rpm;
1043 }
1044 }
1045
1046 if (drm_dev_enter(dev, &idx)) {
1047 ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
1048 TTM_BO_VM_NUM_PREFAULT);
1049 drm_dev_exit(idx);
1050 } else {
1051 ret = ttm_bo_vm_dummy_page(vmf, vmf->vma->vm_page_prot);
1052 }
1053
1054 if (ret == VM_FAULT_RETRY && !(vmf->flags & FAULT_FLAG_RETRY_NOWAIT))
1055 goto out_rpm;
1056
1057 /* ttm_bo_vm_reserve() already has dma_resv_lock */
1058 if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
1059 obj->userfault_count = 1;
1060 mutex_lock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
1061 list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))->lmem_userfault_list);
1062 mutex_unlock(&to_gt(to_i915(obj->base.dev))->lmem_userfault_lock);
1063 }
1064
> 1065 if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
1066 intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))->userfault_wakeref,
1067 msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
1068
1069 i915_ttm_adjust_lru(obj);
1070
1071 dma_resv_unlock(bo->base.resv);
1072
1073 out_rpm:
1074 if (wakeref)
1075 intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm, wakeref);
1076
1077 return ret;
1078 }
1079
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX mmap with rpm (rev3)
2022-09-09 11:24 [Intel-gfx] [PATCH v3 0/2] DGFX mmap with rpm Anshuman Gupta
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
@ 2022-09-09 16:39 ` Patchwork
2022-09-09 17:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-09 22:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2022-09-09 16:39 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
== Series Details ==
Series: DGFX mmap with rpm (rev3)
URL : https://patchwork.freedesktop.org/series/107400/
State : warning
== Summary ==
Error: dim checkpatch failed
fecdb3883843 drm/i915: Refactor userfault_wakeref to re-use
0152e06bf81b drm/i915/dgfx: Release mmap on rpm suspend
-:38: WARNING:BAD_SIGN_OFF: Duplicate signature
#38:
Reported-by: kernel test robot <lkp@intel.com>
total: 0 errors, 1 warnings, 0 checks, 182 lines checked
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for DGFX mmap with rpm (rev3)
2022-09-09 11:24 [Intel-gfx] [PATCH v3 0/2] DGFX mmap with rpm Anshuman Gupta
` (2 preceding siblings ...)
2022-09-09 16:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX mmap with rpm (rev3) Patchwork
@ 2022-09-09 17:01 ` Patchwork
2022-09-09 22:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2022-09-09 17:01 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8443 bytes --]
== Series Details ==
Series: DGFX mmap with rpm (rev3)
URL : https://patchwork.freedesktop.org/series/107400/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12109 -> Patchwork_107400v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/index.html
Participating hosts (39 -> 39)
------------------------------
Additional (1): fi-rkl-11600
Missing (1): fi-bdw-samus
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_107400v3:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_lmem_swapping@basic@lmem0:
- {bat-dg2-11}: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/bat-dg2-11/igt@gem_lmem_swapping@basic@lmem0.html
Known issues
------------
Here are the changes found in Patchwork_107400v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-rkl-11600: NOTRUN -> [SKIP][3] ([i915#2190])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-rkl-11600: NOTRUN -> [SKIP][4] ([i915#4613]) +3 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic:
- fi-rkl-11600: NOTRUN -> [SKIP][5] ([i915#3282])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600: NOTRUN -> [SKIP][6] ([i915#3012])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][7] -> [DMESG-FAIL][8] ([i915#4528])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/fi-blb-e6850/igt@i915_selftest@live@requests.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-blb-e6850/igt@i915_selftest@live@requests.html
- fi-pnv-d510: [PASS][9] -> [DMESG-FAIL][10] ([i915#4528])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/fi-pnv-d510/igt@i915_selftest@live@requests.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-pnv-d510/igt@i915_selftest@live@requests.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600: NOTRUN -> [INCOMPLETE][11] ([i915#5982])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-rkl-11600: NOTRUN -> [SKIP][12] ([fdo#111827]) +7 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600: NOTRUN -> [SKIP][13] ([i915#4103])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600: NOTRUN -> [SKIP][14] ([fdo#109285] / [i915#4098])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_psr@sprite_plane_onoff:
- fi-rkl-11600: NOTRUN -> [SKIP][15] ([i915#1072]) +3 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600: NOTRUN -> [SKIP][16] ([i915#3555] / [i915#4098])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-read:
- fi-rkl-11600: NOTRUN -> [SKIP][17] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- fi-rkl-11600: NOTRUN -> [SKIP][18] ([fdo#109295] / [i915#3301] / [i915#3708])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-rkl-11600/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-blb-e6850: NOTRUN -> [FAIL][19] ([fdo#109271] / [i915#2403] / [i915#4312])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-blb-e6850/igt@runner@aborted.html
- fi-pnv-d510: NOTRUN -> [FAIL][20] ([fdo#109271] / [i915#2403] / [i915#4312])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/fi-pnv-d510/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@smem:
- {bat-rplp-1}: [DMESG-WARN][21] ([i915#2867]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/bat-rplp-1/igt@gem_exec_suspend@basic-s0@smem.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/bat-rplp-1/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_selftest@live@gt_lrc:
- {bat-dg2-8}: [INCOMPLETE][23] ([i915#6670]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/bat-dg2-8/igt@i915_selftest@live@gt_lrc.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
[i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6670]: https://gitlab.freedesktop.org/drm/intel/issues/6670
Build changes
-------------
* Linux: CI_DRM_12109 -> Patchwork_107400v3
CI-20190529: 20190529
CI_DRM_12109: 51a8d45da4c7bd59936fab3d2ea4acf849c36f40 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6649: 7d91a6952dadaa9001b662ed60c08ccb8364929d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_107400v3: 51a8d45da4c7bd59936fab3d2ea4acf849c36f40 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
a59d267427dd drm/i915/dgfx: Release mmap on rpm suspend
ec1fa6f9a685 drm/i915: Refactor userfault_wakeref to re-use
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/index.html
[-- Attachment #2: Type: text/html, Size: 9711 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for DGFX mmap with rpm (rev3)
2022-09-09 11:24 [Intel-gfx] [PATCH v3 0/2] DGFX mmap with rpm Anshuman Gupta
` (3 preceding siblings ...)
2022-09-09 17:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-09-09 22:22 ` Patchwork
4 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2022-09-09 22:22 UTC (permalink / raw)
To: Anshuman Gupta; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 18333 bytes --]
== Series Details ==
Series: DGFX mmap with rpm (rev3)
URL : https://patchwork.freedesktop.org/series/107400/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12109_full -> Patchwork_107400v3_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_107400v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-snb: NOTRUN -> [DMESG-WARN][1] ([i915#4991])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-snb4/igt@gem_create@create-massive.html
* igt@gem_eio@kms:
- shard-tglb: [PASS][2] -> [FAIL][3] ([i915#5784])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-tglb6/igt@gem_eio@kms.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-tglb1/igt@gem_eio@kms.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [PASS][4] -> [SKIP][5] ([i915#4525]) +2 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb1/igt@gem_exec_balancer@parallel-keep-in-fence.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb3/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_lmem_swapping@parallel-random-verify:
- shard-apl: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl2/igt@gem_lmem_swapping@parallel-random-verify.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [PASS][7] -> [DMESG-WARN][8] ([i915#180]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-apl7/igt@gem_workarounds@suspend-resume.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl6/igt@gem_workarounds@suspend-resume.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#3886]) +3 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl4/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium@hdmi-hpd-enable-disable-mode:
- shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-snb4/igt@kms_chamelium@hdmi-hpd-enable-disable-mode.html
* igt@kms_color_chamelium@ctm-red-to-blue:
- shard-apl: NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl7/igt@kms_color_chamelium@ctm-red-to-blue.html
* igt@kms_content_protection@legacy:
- shard-apl: NOTRUN -> [TIMEOUT][12] ([i915#1319])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl2/igt@kms_content_protection@legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
- shard-glk: [PASS][13] -> [FAIL][14] ([i915#2346])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][15] ([i915#2672]) +5 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][16] ([i915#2672] / [i915#3555])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-dp-1:
- shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271]) +51 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-c-dp-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1:
- shard-iclb: [PASS][18] -> [SKIP][19] ([i915#5235]) +2 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb3/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
- shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#658]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@psr2_primary_blt:
- shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb2/igt@kms_psr@psr2_primary_blt.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb1/igt@kms_psr@psr2_primary_blt.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-tglb: [PASS][23] -> [SKIP][24] ([i915#5519])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-tglb6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-tglb7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@perf_pmu@rc6-runtime-pm:
- shard-snb: NOTRUN -> [SKIP][25] ([fdo#109271]) +47 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-snb4/igt@perf_pmu@rc6-runtime-pm.html
#### Possible fixes ####
* igt@gem_eio@unwedge-stress:
- {shard-tglu}: [TIMEOUT][26] ([i915#3063]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-tglu-5/igt@gem_eio@unwedge-stress.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-tglu-2/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [SKIP][28] ([i915#4525]) -> [PASS][29] +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb7/igt@gem_exec_balancer@parallel-bb-first.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-tglb: [FAIL][30] ([i915#2842]) -> [PASS][31] +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-tglb7/igt@gem_exec_fair@basic-none-share@rcs0.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-tglb2/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- {shard-tglu}: [FAIL][32] ([i915#2842]) -> [PASS][33]
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-tglu-1/igt@gem_exec_fair@basic-pace-share@rcs0.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-tglu-5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk: [FAIL][34] ([i915#2842]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-glk9/igt@gem_exec_fair@basic-pace@rcs0.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-glk6/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [FAIL][36] ([i915#454]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb7/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-vga-1:
- shard-snb: [INCOMPLETE][38] -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-snb5/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-vga-1.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-snb4/igt@kms_atomic_transition@plane-all-transition-nonblocking-fencing@pipe-a-vga-1.html
* igt@kms_cursor_legacy@basic-flip-before-cursor@legacy:
- shard-iclb: [DMESG-WARN][40] ([i915#4391]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb7/igt@kms_cursor_legacy@basic-flip-before-cursor@legacy.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb5/igt@kms_cursor_legacy@basic-flip-before-cursor@legacy.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][42] ([i915#79]) -> [PASS][43] +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-apl: [DMESG-WARN][44] ([i915#180]) -> [PASS][45] +2 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1:
- shard-iclb: [SKIP][46] ([i915#5235]) -> [PASS][47] +2 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb2/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b-edp-1.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [SKIP][48] ([fdo#109441]) -> [PASS][49] +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb6/igt@kms_psr@psr2_dpms.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb2/igt@kms_psr@psr2_dpms.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-iclb: [SKIP][50] ([i915#5519]) -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb8/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
#### Warnings ####
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][52] ([fdo#111068] / [i915#658]) -> [SKIP][53] ([i915#2920])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb3/igt@kms_psr2_sf@cursor-plane-update-sf.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-iclb: [SKIP][54] ([i915#2920]) -> [SKIP][55] ([fdo#111068] / [i915#658])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-iclb8/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@runner@aborted:
- shard-apl: ([FAIL][56], [FAIL][57], [FAIL][58], [FAIL][59], [FAIL][60]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][61], [FAIL][62], [FAIL][63], [FAIL][64]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-apl2/igt@runner@aborted.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-apl4/igt@runner@aborted.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-apl2/igt@runner@aborted.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-apl6/igt@runner@aborted.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12109/shard-apl3/igt@runner@aborted.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl6/igt@runner@aborted.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl6/igt@runner@aborted.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl3/igt@runner@aborted.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/shard-apl6/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_12109 -> Patchwork_107400v3
CI-20190529: 20190529
CI_DRM_12109: 51a8d45da4c7bd59936fab3d2ea4acf849c36f40 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6649: 7d91a6952dadaa9001b662ed60c08ccb8364929d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_107400v3: 51a8d45da4c7bd59936fab3d2ea4acf849c36f40 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_107400v3/index.html
[-- Attachment #2: Type: text/html, Size: 19438 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend
2022-09-09 15:36 ` Matthew Auld
@ 2022-09-12 6:05 ` Gupta, Anshuman
0 siblings, 0 replies; 10+ messages in thread
From: Gupta, Anshuman @ 2022-09-12 6:05 UTC (permalink / raw)
To: Auld, Matthew, intel-gfx@lists.freedesktop.org
Cc: chris@chris-wilson.co.uk, Vivi, Rodrigo
> -----Original Message-----
> From: Auld, Matthew <matthew.auld@intel.com>
> Sent: Friday, September 9, 2022 9:06 PM
> To: Gupta, Anshuman <anshuman.gupta@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: joonas.lahtinen@linux.intel.com; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
> Nilawar, Badal <badal.nilawar@intel.com>; chris@chris-wilson.co.uk
> Subject: Re: [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend
>
> On 09/09/2022 12:24, Anshuman Gupta wrote:
> > Release all mmap mapping for all lmem objects which are associated
> > with userfault such that, while pcie function in D3hot, any access to
> > memory mappings will raise a userfault.
> >
> > Runtime resume the dgpu(when gem object lies in lmem).
> > This will transition the dgpu graphics function to D0 state if it was
> > in D3 in order to access the mmap memory mappings.
> >
> > v2:
> > - Squashes the patches. [Matt Auld]
> > - Add adequate locking for lmem_userfault_list addition. [Matt Auld]
> > - Reused obj->userfault_count to avoid double addition. [Matt Auld]
> > - Added i915_gem_object_lock to check
> > i915_gem_object_is_lmem. [Matt Auld]
> >
> > v3:
> > - Use i915_ttm_cpu_maps_iomem. [Matt Auld]
> > - Fix 'ret == 0 to ret == VM_FAULT_NOPAGE'. [Matt Auld]
> > - Reuse obj->userfault_count as a bool 0 or 1. [Matt Auld]
> > - Delete the mmaped obj from lmem_userfault_list in obj
> > destruction path. [Matt Auld]
> > - Get a wakeref for object destruction patch. [Matt Auld]
> > - Use intel_wakeref_auto to delay runtime PM. [Matt Auld]
> >
> > PCIe Specs 5.3.1.4.1
> >
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6331
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 ++++++--
> > drivers/gpu/drm/i915/gem/i915_gem_mman.h | 1 +
> > drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 +-
> > .../gpu/drm/i915/gem/i915_gem_object_types.h | 3 +-
> > drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 46 ++++++++++++++++---
> > drivers/gpu/drm/i915/gt/intel_gt.c | 2 +
> > drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 ++
> > drivers/gpu/drm/i915/i915_driver.c | 1 -
> > drivers/gpu/drm/i915/i915_gem.c | 5 ++
> > 9 files changed, 68 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > index 2be222c03c82..55a4e9fba5ba 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > @@ -550,13 +550,10 @@ void i915_gem_object_release_mmap_gtt(struct
> drm_i915_gem_object *obj)
> > intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> > }
> >
> > -void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
> > *obj)
> > +void __i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
> > +*obj)
> > {
> > struct i915_mmap_offset *mmo, *mn;
> >
> > - if (obj->ops->unmap_virtual)
> > - obj->ops->unmap_virtual(obj);
> > -
> > spin_lock(&obj->mmo.lock);
> > rbtree_postorder_for_each_entry_safe(mmo, mn,
> > &obj->mmo.offsets, offset) { @@ -
> 573,6 +570,19 @@ void
> > i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
> > spin_lock(&obj->mmo.lock);
> > }
> > spin_unlock(&obj->mmo.lock);
> > +
> > + if (obj->userfault_count) {
> > + list_del(&obj->userfault_link);
> > + obj->userfault_count = 0;
> > + }
> > +}
> > +
> > +void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
> > +*obj) {
> > + if (obj->ops->unmap_virtual)
> > + obj->ops->unmap_virtual(obj);
> > +
> > + __i915_gem_object_release_mmap_offset(obj);
> > }
> >
> > static struct i915_mmap_offset *
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > index efee9e0d2508..271039fdf875 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
> > @@ -27,6 +27,7 @@ int i915_gem_dumb_mmap_offset(struct drm_file
> *file_priv,
> > void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object
> *obj);
> > void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object
> > *obj);
> >
> > +void __i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
> > +*obj);
> > void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object
> > *obj);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > index 389e9f157ca5..f6e60cc86b9e 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> > @@ -238,7 +238,7 @@ static void __i915_gem_object_free_mmaps(struct
> drm_i915_gem_object *obj)
> > {
> > /* Skip serialisation and waking the device if known to be not
> > used. */
> >
> > - if (obj->userfault_count)
> > + if (obj->userfault_count && !IS_DGFX(to_i915(obj->base.dev)))
> > i915_gem_object_release_mmap_gtt(obj);
> >
> > if (!RB_EMPTY_ROOT(&obj->mmo.offsets)) { diff --git
> > a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > index 9f6b14ec189a..40305e2bcd49 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> > @@ -298,7 +298,8 @@ struct drm_i915_gem_object {
> > };
> >
> > /**
> > - * Whether the object is currently in the GGTT mmap.
> > + * Whether the object is currently in the GGTT or any other supported
> > + * fake offset mmap backed by lmem.
> > */
> > unsigned int userfault_count;
> > struct list_head userfault_link;
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > index bc9c432edffe..bfb2074d65ae 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> > @@ -509,9 +509,17 @@ static int i915_ttm_shrink(struct
> drm_i915_gem_object *obj, unsigned int flags)
> > static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo)
> > {
> > struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
> > + intel_wakeref_t wakeref = 0;
> >
> > if (likely(obj)) {
> > + if (i915_ttm_cpu_maps_iomem(bo->resource))
> > + wakeref =
> > +intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
> > +
> > __i915_gem_object_pages_fini(obj);
> > +
> > + if (wakeref)
> > + intel_runtime_pm_put(&to_i915(obj->base.dev)-
> >runtime_pm,
> > +wakeref);
> > +
> > i915_ttm_free_cached_io_rsgt(obj);
> > }
> > }
> > @@ -981,6 +989,7 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> > struct ttm_buffer_object *bo = area->vm_private_data;
> > struct drm_device *dev = bo->base.dev;
> > struct drm_i915_gem_object *obj;
> > + intel_wakeref_t wakeref = 0;
> > vm_fault_t ret;
> > int idx;
> >
> > @@ -990,16 +999,22 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
> > *vmf)
> >
> > /* Sanity check that we allow writing into this object */
> > if (unlikely(i915_gem_object_is_readonly(obj) &&
> > - area->vm_flags & VM_WRITE))
> > - return VM_FAULT_SIGBUS;
> > + area->vm_flags & VM_WRITE)) {
> > + ret = VM_FAULT_SIGBUS;
> > + goto out_rpm;
> > + }
> >
> > ret = ttm_bo_vm_reserve(bo, vmf);
> > if (ret)
> > - return ret;
> > + goto out_rpm;
> > +
> > + if (i915_ttm_cpu_maps_iomem(bo->resource))
> > + wakeref =
> > +intel_runtime_pm_get(&to_i915(obj->base.dev)->runtime_pm);
>
> Could maybe move this down a bit. No need to grab the wakeref if the object is
> marked as DONTNEED.
>
> >
> > if (obj->mm.madv != I915_MADV_WILLNEED) {
> > dma_resv_unlock(bo->base.resv);
> > - return VM_FAULT_SIGBUS;
> > + ret = VM_FAULT_SIGBUS;
> > + goto out_rpm;
> > }
> >
> > if (!i915_ttm_resource_mappable(bo->resource)) { @@ -1023,7 +1038,8
> > @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
> > if (err) {
> > drm_dbg(dev, "Unable to make resource CPU
> accessible\n");
> > dma_resv_unlock(bo->base.resv);
> > - return VM_FAULT_SIGBUS;
> > + ret = VM_FAULT_SIGBUS;
> > + goto out_rpm;
> > }
> > }
> >
> > @@ -1034,12 +1050,30 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
> *vmf)
> > } else {
> > ret = ttm_bo_vm_dummy_page(vmf, vmf->vma-
> >vm_page_prot);
> > }
> > +
> > if (ret == VM_FAULT_RETRY && !(vmf->flags &
> FAULT_FLAG_RETRY_NOWAIT))
> > - return ret;
> > + goto out_rpm;
> > +
> > + /* ttm_bo_vm_reserve() already has dma_resv_lock */
> > + if (ret == VM_FAULT_NOPAGE && wakeref && !obj->userfault_count) {
> > + obj->userfault_count = 1;
> > + mutex_lock(&to_gt(to_i915(obj->base.dev))-
> >lmem_userfault_lock);
> > + list_add(&obj->userfault_link, &to_gt(to_i915(obj->base.dev))-
> >lmem_userfault_list);
> > + mutex_unlock(&to_gt(to_i915(obj->base.dev))-
> >lmem_userfault_lock);
> > + }
> > +
> > + if (wakeref && CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)
> > + intel_wakeref_auto(&to_gt(to_i915(obj->base.dev))-
> >userfault_wakeref,
> > +
> > +msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
> >
> > i915_ttm_adjust_lru(obj);
> >
> > dma_resv_unlock(bo->base.resv);
> > +
> > +out_rpm:
> > + if (wakeref)
> > + intel_runtime_pm_put(&to_i915(obj->base.dev)->runtime_pm,
> wakeref);
> > +
> > return ret;
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> > b/drivers/gpu/drm/i915/gt/intel_gt.c
> > index 1ce344cfa827..ee9ee815f505 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > @@ -39,6 +39,8 @@ static void __intel_gt_init_early(struct intel_gt *gt)
> > {
> > spin_lock_init(>->irq_lock);
> >
> > + INIT_LIST_HEAD(>->lmem_userfault_list);
> > + mutex_init(>->lmem_userfault_lock);
> > INIT_LIST_HEAD(>->closed_vma);
> > spin_lock_init(>->closed_lock);
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > index e6a662f9d7c0..a2d87e742161 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_types.h
> > @@ -132,6 +132,9 @@ struct intel_gt {
> > struct intel_wakeref wakeref;
> > atomic_t user_wakeref;
> >
> > + struct mutex lmem_userfault_lock; /* Protects access to usefault list */
> > + struct list_head lmem_userfault_list;
>
> Probably needs a big comment explaining how this all works, since it seems quite
> tricky.
>
> "If we are outside of the runtime suspend path, access to @lmem_userfault_list
> requires always first grabbing the runtime pm, to ensure we can't race against
> runtime suspend removing items. Once we have that we also need to grab
> @lmem_userfault_lock, at which point we have exclusive access. The runtime
> suspend path is special since it doens't really hold any locks, but instead has
> exlusive access by virtue of all other accesses requiring holding the runtime pm."
>
> Also according to that we are then missing holding lmem_userfault_lock in
> i915_gem_object_release_mmap_offset(), for the object destruction case. We
> are only holding the runtime pm, which only saves us from runtime suspend, and
> not some other concurrent user, like a different object destroy or fault touching
> the list.
Sure I will update this comment.
>
> > +
> > struct list_head closed_vma;
> > spinlock_t closed_lock; /* guards the list of closed_vma */
> >
> > diff --git a/drivers/gpu/drm/i915/i915_driver.c
> b/drivers/gpu/drm/i915/i915_driver.c
> > index 1332c70370a6..81699aa505e2 100644
> > --- a/drivers/gpu/drm/i915/i915_driver.c
> > +++ b/drivers/gpu/drm/i915/i915_driver.c
> > @@ -1591,7 +1591,6 @@ static int intel_runtime_suspend(struct device
> *kdev)
> > return -ENODEV;
> >
> > drm_dbg(&dev_priv->drm, "Suspending device\n");
> > -
> > disable_rpm_wakeref_asserts(rpm);
> >
> > /*
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c
> b/drivers/gpu/drm/i915/i915_gem.c
> > index 70f082f7911a..01f23c0e7fec 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -842,6 +842,11 @@ void i915_gem_runtime_suspend(struct
> drm_i915_private *i915)
> > &to_gt(i915)->ggtt->userfault_list,
> userfault_link)
> > __i915_gem_object_release_mmap_gtt(obj);
> >
> > + list_for_each_entry_safe(obj, on,
> > + &to_gt(i915)->lmem_userfault_list,
> userfault_link) {
> > + __i915_gem_object_release_mmap_offset(obj);
>
> drm_vma_node_unmap(&bo->base.vma_node, bdev->dev_mapping);
>
> I don't think mm.offsets is tracking the ttm node...
Thanks for pointing it, I am surprised in this case how existing implementation of
i915_gem_object_release_mmap_offset (object destruction path)
is releasing the mmap mapping with mmo.offset, do we need to change there as well ?
Thanks,
Anshuman Gupta.
>
> > + }
> > +
> > /*
> > * The fence will be lost when the device powers down. If any were
> > * in use by hardware (i.e. they are pinned), we should not be powering
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-09-12 6:05 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-09-09 11:24 [Intel-gfx] [PATCH v3 0/2] DGFX mmap with rpm Anshuman Gupta
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 1/2] drm/i915: Refactor userfault_wakeref to re-use Anshuman Gupta
2022-09-09 11:24 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/dgfx: Release mmap on rpm suspend Anshuman Gupta
2022-09-09 15:36 ` Matthew Auld
2022-09-12 6:05 ` Gupta, Anshuman
2022-09-09 16:08 ` kernel test robot
2022-09-09 16:22 ` kernel test robot
2022-09-09 16:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DGFX mmap with rpm (rev3) Patchwork
2022-09-09 17:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-09 22:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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