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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths
Date: Wed, 14 Sep 2022 15:04:27 -0700	[thread overview]
Message-ID: <20220914220427.3091448-5-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20220914220427.3091448-1-matthew.d.roper@intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

This, along with the changes already landed in commit 1c66a12ab431
("drm/i915: Handle each GT on init/release and suspend/resume") makes
engines from all GTs actually known to the driver.

To accomplish this we need to sprinkle a lot of for_each_gt calls around
but is otherwise pretty un-eventuful.

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/i915_driver.c |  3 +-
 drivers/gpu/drm/i915/i915_gem.c    | 46 ++++++++++++++++++++++--------
 2 files changed, 36 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index c459eb362c47..9d1fc2477f80 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1661,7 +1661,8 @@ static int intel_runtime_suspend(struct device *kdev)
 
 		intel_runtime_pm_enable_interrupts(dev_priv);
 
-		intel_gt_runtime_resume(to_gt(dev_priv));
+		for_each_gt(gt, dev_priv, i)
+			intel_gt_runtime_resume(gt);
 
 		enable_rpm_wakeref_asserts(rpm);
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f18cc6270b2b..0bf71082f21a 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1128,6 +1128,8 @@ void i915_gem_drain_workqueue(struct drm_i915_private *i915)
 
 int i915_gem_init(struct drm_i915_private *dev_priv)
 {
+	struct intel_gt *gt;
+	unsigned int i;
 	int ret;
 
 	/* We need to fallback to 4K pages if host doesn't support huge gtt. */
@@ -1158,9 +1160,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	 */
 	intel_init_clock_gating(dev_priv);
 
-	ret = intel_gt_init(to_gt(dev_priv));
-	if (ret)
-		goto err_unlock;
+	for_each_gt(gt, dev_priv, i) {
+		ret = intel_gt_init(gt);
+		if (ret)
+			goto err_unlock;
+	}
 
 	return 0;
 
@@ -1173,8 +1177,15 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 err_unlock:
 	i915_gem_drain_workqueue(dev_priv);
 
-	if (ret != -EIO)
-		intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
+	if (ret != -EIO) {
+		for_each_gt(gt, dev_priv, i) {
+			intel_gt_driver_remove(gt);
+			intel_gt_driver_release(gt);
+		}
+
+		for_each_gt(gt, dev_priv, i)
+			intel_uc_cleanup_firmwares(&gt->uc);
+	}
 
 	if (ret == -EIO) {
 		/*
@@ -1182,10 +1193,12 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 		 * as wedged. But we only want to do this when the GPU is angry,
 		 * for all other failure, such as an allocation failure, bail.
 		 */
-		if (!intel_gt_is_wedged(to_gt(dev_priv))) {
-			i915_probe_error(dev_priv,
-					 "Failed to initialize GPU, declaring it wedged!\n");
-			intel_gt_set_wedged(to_gt(dev_priv));
+		for_each_gt(gt, dev_priv, i) {
+			if (!intel_gt_is_wedged(gt)) {
+				i915_probe_error(dev_priv,
+						"Failed to initialize GPU, declaring it wedged!\n");
+				intel_gt_set_wedged(gt);
+			}
 		}
 
 		/* Minimal basic recovery for KMS */
@@ -1213,10 +1226,14 @@ void i915_gem_driver_unregister(struct drm_i915_private *i915)
 
 void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
 {
+	struct intel_gt *gt;
+	unsigned int i;
+
 	intel_wakeref_auto_fini(&to_gt(dev_priv)->userfault_wakeref);
 
 	i915_gem_suspend_late(dev_priv);
-	intel_gt_driver_remove(to_gt(dev_priv));
+	for_each_gt(gt, dev_priv, i)
+		intel_gt_driver_remove(gt);
 	dev_priv->uabi_engines = RB_ROOT;
 
 	/* Flush any outstanding unpin_work. */
@@ -1227,9 +1244,14 @@ void i915_gem_driver_remove(struct drm_i915_private *dev_priv)
 
 void i915_gem_driver_release(struct drm_i915_private *dev_priv)
 {
-	intel_gt_driver_release(to_gt(dev_priv));
+	struct intel_gt *gt;
+	unsigned int i;
+
+	for_each_gt(gt, dev_priv, i)
+		intel_gt_driver_release(gt);
 
-	intel_uc_cleanup_firmwares(&to_gt(dev_priv)->uc);
+	for_each_gt(gt, dev_priv, i)
+		intel_uc_cleanup_firmwares(&gt->uc);
 
 	i915_gem_drain_freed_objects(dev_priv);
 
-- 
2.37.3


  parent reply	other threads:[~2022-09-14 22:05 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-14 22:04 [Intel-gfx] [PATCH 0/4] Further multi-gt handling Matt Roper
2022-09-14 22:04 ` [Intel-gfx] [PATCH 1/4] drm/i915/gt: Cleanup partial engine discovery failures Matt Roper
2022-09-15 10:40   ` Janusz Krzysztofik
2022-09-14 22:04 ` [Intel-gfx] [PATCH 2/4] drm/i915: Make GEM resume all engines Matt Roper
2022-09-15 21:34   ` Andi Shyti
2022-09-14 22:04 ` [Intel-gfx] [PATCH 3/4] drm/i915: Make GEM suspend all GTs Matt Roper
2022-09-15 21:36   ` Andi Shyti
2022-09-14 22:04 ` Matt Roper [this message]
2022-09-15  1:01   ` [Intel-gfx] [PATCH 4/4] drm/i915: Handle all GTs on driver (un)load paths Ceraolo Spurio, Daniele
2022-09-15  2:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Further multi-gt handling Patchwork
2022-09-15  2:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-15 12:25 ` [Intel-gfx] [PATCH 0/4] " Jani Nikula
2022-09-15 21:41   ` Andi Shyti
2022-09-15 23:29   ` Matt Roper
2022-09-15 19:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork

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