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From: Swati Sharma <swati2.sharma@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 0/8] Enable YCbCr420 for VDSC
Date: Fri, 28 Oct 2022 16:49:45 +0530	[thread overview]
Message-ID: <20221028111953.12552-1-swati2.sharma@intel.com> (raw)

This patch series aims to enable the YCbCr420 format
for DSC. Changes are mostly compute params related for
hdmi,dp and dsi along with the addition of new rc_tables
for native_420 and corresponding changes to macros used to
fetch them.

---v2
-adding fields missed for vdsc_cfg [Vandita]
-adding corresponding registers and writing to the [Vandita]

---v3
-adding 11 bit left shift missed in nsl_bpg_offset calculation

---v4
-adding display version check before writing in new pps register

---v5
-added helper to check if sink supports given format with DSC
-added debugfs entry to enforce DSC with YCbCr420 format only

Ankit Nautiyal (2):
  drm/dp_helper: Add helper to check if the sink supports given format
    with DSC
  drm/i915/dp: Check if DSC supports the given output_format

Suraj Kandpal (3):
  drm/i915: Adding the new registers for DSC
  drm/i915: Enable YCbCr420 for VDSC
  drm/i915: Fill in native_420 field

Swati Sharma (3):
  drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420
  drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from
    debugfs
  drm/i915: Code styling fixes

 drivers/gpu/drm/i915/display/icl_dsi.c        |   2 -
 .../drm/i915/display/intel_display_debugfs.c  |  90 ++++++++-
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c       |  34 +++-
 .../gpu/drm/i915/display/intel_qp_tables.c    | 187 ++++++++++++++++--
 .../gpu/drm/i915/display/intel_qp_tables.h    |   4 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c     |  78 +++++++-
 drivers/gpu/drm/i915/i915_reg.h               |  28 +++
 include/drm/display/drm_dp_helper.h           |   6 +
 9 files changed, 404 insertions(+), 26 deletions(-)

-- 
2.25.1


             reply	other threads:[~2022-10-28 11:18 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-28 11:19 Swati Sharma [this message]
2022-10-28 11:19 ` [Intel-gfx] [PATCH 1/8] drm/dp_helper: Add helper to check if the sink supports given format with DSC Swati Sharma
2022-10-28 11:19 ` [Intel-gfx] [PATCH v2 2/8] drm/i915/dp: Check if DSC supports the given output_format Swati Sharma
2022-10-28 11:19 ` [Intel-gfx] [PATCH v4 3/8] drm/i915: Adding the new registers for DSC Swati Sharma
2022-10-28 11:19 ` [Intel-gfx] [PATCH v4 4/8] drm/i915: Enable YCbCr420 for VDSC Swati Sharma
2022-10-28 11:19 ` [Intel-gfx] [PATCH v4 5/8] drm/i915: Fill in native_420 field Swati Sharma
2022-10-28 11:19 ` [Intel-gfx] [PATCH 6/8] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Swati Sharma
2022-10-28 11:19 ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Swati Sharma
2022-10-28 11:19 ` [Intel-gfx] [PATCH 8/8] drm/i915: Code styling fixes Swati Sharma
2022-10-28 13:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC Patchwork
2022-10-28 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-28 14:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-29  2:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2022-11-07  7:39 [Intel-gfx] [PATCH v5 0/8] " Suraj Kandpal
2022-11-07  7:17 Suraj Kandpal
2022-10-14 15:26 [Intel-gfx] [PATCH v4 0/4] " Suraj Kandpal
2022-11-07  7:26 ` [Intel-gfx] [PATCH v5 0/8] " Suraj Kandpal
2022-11-07  7:34 ` Suraj Kandpal

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