From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 08/13] drm/i915: Move the DSB setup/cleaup into the color code
Date: Wed, 23 Nov 2022 17:26:33 +0200 [thread overview]
Message-ID: <20221123152638.20622-9-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20221123152638.20622-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Since the color management code is the only user of the DSB
at the moment move the DSB prepare/cleanup there too. The
code has to anyway make decisions on whether to use the DSB
or not (and how to use it). Also we'll need a place where we
actually generate the DSB command buffer ahead of time rather
than the current situation where it gets generated too late
during the mmio programming of the hardware.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 10 ++++++++
drivers/gpu/drm/i915/display/intel_color.h | 2 ++
drivers/gpu/drm/i915/display/intel_display.c | 25 ++++++++------------
drivers/gpu/drm/i915/display/intel_display.h | 8 +++++++
4 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 5a4f794e1d08..5a8652407f30 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1389,6 +1389,16 @@ void intel_color_commit_arm(const struct intel_crtc_state *crtc_state)
i915->display.funcs.color->color_commit_arm(crtc_state);
}
+void intel_color_prepare_commit(struct intel_crtc_state *crtc_state)
+{
+ intel_dsb_prepare(crtc_state);
+}
+
+void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state)
+{
+ intel_dsb_cleanup(crtc_state);
+}
+
static bool intel_can_preload_luts(const struct intel_crtc_state *new_crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index 1c6b1755f6d2..d620b5b1e2a6 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -17,6 +17,8 @@ void intel_color_init_hooks(struct drm_i915_private *i915);
int intel_color_init(struct drm_i915_private *i915);
void intel_color_crtc_init(struct intel_crtc *crtc);
int intel_color_check(struct intel_crtc_state *crtc_state);
+void intel_color_prepare_commit(struct intel_crtc_state *crtc_state);
+void intel_color_cleanup_commit(struct intel_crtc_state *crtc_state);
void intel_color_commit_noarm(const struct intel_crtc_state *crtc_state);
void intel_color_commit_arm(const struct intel_crtc_state *crtc_state);
void intel_color_load_luts(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 32b257157186..45d7996f5c1a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -93,7 +93,6 @@
#include "intel_dp_link_training.h"
#include "intel_dpio_phy.h"
#include "intel_dpt.h"
-#include "intel_dsb.h"
#include "intel_fbc.h"
#include "intel_fbdev.h"
#include "intel_fdi.h"
@@ -6931,7 +6930,7 @@ static int intel_atomic_prepare_commit(struct intel_atomic_state *state)
for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
if (intel_crtc_needs_color_update(crtc_state))
- intel_dsb_prepare(crtc_state);
+ intel_color_prepare_commit(crtc_state);
}
return 0;
@@ -7382,24 +7381,18 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat
&wait_reset);
}
-static void intel_cleanup_dsbs(struct intel_atomic_state *state)
-{
- struct intel_crtc_state *old_crtc_state, *new_crtc_state;
- struct intel_crtc *crtc;
- int i;
-
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i)
- intel_dsb_cleanup(old_crtc_state);
-}
-
static void intel_atomic_cleanup_work(struct work_struct *work)
{
struct intel_atomic_state *state =
container_of(work, struct intel_atomic_state, base.commit_work);
struct drm_i915_private *i915 = to_i915(state->base.dev);
+ struct intel_crtc_state *old_crtc_state;
+ struct intel_crtc *crtc;
+ int i;
+
+ for_each_old_intel_crtc_in_state(state, crtc, old_crtc_state, i)
+ intel_color_cleanup_commit(old_crtc_state);
- intel_cleanup_dsbs(state);
drm_atomic_helper_cleanup_planes(&i915->drm, &state->base);
drm_atomic_helper_commit_cleanup_done(&state->base);
drm_atomic_state_put(&state->base);
@@ -7590,6 +7583,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
* DSB cleanup is done in cleanup_work aligning with framebuffer
* cleanup. So copy and reset the dsb structure to sync with
* commit_done and later do dsb cleanup in cleanup_work.
+ *
+ * FIXME get rid of this funny new->old swapping
*/
old_crtc_state->dsb = fetch_and_zero(&new_crtc_state->dsb);
}
@@ -7740,7 +7735,7 @@ static int intel_atomic_commit(struct drm_device *dev,
i915_sw_fence_commit(&state->commit_ready);
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
- intel_dsb_cleanup(new_crtc_state);
+ intel_color_cleanup_commit(new_crtc_state);
drm_atomic_helper_cleanup_planes(dev, &state->base);
intel_runtime_pm_put(&dev_priv->runtime_pm, state->wakeref);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 714030136b7f..ef73730f32b0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -440,6 +440,14 @@ enum hpd_pin {
(__i)++) \
for_each_if(plane)
+#define for_each_old_intel_crtc_in_state(__state, crtc, old_crtc_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->base.dev->mode_config.num_crtc && \
+ ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+ (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), 1); \
+ (__i)++) \
+ for_each_if(crtc)
+
#define for_each_new_intel_plane_in_state(__state, plane, new_plane_state, __i) \
for ((__i) = 0; \
(__i) < (__state)->base.dev->mode_config.num_total_plane && \
--
2.37.4
next prev parent reply other threads:[~2022-11-23 15:27 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-23 15:26 [Intel-gfx] [PATCH 00/13] drm/i915: Gamma/DSB prep work Ville Syrjala
2022-11-23 15:26 ` [Intel-gfx] [PATCH 01/13] drm/i915: Shorten GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED a bit Ville Syrjala
2022-12-01 5:40 ` Nautiyal, Ankit K
2022-12-07 5:28 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 02/13] drm/i915: Clean up GAMMA_MODE defines Ville Syrjala
2022-12-01 5:42 ` Nautiyal, Ankit K
2022-11-23 15:26 ` [Intel-gfx] [PATCH 03/13] drm/i915: Define skl+ palette anti-collision bit Ville Syrjala
2022-12-07 5:49 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 04/13] drm/i915: Clean up various indexed LUT registers Ville Syrjala
2022-12-01 5:45 ` Nautiyal, Ankit K
2022-12-07 8:45 ` Shankar, Uma
2022-12-07 10:22 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 05/13] drm/i915: Standardize auto-increment LUT load procedure Ville Syrjala
2022-12-01 5:48 ` Nautiyal, Ankit K
2022-12-07 9:06 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 06/13] drm/i915: Document LUT "max" register precision Ville Syrjala
2022-12-01 5:53 ` Nautiyal, Ankit K
2022-12-07 9:07 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 07/13] drm/i915: Move the DSB->mmio fallback into the LUT code Ville Syrjala
2022-12-01 6:05 ` Nautiyal, Ankit K
2022-12-07 9:15 ` Shankar, Uma
2022-11-23 15:26 ` Ville Syrjala [this message]
2022-12-07 9:29 ` [Intel-gfx] [PATCH 08/13] drm/i915: Move the DSB setup/cleaup into the color code Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 09/13] drm/i915: Make DSB lower level Ville Syrjala
2022-12-01 6:21 ` Nautiyal, Ankit K
2022-12-07 9:44 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 10/13] drm/i915: Disable DSB usage specifically for LUTs Ville Syrjala
2022-12-01 6:24 ` Nautiyal, Ankit K
2022-12-07 9:51 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 11/13] Revert "drm/i915: Disable DSB usage for now" Ville Syrjala
2022-12-01 6:26 ` Nautiyal, Ankit K
2022-12-07 9:53 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 12/13] drm/i915: Use ilk_lut_write*() for all ilk+ gamma modes Ville Syrjala
2022-12-07 10:18 ` Shankar, Uma
2022-11-23 15:26 ` [Intel-gfx] [PATCH 13/13] drm/i915: Do state check for color management changes Ville Syrjala
2022-11-23 18:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma/DSB prep work Patchwork
2022-11-23 18:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-11-23 18:24 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-11-23 18:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20221123152638.20622-9-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox