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From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [PATCH] drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index
Date: Tue, 20 Dec 2022 16:01:05 +0200	[thread overview]
Message-ID: <20221220140105.313333-1-jani.nikula@intel.com> (raw)

Due to copy-paste fail, MIPI_BKLT_EN_1 would always use PPS index 1,
never 0. Fix the sloppiest commit in recent memory.

Fixes: f087cfe6fcff ("drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index 41f025f089d9..2cbc1292ab38 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -430,7 +430,7 @@ static void icl_native_gpio_set_value(struct drm_i915_private *dev_priv,
 		break;
 	case MIPI_BKLT_EN_1:
 	case MIPI_BKLT_EN_2:
-		index = gpio == MIPI_AVDD_EN_1 ? 0 : 1;
+		index = gpio == MIPI_BKLT_EN_1 ? 0 : 1;
 
 		intel_de_rmw(dev_priv, PP_CONTROL(index), EDP_BLC_ENABLE,
 			     value ? EDP_BLC_ENABLE : 0);
-- 
2.34.1


             reply	other threads:[~2022-12-20 14:01 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-20 14:01 Jani Nikula [this message]
2022-12-20 14:42 ` [Intel-gfx] [PATCH] drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index Ville Syrjälä
2022-12-27 15:07   ` Jani Nikula
2022-12-22  2:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index (rev2) Patchwork
2022-12-22  6:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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