From: Suraj Kandpal <suraj.kandpal@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v6 9/9] drm/i915: Code styling fixes
Date: Wed, 11 Jan 2023 11:08:37 +0530 [thread overview]
Message-ID: <20230111053837.1608588-10-suraj.kandpal@intel.com> (raw)
In-Reply-To: <20230111053837.1608588-1-suraj.kandpal@intel.com>
From: Swati Sharma <swati2.sharma@intel.com>
Removed extra newlines and did few styling fixes.
Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 0d4bd9bc6dd0..b35ea3e5465f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1440,7 +1440,6 @@ static ssize_t wm_latency_write(struct file *file, const char __user *ubuf,
return len;
}
-
static ssize_t pri_wm_latency_write(struct file *file, const char __user *ubuf,
size_t len, loff_t *offp)
{
@@ -1790,13 +1789,13 @@ static ssize_t i915_dsc_fec_support_write(struct file *file,
const char __user *ubuf,
size_t len, loff_t *offp)
{
- bool dsc_enable = false;
- int ret;
struct drm_connector *connector =
((struct seq_file *)file->private_data)->private;
struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector));
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ bool dsc_enable = false;
+ int ret;
if (len == 0)
return 0;
@@ -1813,6 +1812,7 @@ static ssize_t i915_dsc_fec_support_write(struct file *file,
intel_dp->force_dsc_en = dsc_enable;
*offp += len;
+
return len;
}
--
2.25.1
next prev parent reply other threads:[~2023-01-11 5:40 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 5:38 [Intel-gfx] [PATCH v6 0/9] Enable YCbCr420 for VDSC Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 1/9] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 2/9] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 3/9] drm/i915: Adding the new registers for DSC Suraj Kandpal
2023-01-13 5:34 ` Kulkarni, Vandita
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 4/9] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2023-01-13 5:28 ` Kulkarni, Vandita
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 5/9] drm/i915: Fill in native_420 field Suraj Kandpal
2023-01-11 13:32 ` Jani Nikula
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 6/9] drm/i915/vdsc: Check slice design requirement Suraj Kandpal
2023-01-11 13:41 ` Jani Nikula
2023-01-11 14:29 ` Kandpal, Suraj
2023-01-11 14:41 ` Jani Nikula
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 7/9] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2023-01-11 5:38 ` [Intel-gfx] [PATCH v6 8/9] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2023-01-11 13:54 ` Jani Nikula
2023-02-07 7:41 ` Swati Sharma
2023-01-11 5:38 ` Suraj Kandpal [this message]
2023-01-11 6:07 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC Patchwork
2023-01-11 12:10 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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