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From: Suraj Kandpal <suraj.kandpal@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v9 2/7] drm/i915/dp: Check if DSC supports the given output_format
Date: Tue,  7 Feb 2023 13:14:11 +0530	[thread overview]
Message-ID: <20230207074416.3209722-3-suraj.kandpal@intel.com> (raw)
In-Reply-To: <20230207074416.3209722-1-suraj.kandpal@intel.com>

From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Go with DSC only if the given output_format is supported.

v2: Use drm helper to get DSC format support for sink.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 30 +++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index cb4fbcd935db..73a7baccd7d0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1494,6 +1494,31 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
 	return drm_dsc_compute_rc_parameters(vdsc_cfg);
 }
 
+static bool intel_dp_dsc_supports_format(struct intel_dp *intel_dp,
+					 enum intel_output_format output_format)
+{
+	u8 sink_dsc_format;
+
+	switch (output_format) {
+	case INTEL_OUTPUT_FORMAT_RGB:
+		sink_dsc_format = DP_DSC_RGB;
+		break;
+	case INTEL_OUTPUT_FORMAT_YCBCR444:
+		sink_dsc_format = DP_DSC_YCbCr444;
+		break;
+	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (min(intel_dp_source_dsc_version_minor(intel_dp),
+			intel_dp_sink_dsc_version_minor(intel_dp)) < 2)
+			return false;
+		sink_dsc_format = DP_DSC_YCbCr420_Native;
+		break;
+	default:
+		return false;
+	}
+
+	return drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, sink_dsc_format);
+}
+
 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 				struct intel_crtc_state *pipe_config,
 				struct drm_connector_state *conn_state,
@@ -1514,11 +1539,16 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 	if (!intel_dp_supports_dsc(intel_dp, pipe_config))
 		return -EINVAL;
 
+	if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
+		return -EINVAL;
+
 	if (compute_pipe_bpp)
 		pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
 	else
 		pipe_bpp = pipe_config->pipe_bpp;
 
+	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
+
 	if (intel_dp->force_dsc_bpc) {
 		pipe_bpp = intel_dp->force_dsc_bpc * 3;
 		drm_dbg_kms(&dev_priv->drm, "Input DSC BPP forced to %d", pipe_bpp);
-- 
2.25.1


  parent reply	other threads:[~2023-02-07  7:45 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-07  7:44 [Intel-gfx] [PATCH v9 0/7] Enable YCbCr420 for VDSC Suraj Kandpal
2023-02-07  7:44 ` [Intel-gfx] [PATCH v9 1/7] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2023-02-20 20:37   ` Shankar, Uma
2023-02-20 20:50     ` Shankar, Uma
2023-02-07  7:44 ` Suraj Kandpal [this message]
2023-02-20 20:49   ` [Intel-gfx] [PATCH v9 2/7] drm/i915/dp: Check if DSC supports the given output_format Shankar, Uma
2023-02-07  7:44 ` [Intel-gfx] [PATCH v9 3/7] drm/i915: Adding the new registers for DSC Suraj Kandpal
2023-02-07  7:44 ` [Intel-gfx] [PATCH v9 4/7] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2023-02-07  7:44 ` [Intel-gfx] [PATCH v9 5/7] drm/i915: Fill in native_420 field Suraj Kandpal
2023-02-14 11:50   ` Jani Nikula
2023-02-15  3:02     ` Kandpal, Suraj
2023-02-15  3:17   ` [Intel-gfx] [PATCH v10 " Suraj Kandpal
2023-02-20 21:37     ` Shankar, Uma
2023-02-21  4:40       ` Kandpal, Suraj
2023-02-21  9:15         ` Shankar, Uma
2023-02-07  7:44 ` [Intel-gfx] [PATCH v9 6/7] drm/i915/vdsc: Check slice design requirement Suraj Kandpal
2023-02-20 21:53   ` Shankar, Uma
2023-02-21  4:20     ` Kandpal, Suraj
2023-02-21  9:11       ` Shankar, Uma
2023-02-07  7:44 ` [Intel-gfx] [PATCH v9 7/7] drm/i915/dsc: Add debugfs entry to validate DSC output formats Suraj Kandpal
2023-02-07  8:35   ` Jani Nikula
2023-02-08 14:16     ` Swati Sharma
2023-02-10 11:31       ` Jani Nikula
2023-02-14 10:51   ` [Intel-gfx] [v10] " Swati Sharma
2023-02-14 10:51     ` Jani Nikula
2023-02-14 11:01       ` Swati Sharma
2023-02-14 11:02   ` [Intel-gfx] [v11] " Swati Sharma
2023-02-20 21:57     ` Shankar, Uma
2023-02-07  8:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable YCbCr420 for VDSC Patchwork
2023-02-07  8:27 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-02-07 13:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-02-14 14:51 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable YCbCr420 for VDSC (rev3) Patchwork
2023-02-14 15:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-02-15  3:11 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-02-15  3:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC (rev4) Patchwork
2023-02-15  4:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-02-15 15:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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