* [Intel-gfx] [PATCH v4 1/3] drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
2023-02-24 9:51 [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
@ 2023-02-24 9:51 ` Thomas Hellström
2023-02-24 9:51 ` [Intel-gfx] [PATCH v4 2/3] drm/amd: Convert amdgpu to use " Thomas Hellström
` (5 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Thomas Hellström @ 2023-02-24 9:51 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, Daniel Vetter, intel-gfx,
Christian König, Dave Airlie, intel-xe
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Suballocating a buffer object is something that is not driver-specific
and useful for many drivers.
Use a slightly modified version of amdgpu_sa.c
v2:
- Style cleanups.
- Added / Modified documentation.
- Use u64 for the sizes and offset. The code dates back to 2012 and
using unsigned int will probably soon come back to bite us.
We can consider size_t as well for better 32-bit efficiency.
- Add and document gfp, intr and align arguments to drm_suballoc_new().
- Use drm_printer for debug output.
v3:
- Remove stale author info (Christian König)
v4:
- Avoid 64-bit integer divisions (kernel test robot <lkp@intel.com>)
- Use size_t rather than u64 for the managed range. (Thomas)
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/Kconfig | 4 +
drivers/gpu/drm/Makefile | 3 +
drivers/gpu/drm/drm_suballoc.c | 457 +++++++++++++++++++++++++++++++++
include/drm/drm_suballoc.h | 108 ++++++++
4 files changed, 572 insertions(+)
create mode 100644 drivers/gpu/drm/drm_suballoc.c
create mode 100644 include/drm/drm_suballoc.h
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index dc0f94f02a82..8fbe57407c60 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -232,6 +232,10 @@ config DRM_GEM_SHMEM_HELPER
help
Choose this if you need the GEM shmem helper functions
+config DRM_SUBALLOC_HELPER
+ tristate
+ depends on DRM
+
config DRM_SCHED
tristate
depends on DRM
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index ab4460fcd63f..1e04d135e866 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -88,6 +88,9 @@ obj-$(CONFIG_DRM_GEM_DMA_HELPER) += drm_dma_helper.o
drm_shmem_helper-y := drm_gem_shmem_helper.o
obj-$(CONFIG_DRM_GEM_SHMEM_HELPER) += drm_shmem_helper.o
+drm_suballoc_helper-y := drm_suballoc.o
+obj-$(CONFIG_DRM_SUBALLOC_HELPER) += drm_suballoc_helper.o
+
drm_vram_helper-y := drm_gem_vram_helper.o
obj-$(CONFIG_DRM_VRAM_HELPER) += drm_vram_helper.o
diff --git a/drivers/gpu/drm/drm_suballoc.c b/drivers/gpu/drm/drm_suballoc.c
new file mode 100644
index 000000000000..38cc7a123819
--- /dev/null
+++ b/drivers/gpu/drm/drm_suballoc.c
@@ -0,0 +1,457 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright 2011 Red Hat Inc.
+ * Copyright 2023 Intel Corporation.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ */
+/* Algorithm:
+ *
+ * We store the last allocated bo in "hole", we always try to allocate
+ * after the last allocated bo. Principle is that in a linear GPU ring
+ * progression was is after last is the oldest bo we allocated and thus
+ * the first one that should no longer be in use by the GPU.
+ *
+ * If it's not the case we skip over the bo after last to the closest
+ * done bo if such one exist. If none exist and we are not asked to
+ * block we report failure to allocate.
+ *
+ * If we are asked to block we wait on all the oldest fence of all
+ * rings. We just wait for any of those fence to complete.
+ */
+
+#include <drm/drm_suballoc.h>
+#include <drm/drm_print.h>
+#include <linux/slab.h>
+#include <linux/sched.h>
+#include <linux/wait.h>
+#include <linux/dma-fence.h>
+
+static void drm_suballoc_remove_locked(struct drm_suballoc *sa);
+static void drm_suballoc_try_free(struct drm_suballoc_manager *sa_manager);
+
+/**
+ * drm_suballoc_manager_init() - Initialise the drm_suballoc_manager
+ * @sa_manager: pointer to the sa_manager
+ * @size: number of bytes we want to suballocate
+ * @align: alignment for each suballocated chunk
+ *
+ * Prepares the suballocation manager for suballocations.
+ */
+void drm_suballoc_manager_init(struct drm_suballoc_manager *sa_manager,
+ size_t size, size_t align)
+{
+ unsigned int i;
+
+ BUILD_BUG_ON(!is_power_of_2(DRM_SUBALLOC_MAX_QUEUES));
+
+ if (!align)
+ align = 1;
+
+ /* alignment must be a power of 2 */
+ if (WARN_ON_ONCE(align & (align - 1)))
+ align = roundup_pow_of_two(align);
+
+ init_waitqueue_head(&sa_manager->wq);
+ sa_manager->size = size;
+ sa_manager->align = align;
+ sa_manager->hole = &sa_manager->olist;
+ INIT_LIST_HEAD(&sa_manager->olist);
+ for (i = 0; i < DRM_SUBALLOC_MAX_QUEUES; ++i)
+ INIT_LIST_HEAD(&sa_manager->flist[i]);
+}
+EXPORT_SYMBOL(drm_suballoc_manager_init);
+
+/**
+ * drm_suballoc_manager_fini() - Destroy the drm_suballoc_manager
+ * @sa_manager: pointer to the sa_manager
+ *
+ * Cleans up the suballocation manager after use. All fences added
+ * with drm_suballoc_free() must be signaled, or we cannot clean up
+ * the entire manager.
+ */
+void drm_suballoc_manager_fini(struct drm_suballoc_manager *sa_manager)
+{
+ struct drm_suballoc *sa, *tmp;
+
+ if (!sa_manager->size)
+ return;
+
+ if (!list_empty(&sa_manager->olist)) {
+ sa_manager->hole = &sa_manager->olist;
+ drm_suballoc_try_free(sa_manager);
+ if (!list_empty(&sa_manager->olist))
+ DRM_ERROR("sa_manager is not empty, clearing anyway\n");
+ }
+ list_for_each_entry_safe(sa, tmp, &sa_manager->olist, olist) {
+ drm_suballoc_remove_locked(sa);
+ }
+
+ sa_manager->size = 0;
+}
+EXPORT_SYMBOL(drm_suballoc_manager_fini);
+
+static void drm_suballoc_remove_locked(struct drm_suballoc *sa)
+{
+ struct drm_suballoc_manager *sa_manager = sa->manager;
+
+ if (sa_manager->hole == &sa->olist)
+ sa_manager->hole = sa->olist.prev;
+
+ list_del_init(&sa->olist);
+ list_del_init(&sa->flist);
+ dma_fence_put(sa->fence);
+ kfree(sa);
+}
+
+static void drm_suballoc_try_free(struct drm_suballoc_manager *sa_manager)
+{
+ struct drm_suballoc *sa, *tmp;
+
+ if (sa_manager->hole->next == &sa_manager->olist)
+ return;
+
+ sa = list_entry(sa_manager->hole->next, struct drm_suballoc, olist);
+ list_for_each_entry_safe_from(sa, tmp, &sa_manager->olist, olist) {
+ if (!sa->fence || !dma_fence_is_signaled(sa->fence))
+ return;
+
+ drm_suballoc_remove_locked(sa);
+ }
+}
+
+static size_t drm_suballoc_hole_soffset(struct drm_suballoc_manager *sa_manager)
+{
+ struct list_head *hole = sa_manager->hole;
+
+ if (hole != &sa_manager->olist)
+ return list_entry(hole, struct drm_suballoc, olist)->eoffset;
+
+ return 0;
+}
+
+static size_t drm_suballoc_hole_eoffset(struct drm_suballoc_manager *sa_manager)
+{
+ struct list_head *hole = sa_manager->hole;
+
+ if (hole->next != &sa_manager->olist)
+ return list_entry(hole->next, struct drm_suballoc, olist)->soffset;
+ return sa_manager->size;
+}
+
+static bool drm_suballoc_try_alloc(struct drm_suballoc_manager *sa_manager,
+ struct drm_suballoc *sa,
+ size_t size, size_t align)
+{
+ size_t soffset, eoffset, wasted;
+
+ soffset = drm_suballoc_hole_soffset(sa_manager);
+ eoffset = drm_suballoc_hole_eoffset(sa_manager);
+ wasted = round_up(soffset, align) - soffset;
+
+ if ((eoffset - soffset) >= (size + wasted)) {
+ soffset += wasted;
+
+ sa->manager = sa_manager;
+ sa->soffset = soffset;
+ sa->eoffset = soffset + size;
+ list_add(&sa->olist, sa_manager->hole);
+ INIT_LIST_HEAD(&sa->flist);
+ sa_manager->hole = &sa->olist;
+ return true;
+ }
+ return false;
+}
+
+static bool __drm_suballoc_event(struct drm_suballoc_manager *sa_manager,
+ size_t size, size_t align)
+{
+ size_t soffset, eoffset, wasted;
+ unsigned int i;
+
+ for (i = 0; i < DRM_SUBALLOC_MAX_QUEUES; ++i)
+ if (!list_empty(&sa_manager->flist[i]))
+ return true;
+
+ soffset = drm_suballoc_hole_soffset(sa_manager);
+ eoffset = drm_suballoc_hole_eoffset(sa_manager);
+ wasted = round_up(soffset, align) - soffset;
+
+ return ((eoffset - soffset) >= (size + wasted));
+}
+
+/**
+ * drm_suballoc_event() - Check if we can stop waiting
+ * @sa_manager: pointer to the sa_manager
+ * @size: number of bytes we want to allocate
+ * @align: alignment we need to match
+ *
+ * Return: true if either there is a fence we can wait for or
+ * enough free memory to satisfy the allocation directly.
+ * false otherwise.
+ */
+static bool drm_suballoc_event(struct drm_suballoc_manager *sa_manager,
+ size_t size, size_t align)
+{
+ bool ret;
+
+ spin_lock(&sa_manager->wq.lock);
+ ret = __drm_suballoc_event(sa_manager, size, align);
+ spin_unlock(&sa_manager->wq.lock);
+ return ret;
+}
+
+static bool drm_suballoc_next_hole(struct drm_suballoc_manager *sa_manager,
+ struct dma_fence **fences,
+ unsigned int *tries)
+{
+ struct drm_suballoc *best_bo = NULL;
+ unsigned int i, best_idx;
+ size_t soffset, best, tmp;
+
+ /* if hole points to the end of the buffer */
+ if (sa_manager->hole->next == &sa_manager->olist) {
+ /* try again with its beginning */
+ sa_manager->hole = &sa_manager->olist;
+ return true;
+ }
+
+ soffset = drm_suballoc_hole_soffset(sa_manager);
+ /* to handle wrap around we add sa_manager->size */
+ best = sa_manager->size * 2;
+ /* go over all fence list and try to find the closest sa
+ * of the current last
+ */
+ for (i = 0; i < DRM_SUBALLOC_MAX_QUEUES; ++i) {
+ struct drm_suballoc *sa;
+
+ fences[i] = NULL;
+
+ if (list_empty(&sa_manager->flist[i]))
+ continue;
+
+ sa = list_first_entry(&sa_manager->flist[i],
+ struct drm_suballoc, flist);
+
+ if (!dma_fence_is_signaled(sa->fence)) {
+ fences[i] = sa->fence;
+ continue;
+ }
+
+ /* limit the number of tries each freelist gets */
+ if (tries[i] > 2)
+ continue;
+
+ tmp = sa->soffset;
+ if (tmp < soffset) {
+ /* wrap around, pretend it's after */
+ tmp += sa_manager->size;
+ }
+ tmp -= soffset;
+ if (tmp < best) {
+ /* this sa bo is the closest one */
+ best = tmp;
+ best_idx = i;
+ best_bo = sa;
+ }
+ }
+
+ if (best_bo) {
+ ++tries[best_idx];
+ sa_manager->hole = best_bo->olist.prev;
+
+ /*
+ * We know that this one is signaled,
+ * so it's safe to remove it.
+ */
+ drm_suballoc_remove_locked(best_bo);
+ return true;
+ }
+ return false;
+}
+
+/**
+ * drm_suballoc_new() - Make a suballocation.
+ * @sa_manager: pointer to the sa_manager
+ * @size: number of bytes we want to suballocate.
+ * @gfp: gfp flags used for memory allocation. Typically GFP_KERNEL but
+ * the argument is provided for suballocations from reclaim context or
+ * where the caller wants to avoid pipelining rather than wait for
+ * reclaim.
+ * @intr: Whether to perform waits interruptible. This should typically
+ * always be true, unless the caller needs to propagate a
+ * non-interruptible context from above layers.
+ * @align: Alignment. Must not exceed the default manager alignment.
+ * If @align is zero, then the manager alignment is used.
+ *
+ * Try to make a suballocation of size @size, which will be rounded
+ * up to the alignment specified in specified in drm_suballoc_manager_init().
+ *
+ * Return: a new suballocated bo, or an ERR_PTR.
+ */
+struct drm_suballoc *
+drm_suballoc_new(struct drm_suballoc_manager *sa_manager, size_t size,
+ gfp_t gfp, bool intr, size_t align)
+{
+ struct dma_fence *fences[DRM_SUBALLOC_MAX_QUEUES];
+ unsigned int tries[DRM_SUBALLOC_MAX_QUEUES];
+ unsigned int count;
+ int i, r;
+ struct drm_suballoc *sa;
+
+ if (WARN_ON_ONCE(align > sa_manager->align))
+ return ERR_PTR(-EINVAL);
+ if (WARN_ON_ONCE(size > sa_manager->size || !size))
+ return ERR_PTR(-EINVAL);
+
+ if (!align)
+ align = sa_manager->align;
+
+ sa = kmalloc(sizeof(*sa), gfp);
+ if (!sa)
+ return ERR_PTR(-ENOMEM);
+ sa->manager = sa_manager;
+ sa->fence = NULL;
+ INIT_LIST_HEAD(&sa->olist);
+ INIT_LIST_HEAD(&sa->flist);
+
+ spin_lock(&sa_manager->wq.lock);
+ do {
+ for (i = 0; i < DRM_SUBALLOC_MAX_QUEUES; ++i)
+ tries[i] = 0;
+
+ do {
+ drm_suballoc_try_free(sa_manager);
+
+ if (drm_suballoc_try_alloc(sa_manager, sa,
+ size, align)) {
+ spin_unlock(&sa_manager->wq.lock);
+ return sa;
+ }
+
+ /* see if we can skip over some allocations */
+ } while (drm_suballoc_next_hole(sa_manager, fences, tries));
+
+ for (i = 0, count = 0; i < DRM_SUBALLOC_MAX_QUEUES; ++i)
+ if (fences[i])
+ fences[count++] = dma_fence_get(fences[i]);
+
+ if (count) {
+ long t;
+
+ spin_unlock(&sa_manager->wq.lock);
+ t = dma_fence_wait_any_timeout(fences, count, intr,
+ MAX_SCHEDULE_TIMEOUT,
+ NULL);
+ for (i = 0; i < count; ++i)
+ dma_fence_put(fences[i]);
+
+ r = (t > 0) ? 0 : t;
+ spin_lock(&sa_manager->wq.lock);
+ } else if (intr) {
+ /* if we have nothing to wait for block */
+ r = wait_event_interruptible_locked
+ (sa_manager->wq,
+ __drm_suballoc_event(sa_manager, size, align));
+ } else {
+ spin_unlock(&sa_manager->wq.lock);
+ wait_event(sa_manager->wq,
+ drm_suballoc_event(sa_manager, size, align));
+ r = 0;
+ spin_lock(&sa_manager->wq.lock);
+ }
+ } while (!r);
+
+ spin_unlock(&sa_manager->wq.lock);
+ kfree(sa);
+ return ERR_PTR(r);
+}
+EXPORT_SYMBOL(drm_suballoc_new);
+
+/**
+ * drm_suballoc_free - Free a suballocation
+ * @suballoc: pointer to the suballocation
+ * @fence: fence that signals when suballocation is idle
+ *
+ * Free the suballocation. The suballocation can be re-used after @fence signals.
+ */
+void drm_suballoc_free(struct drm_suballoc *suballoc,
+ struct dma_fence *fence)
+{
+ struct drm_suballoc_manager *sa_manager;
+
+ if (!suballoc)
+ return;
+
+ sa_manager = suballoc->manager;
+
+ spin_lock(&sa_manager->wq.lock);
+ if (fence && !dma_fence_is_signaled(fence)) {
+ u32 idx;
+
+ suballoc->fence = dma_fence_get(fence);
+ idx = fence->context & (DRM_SUBALLOC_MAX_QUEUES - 1);
+ list_add_tail(&suballoc->flist, &sa_manager->flist[idx]);
+ } else {
+ drm_suballoc_remove_locked(suballoc);
+ }
+ wake_up_all_locked(&sa_manager->wq);
+ spin_unlock(&sa_manager->wq.lock);
+}
+EXPORT_SYMBOL(drm_suballoc_free);
+
+#ifdef CONFIG_DEBUG_FS
+void drm_suballoc_dump_debug_info(struct drm_suballoc_manager *sa_manager,
+ struct drm_printer *p,
+ unsigned long long suballoc_base)
+{
+ struct drm_suballoc *i;
+
+ spin_lock(&sa_manager->wq.lock);
+ list_for_each_entry(i, &sa_manager->olist, olist) {
+ unsigned long long soffset = i->soffset;
+ unsigned long long eoffset = i->eoffset;
+
+ if (&i->olist == sa_manager->hole)
+ drm_puts(p, ">");
+ else
+ drm_puts(p, " ");
+
+ drm_printf(p, "[0x%010llx 0x%010llx] size %8lld",
+ suballoc_base + soffset, suballoc_base + eoffset,
+ eoffset - soffset);
+
+ if (i->fence)
+ drm_printf(p, " protected by 0x%016llx on context %llu",
+ (unsigned long long)i->fence->seqno,
+ (unsigned long long)i->fence->context);
+
+ drm_puts(p, "\n");
+ }
+ spin_unlock(&sa_manager->wq.lock);
+}
+EXPORT_SYMBOL(drm_suballoc_dump_debug_info);
+#endif
+MODULE_AUTHOR("Multiple");
+MODULE_DESCRIPTION("Range suballocator helper");
+MODULE_LICENSE("Dual MIT/GPL");
diff --git a/include/drm/drm_suballoc.h b/include/drm/drm_suballoc.h
new file mode 100644
index 000000000000..c2188bb0b157
--- /dev/null
+++ b/include/drm/drm_suballoc.h
@@ -0,0 +1,108 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/*
+ * Copyright 2011 Red Hat Inc.
+ * Copyright © 2022 Intel Corporation
+ */
+#ifndef _DRM_SUBALLOC_H_
+#define _DRM_SUBALLOC_H_
+
+#include <drm/drm_mm.h>
+
+#include <linux/dma-fence.h>
+#include <linux/types.h>
+
+#define DRM_SUBALLOC_MAX_QUEUES 32
+/**
+ * struct drm_suballoc_manager - fenced range allocations
+ * @wq: Wait queue for sleeping allocations on contention.
+ * @hole: Pointer to first hole node.
+ * @olist: List of allocated ranges.
+ * @flist: Array[fence context hash] of queues of fenced allocated ranges.
+ * @size: Size of the managed range.
+ * @align: Default alignment for the managed range.
+ */
+struct drm_suballoc_manager {
+ wait_queue_head_t wq;
+ struct list_head *hole;
+ struct list_head olist;
+ struct list_head flist[DRM_SUBALLOC_MAX_QUEUES];
+ size_t size;
+ size_t align;
+};
+
+/**
+ * struct drm_suballoc - Sub-allocated range
+ * @olist: List link for list of allocated ranges.
+ * @flist: List linkk for the manager fenced allocated ranges queues.
+ * @manager: The drm_suballoc_manager.
+ * @soffset: Start offset.
+ * @eoffset: End offset + 1 so that @eoffset - @soffset = size.
+ * @dma_fence: The fence protecting the allocation.
+ */
+struct drm_suballoc {
+ struct list_head olist;
+ struct list_head flist;
+ struct drm_suballoc_manager *manager;
+ size_t soffset;
+ size_t eoffset;
+ struct dma_fence *fence;
+};
+
+void drm_suballoc_manager_init(struct drm_suballoc_manager *sa_manager,
+ size_t size, size_t align);
+
+void drm_suballoc_manager_fini(struct drm_suballoc_manager *sa_manager);
+
+struct drm_suballoc *
+drm_suballoc_new(struct drm_suballoc_manager *sa_manager, size_t size,
+ gfp_t gfp, bool intr, size_t align);
+
+void drm_suballoc_free(struct drm_suballoc *sa, struct dma_fence *fence);
+
+/**
+ * drm_suballoc_soffset - Range start.
+ * @sa: The struct drm_suballoc.
+ *
+ * Return: The start of the allocated range.
+ */
+static inline size_t drm_suballoc_soffset(struct drm_suballoc *sa)
+{
+ return sa->soffset;
+}
+
+/**
+ * drm_suballoc_eoffset - Range end.
+ * @sa: The struct drm_suballoc.
+ *
+ * Return: The end of the allocated range + 1.
+ */
+static inline size_t drm_suballoc_eoffset(struct drm_suballoc *sa)
+{
+ return sa->eoffset;
+}
+
+/**
+ * drm_suballoc_size - Range size.
+ * @sa: The struct drm_suballoc.
+ *
+ * Return: The size of the allocated range.
+ */
+static inline size_t drm_suballoc_size(struct drm_suballoc *sa)
+{
+ return sa->eoffset - sa->soffset;
+}
+
+#ifdef CONFIG_DEBUG_FS
+void drm_suballoc_dump_debug_info(struct drm_suballoc_manager *sa_manager,
+ struct drm_printer *p,
+ unsigned long long suballoc_base);
+#else
+static inline void
+drm_suballoc_dump_debug_info(struct drm_suballoc_manager *sa_manager,
+ struct drm_printer *p,
+ unsigned long long suballoc_base)
+{ }
+
+#endif
+
+#endif /* _DRM_SUBALLOC_H_ */
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [Intel-gfx] [PATCH v4 2/3] drm/amd: Convert amdgpu to use suballocation helper.
2023-02-24 9:51 [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
2023-02-24 9:51 ` [Intel-gfx] [PATCH v4 1/3] drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper Thomas Hellström
@ 2023-02-24 9:51 ` Thomas Hellström
2023-02-24 9:51 ` [Intel-gfx] [PATCH v4 3/3] drm/radeon: Use the drm suballocation manager implementation Thomas Hellström
` (4 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Thomas Hellström @ 2023-02-24 9:51 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, Daniel Vetter, intel-gfx,
Christian König, Dave Airlie, intel-xe
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Now that we have a generic suballocation helper, Use it in amdgpu.
For lines that get moved or changed, also fix up pre-existing style issues.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/amd/amdgpu/Kconfig | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 23 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 324 ++-------------------
6 files changed, 45 insertions(+), 337 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/Kconfig b/drivers/gpu/drm/amd/amdgpu/Kconfig
index 5341b6b242c3..0ed12171450b 100644
--- a/drivers/gpu/drm/amd/amdgpu/Kconfig
+++ b/drivers/gpu/drm/amd/amdgpu/Kconfig
@@ -18,6 +18,7 @@ config DRM_AMDGPU
select BACKLIGHT_CLASS_DEVICE
select INTERVAL_TREE
select DRM_BUDDY
+ select DRM_SUBALLOC_HELPER
# amdgpu depends on ACPI_VIDEO when ACPI is enabled, for select to work
# ACPI_VIDEO's dependencies must also be selected.
select INPUT if ACPI
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 164141bc8b4a..dda88090f044 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -424,29 +424,11 @@ struct amdgpu_clock {
* alignment).
*/
-#define AMDGPU_SA_NUM_FENCE_LISTS 32
-
struct amdgpu_sa_manager {
- wait_queue_head_t wq;
- struct amdgpu_bo *bo;
- struct list_head *hole;
- struct list_head flist[AMDGPU_SA_NUM_FENCE_LISTS];
- struct list_head olist;
- unsigned size;
- uint64_t gpu_addr;
- void *cpu_ptr;
- uint32_t domain;
- uint32_t align;
-};
-
-/* sub-allocation buffer */
-struct amdgpu_sa_bo {
- struct list_head olist;
- struct list_head flist;
- struct amdgpu_sa_manager *manager;
- unsigned soffset;
- unsigned eoffset;
- struct dma_fence *fence;
+ struct drm_suballoc_manager base;
+ struct amdgpu_bo *bo;
+ uint64_t gpu_addr;
+ void *cpu_ptr;
};
int amdgpu_fence_slab_init(void);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index bcccc348dbe2..df7eb0b7c4b9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -69,7 +69,7 @@ int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
if (size) {
r = amdgpu_sa_bo_new(&adev->ib_pools[pool_type],
- &ib->sa_bo, size, 256);
+ &ib->sa_bo, size);
if (r) {
dev_err(adev->dev, "failed to get a new IB (%d)\n", r);
return r;
@@ -309,8 +309,7 @@ int amdgpu_ib_pool_init(struct amdgpu_device *adev)
for (i = 0; i < AMDGPU_IB_POOL_MAX; i++) {
r = amdgpu_sa_bo_manager_init(adev, &adev->ib_pools[i],
- AMDGPU_IB_POOL_SIZE,
- AMDGPU_GPU_PAGE_SIZE,
+ AMDGPU_IB_POOL_SIZE, 256,
AMDGPU_GEM_DOMAIN_GTT);
if (r)
goto error;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
index 93207badf83f..5a85726ce853 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
@@ -336,15 +336,22 @@ uint32_t amdgpu_bo_get_preferred_domain(struct amdgpu_device *adev,
/*
* sub allocation
*/
+static inline struct amdgpu_sa_manager *
+to_amdgpu_sa_manager(struct drm_suballoc_manager *manager)
+{
+ return container_of(manager, struct amdgpu_sa_manager, base);
+}
-static inline uint64_t amdgpu_sa_bo_gpu_addr(struct amdgpu_sa_bo *sa_bo)
+static inline uint64_t amdgpu_sa_bo_gpu_addr(struct drm_suballoc *sa_bo)
{
- return sa_bo->manager->gpu_addr + sa_bo->soffset;
+ return to_amdgpu_sa_manager(sa_bo->manager)->gpu_addr +
+ drm_suballoc_soffset(sa_bo);
}
-static inline void * amdgpu_sa_bo_cpu_addr(struct amdgpu_sa_bo *sa_bo)
+static inline void *amdgpu_sa_bo_cpu_addr(struct drm_suballoc *sa_bo)
{
- return sa_bo->manager->cpu_ptr + sa_bo->soffset;
+ return to_amdgpu_sa_manager(sa_bo->manager)->cpu_ptr +
+ drm_suballoc_soffset(sa_bo);
}
int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
@@ -355,11 +362,11 @@ void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev,
struct amdgpu_sa_manager *sa_manager);
int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
- struct amdgpu_sa_bo **sa_bo,
- unsigned size, unsigned align);
+ struct drm_suballoc **sa_bo,
+ unsigned int size);
void amdgpu_sa_bo_free(struct amdgpu_device *adev,
- struct amdgpu_sa_bo **sa_bo,
- struct dma_fence *fence);
+ struct drm_suballoc **sa_bo,
+ struct dma_fence *fence);
#if defined(CONFIG_DEBUG_FS)
void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
struct seq_file *m);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 3989e755a5b4..018f36b10de8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -27,6 +27,7 @@
#include <drm/amdgpu_drm.h>
#include <drm/gpu_scheduler.h>
#include <drm/drm_print.h>
+#include <drm/drm_suballoc.h>
struct amdgpu_device;
struct amdgpu_ring;
@@ -92,7 +93,7 @@ enum amdgpu_ib_pool_type {
};
struct amdgpu_ib {
- struct amdgpu_sa_bo *sa_bo;
+ struct drm_suballoc *sa_bo;
uint32_t length_dw;
uint64_t gpu_addr;
uint32_t *ptr;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
index 524d10b21041..c6b4337eb20c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
@@ -44,327 +44,63 @@
#include "amdgpu.h"
-static void amdgpu_sa_bo_remove_locked(struct amdgpu_sa_bo *sa_bo);
-static void amdgpu_sa_bo_try_free(struct amdgpu_sa_manager *sa_manager);
-
int amdgpu_sa_bo_manager_init(struct amdgpu_device *adev,
struct amdgpu_sa_manager *sa_manager,
- unsigned size, u32 align, u32 domain)
+ unsigned int size, u32 suballoc_align, u32 domain)
{
- int i, r;
-
- init_waitqueue_head(&sa_manager->wq);
- sa_manager->bo = NULL;
- sa_manager->size = size;
- sa_manager->domain = domain;
- sa_manager->align = align;
- sa_manager->hole = &sa_manager->olist;
- INIT_LIST_HEAD(&sa_manager->olist);
- for (i = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i)
- INIT_LIST_HEAD(&sa_manager->flist[i]);
+ int r;
- r = amdgpu_bo_create_kernel(adev, size, align, domain, &sa_manager->bo,
- &sa_manager->gpu_addr, &sa_manager->cpu_ptr);
+ r = amdgpu_bo_create_kernel(adev, size, AMDGPU_GPU_PAGE_SIZE, domain,
+ &sa_manager->bo, &sa_manager->gpu_addr,
+ &sa_manager->cpu_ptr);
if (r) {
dev_err(adev->dev, "(%d) failed to allocate bo for manager\n", r);
return r;
}
- memset(sa_manager->cpu_ptr, 0, sa_manager->size);
+ memset(sa_manager->cpu_ptr, 0, size);
+ drm_suballoc_manager_init(&sa_manager->base, size, suballoc_align);
return r;
}
void amdgpu_sa_bo_manager_fini(struct amdgpu_device *adev,
struct amdgpu_sa_manager *sa_manager)
{
- struct amdgpu_sa_bo *sa_bo, *tmp;
-
if (sa_manager->bo == NULL) {
dev_err(adev->dev, "no bo for sa manager\n");
return;
}
- if (!list_empty(&sa_manager->olist)) {
- sa_manager->hole = &sa_manager->olist,
- amdgpu_sa_bo_try_free(sa_manager);
- if (!list_empty(&sa_manager->olist)) {
- dev_err(adev->dev, "sa_manager is not empty, clearing anyway\n");
- }
- }
- list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
- amdgpu_sa_bo_remove_locked(sa_bo);
- }
+ drm_suballoc_manager_fini(&sa_manager->base);
amdgpu_bo_free_kernel(&sa_manager->bo, &sa_manager->gpu_addr, &sa_manager->cpu_ptr);
- sa_manager->size = 0;
}
-static void amdgpu_sa_bo_remove_locked(struct amdgpu_sa_bo *sa_bo)
-{
- struct amdgpu_sa_manager *sa_manager = sa_bo->manager;
- if (sa_manager->hole == &sa_bo->olist) {
- sa_manager->hole = sa_bo->olist.prev;
- }
- list_del_init(&sa_bo->olist);
- list_del_init(&sa_bo->flist);
- dma_fence_put(sa_bo->fence);
- kfree(sa_bo);
-}
-
-static void amdgpu_sa_bo_try_free(struct amdgpu_sa_manager *sa_manager)
+int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
+ struct drm_suballoc **sa_bo,
+ unsigned int size)
{
- struct amdgpu_sa_bo *sa_bo, *tmp;
+ struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,
+ GFP_KERNEL, true, 0);
- if (sa_manager->hole->next == &sa_manager->olist)
- return;
+ if (IS_ERR(sa)) {
+ *sa_bo = NULL;
- sa_bo = list_entry(sa_manager->hole->next, struct amdgpu_sa_bo, olist);
- list_for_each_entry_safe_from(sa_bo, tmp, &sa_manager->olist, olist) {
- if (sa_bo->fence == NULL ||
- !dma_fence_is_signaled(sa_bo->fence)) {
- return;
- }
- amdgpu_sa_bo_remove_locked(sa_bo);
+ return PTR_ERR(sa);
}
-}
-static inline unsigned amdgpu_sa_bo_hole_soffset(struct amdgpu_sa_manager *sa_manager)
-{
- struct list_head *hole = sa_manager->hole;
-
- if (hole != &sa_manager->olist) {
- return list_entry(hole, struct amdgpu_sa_bo, olist)->eoffset;
- }
+ *sa_bo = sa;
return 0;
}
-static inline unsigned amdgpu_sa_bo_hole_eoffset(struct amdgpu_sa_manager *sa_manager)
-{
- struct list_head *hole = sa_manager->hole;
-
- if (hole->next != &sa_manager->olist) {
- return list_entry(hole->next, struct amdgpu_sa_bo, olist)->soffset;
- }
- return sa_manager->size;
-}
-
-static bool amdgpu_sa_bo_try_alloc(struct amdgpu_sa_manager *sa_manager,
- struct amdgpu_sa_bo *sa_bo,
- unsigned size, unsigned align)
-{
- unsigned soffset, eoffset, wasted;
-
- soffset = amdgpu_sa_bo_hole_soffset(sa_manager);
- eoffset = amdgpu_sa_bo_hole_eoffset(sa_manager);
- wasted = (align - (soffset % align)) % align;
-
- if ((eoffset - soffset) >= (size + wasted)) {
- soffset += wasted;
-
- sa_bo->manager = sa_manager;
- sa_bo->soffset = soffset;
- sa_bo->eoffset = soffset + size;
- list_add(&sa_bo->olist, sa_manager->hole);
- INIT_LIST_HEAD(&sa_bo->flist);
- sa_manager->hole = &sa_bo->olist;
- return true;
- }
- return false;
-}
-
-/**
- * amdgpu_sa_event - Check if we can stop waiting
- *
- * @sa_manager: pointer to the sa_manager
- * @size: number of bytes we want to allocate
- * @align: alignment we need to match
- *
- * Check if either there is a fence we can wait for or
- * enough free memory to satisfy the allocation directly
- */
-static bool amdgpu_sa_event(struct amdgpu_sa_manager *sa_manager,
- unsigned size, unsigned align)
-{
- unsigned soffset, eoffset, wasted;
- int i;
-
- for (i = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i)
- if (!list_empty(&sa_manager->flist[i]))
- return true;
-
- soffset = amdgpu_sa_bo_hole_soffset(sa_manager);
- eoffset = amdgpu_sa_bo_hole_eoffset(sa_manager);
- wasted = (align - (soffset % align)) % align;
-
- if ((eoffset - soffset) >= (size + wasted)) {
- return true;
- }
-
- return false;
-}
-
-static bool amdgpu_sa_bo_next_hole(struct amdgpu_sa_manager *sa_manager,
- struct dma_fence **fences,
- unsigned *tries)
-{
- struct amdgpu_sa_bo *best_bo = NULL;
- unsigned i, soffset, best, tmp;
-
- /* if hole points to the end of the buffer */
- if (sa_manager->hole->next == &sa_manager->olist) {
- /* try again with its beginning */
- sa_manager->hole = &sa_manager->olist;
- return true;
- }
-
- soffset = amdgpu_sa_bo_hole_soffset(sa_manager);
- /* to handle wrap around we add sa_manager->size */
- best = sa_manager->size * 2;
- /* go over all fence list and try to find the closest sa_bo
- * of the current last
- */
- for (i = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i) {
- struct amdgpu_sa_bo *sa_bo;
-
- fences[i] = NULL;
-
- if (list_empty(&sa_manager->flist[i]))
- continue;
-
- sa_bo = list_first_entry(&sa_manager->flist[i],
- struct amdgpu_sa_bo, flist);
-
- if (!dma_fence_is_signaled(sa_bo->fence)) {
- fences[i] = sa_bo->fence;
- continue;
- }
-
- /* limit the number of tries each ring gets */
- if (tries[i] > 2) {
- continue;
- }
-
- tmp = sa_bo->soffset;
- if (tmp < soffset) {
- /* wrap around, pretend it's after */
- tmp += sa_manager->size;
- }
- tmp -= soffset;
- if (tmp < best) {
- /* this sa bo is the closest one */
- best = tmp;
- best_bo = sa_bo;
- }
- }
-
- if (best_bo) {
- uint32_t idx = best_bo->fence->context;
-
- idx %= AMDGPU_SA_NUM_FENCE_LISTS;
- ++tries[idx];
- sa_manager->hole = best_bo->olist.prev;
-
- /* we knew that this one is signaled,
- so it's save to remote it */
- amdgpu_sa_bo_remove_locked(best_bo);
- return true;
- }
- return false;
-}
-
-int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
- struct amdgpu_sa_bo **sa_bo,
- unsigned size, unsigned align)
-{
- struct dma_fence *fences[AMDGPU_SA_NUM_FENCE_LISTS];
- unsigned tries[AMDGPU_SA_NUM_FENCE_LISTS];
- unsigned count;
- int i, r;
- signed long t;
-
- if (WARN_ON_ONCE(align > sa_manager->align))
- return -EINVAL;
-
- if (WARN_ON_ONCE(size > sa_manager->size))
- return -EINVAL;
-
- *sa_bo = kmalloc(sizeof(struct amdgpu_sa_bo), GFP_KERNEL);
- if (!(*sa_bo))
- return -ENOMEM;
- (*sa_bo)->manager = sa_manager;
- (*sa_bo)->fence = NULL;
- INIT_LIST_HEAD(&(*sa_bo)->olist);
- INIT_LIST_HEAD(&(*sa_bo)->flist);
-
- spin_lock(&sa_manager->wq.lock);
- do {
- for (i = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i)
- tries[i] = 0;
-
- do {
- amdgpu_sa_bo_try_free(sa_manager);
-
- if (amdgpu_sa_bo_try_alloc(sa_manager, *sa_bo,
- size, align)) {
- spin_unlock(&sa_manager->wq.lock);
- return 0;
- }
-
- /* see if we can skip over some allocations */
- } while (amdgpu_sa_bo_next_hole(sa_manager, fences, tries));
-
- for (i = 0, count = 0; i < AMDGPU_SA_NUM_FENCE_LISTS; ++i)
- if (fences[i])
- fences[count++] = dma_fence_get(fences[i]);
-
- if (count) {
- spin_unlock(&sa_manager->wq.lock);
- t = dma_fence_wait_any_timeout(fences, count, false,
- MAX_SCHEDULE_TIMEOUT,
- NULL);
- for (i = 0; i < count; ++i)
- dma_fence_put(fences[i]);
-
- r = (t > 0) ? 0 : t;
- spin_lock(&sa_manager->wq.lock);
- } else {
- /* if we have nothing to wait for block */
- r = wait_event_interruptible_locked(
- sa_manager->wq,
- amdgpu_sa_event(sa_manager, size, align)
- );
- }
-
- } while (!r);
-
- spin_unlock(&sa_manager->wq.lock);
- kfree(*sa_bo);
- *sa_bo = NULL;
- return r;
-}
-
-void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct amdgpu_sa_bo **sa_bo,
+void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct drm_suballoc **sa_bo,
struct dma_fence *fence)
{
- struct amdgpu_sa_manager *sa_manager;
-
if (sa_bo == NULL || *sa_bo == NULL) {
return;
}
- sa_manager = (*sa_bo)->manager;
- spin_lock(&sa_manager->wq.lock);
- if (fence && !dma_fence_is_signaled(fence)) {
- uint32_t idx;
-
- (*sa_bo)->fence = dma_fence_get(fence);
- idx = fence->context % AMDGPU_SA_NUM_FENCE_LISTS;
- list_add_tail(&(*sa_bo)->flist, &sa_manager->flist[idx]);
- } else {
- amdgpu_sa_bo_remove_locked(*sa_bo);
- }
- wake_up_all_locked(&sa_manager->wq);
- spin_unlock(&sa_manager->wq.lock);
+ drm_suballoc_free(*sa_bo, fence);
*sa_bo = NULL;
}
@@ -373,26 +109,8 @@ void amdgpu_sa_bo_free(struct amdgpu_device *adev, struct amdgpu_sa_bo **sa_bo,
void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
struct seq_file *m)
{
- struct amdgpu_sa_bo *i;
-
- spin_lock(&sa_manager->wq.lock);
- list_for_each_entry(i, &sa_manager->olist, olist) {
- uint64_t soffset = i->soffset + sa_manager->gpu_addr;
- uint64_t eoffset = i->eoffset + sa_manager->gpu_addr;
- if (&i->olist == sa_manager->hole) {
- seq_printf(m, ">");
- } else {
- seq_printf(m, " ");
- }
- seq_printf(m, "[0x%010llx 0x%010llx] size %8lld",
- soffset, eoffset, eoffset - soffset);
+ struct drm_printer p = drm_seq_file_printer(m);
- if (i->fence)
- seq_printf(m, " protected by 0x%016llx on context %llu",
- i->fence->seqno, i->fence->context);
-
- seq_printf(m, "\n");
- }
- spin_unlock(&sa_manager->wq.lock);
+ drm_suballoc_dump_debug_info(&sa_manager->base, &p, sa_manager->gpu_addr);
}
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [Intel-gfx] [PATCH v4 3/3] drm/radeon: Use the drm suballocation manager implementation.
2023-02-24 9:51 [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
2023-02-24 9:51 ` [Intel-gfx] [PATCH v4 1/3] drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper Thomas Hellström
2023-02-24 9:51 ` [Intel-gfx] [PATCH v4 2/3] drm/amd: Convert amdgpu to use " Thomas Hellström
@ 2023-02-24 9:51 ` Thomas Hellström
2023-02-24 10:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/helpers: Make the suballocation manager drm generic (rev2) Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Thomas Hellström @ 2023-02-24 9:51 UTC (permalink / raw)
To: dri-devel
Cc: Thomas Hellström, Daniel Vetter, intel-gfx,
Christian König, Dave Airlie, intel-xe
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Use the generic suballocation helper for radeon.
v3:
- Select the suballoc helper in Kconfig (Thomas).
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
---
drivers/gpu/drm/radeon/Kconfig | 1 +
drivers/gpu/drm/radeon/radeon.h | 55 +---
drivers/gpu/drm/radeon/radeon_ib.c | 12 +-
drivers/gpu/drm/radeon/radeon_object.h | 25 +-
drivers/gpu/drm/radeon/radeon_sa.c | 316 ++--------------------
drivers/gpu/drm/radeon/radeon_semaphore.c | 4 +-
6 files changed, 57 insertions(+), 356 deletions(-)
diff --git a/drivers/gpu/drm/radeon/Kconfig b/drivers/gpu/drm/radeon/Kconfig
index 62a596d3a891..e19d77d58810 100644
--- a/drivers/gpu/drm/radeon/Kconfig
+++ b/drivers/gpu/drm/radeon/Kconfig
@@ -8,6 +8,7 @@ config DRM_RADEON
select DRM_DISPLAY_DP_HELPER
select DRM_DISPLAY_HELPER
select DRM_KMS_HELPER
+ select DRM_SUBALLOC_HELPER
select DRM_TTM
select DRM_TTM_HELPER
select SND_HDA_COMPONENT if SND_HDA_CORE
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 57e20780a458..d19a4b1c1a8f 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -79,6 +79,7 @@
#include <drm/drm_gem.h>
#include <drm/drm_audio_component.h>
+#include <drm/drm_suballoc.h>
#include "radeon_family.h"
#include "radeon_mode.h"
@@ -511,52 +512,12 @@ struct radeon_bo {
};
#define gem_to_radeon_bo(gobj) container_of((gobj), struct radeon_bo, tbo.base)
-/* sub-allocation manager, it has to be protected by another lock.
- * By conception this is an helper for other part of the driver
- * like the indirect buffer or semaphore, which both have their
- * locking.
- *
- * Principe is simple, we keep a list of sub allocation in offset
- * order (first entry has offset == 0, last entry has the highest
- * offset).
- *
- * When allocating new object we first check if there is room at
- * the end total_size - (last_object_offset + last_object_size) >=
- * alloc_size. If so we allocate new object there.
- *
- * When there is not enough room at the end, we start waiting for
- * each sub object until we reach object_offset+object_size >=
- * alloc_size, this object then become the sub object we return.
- *
- * Alignment can't be bigger than page size.
- *
- * Hole are not considered for allocation to keep things simple.
- * Assumption is that there won't be hole (all object on same
- * alignment).
- */
struct radeon_sa_manager {
- wait_queue_head_t wq;
- struct radeon_bo *bo;
- struct list_head *hole;
- struct list_head flist[RADEON_NUM_RINGS];
- struct list_head olist;
- unsigned size;
- uint64_t gpu_addr;
- void *cpu_ptr;
- uint32_t domain;
- uint32_t align;
-};
-
-struct radeon_sa_bo;
-
-/* sub-allocation buffer */
-struct radeon_sa_bo {
- struct list_head olist;
- struct list_head flist;
- struct radeon_sa_manager *manager;
- unsigned soffset;
- unsigned eoffset;
- struct radeon_fence *fence;
+ struct drm_suballoc_manager base;
+ struct radeon_bo *bo;
+ uint64_t gpu_addr;
+ void *cpu_ptr;
+ u32 domain;
};
/*
@@ -587,7 +548,7 @@ int radeon_mode_dumb_mmap(struct drm_file *filp,
* Semaphores.
*/
struct radeon_semaphore {
- struct radeon_sa_bo *sa_bo;
+ struct drm_suballoc *sa_bo;
signed waiters;
uint64_t gpu_addr;
};
@@ -816,7 +777,7 @@ void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask);
*/
struct radeon_ib {
- struct radeon_sa_bo *sa_bo;
+ struct drm_suballoc *sa_bo;
uint32_t length_dw;
uint64_t gpu_addr;
uint32_t *ptr;
diff --git a/drivers/gpu/drm/radeon/radeon_ib.c b/drivers/gpu/drm/radeon/radeon_ib.c
index 62b116727b4f..6a45a72488f9 100644
--- a/drivers/gpu/drm/radeon/radeon_ib.c
+++ b/drivers/gpu/drm/radeon/radeon_ib.c
@@ -61,7 +61,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
{
int r;
- r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256);
+ r = radeon_sa_bo_new(&rdev->ring_tmp_bo, &ib->sa_bo, size, 256);
if (r) {
dev_err(rdev->dev, "failed to get a new IB (%d)\n", r);
return r;
@@ -77,7 +77,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
/* ib pool is bound at RADEON_VA_IB_OFFSET in virtual address
* space and soffset is the offset inside the pool bo
*/
- ib->gpu_addr = ib->sa_bo->soffset + RADEON_VA_IB_OFFSET;
+ ib->gpu_addr = drm_suballoc_soffset(ib->sa_bo) + RADEON_VA_IB_OFFSET;
} else {
ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo);
}
@@ -97,7 +97,7 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib *ib)
{
radeon_sync_free(rdev, &ib->sync, ib->fence);
- radeon_sa_bo_free(rdev, &ib->sa_bo, ib->fence);
+ radeon_sa_bo_free(&ib->sa_bo, ib->fence);
radeon_fence_unref(&ib->fence);
}
@@ -201,8 +201,7 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
if (rdev->family >= CHIP_BONAIRE) {
r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
- RADEON_IB_POOL_SIZE*64*1024,
- RADEON_GPU_PAGE_SIZE,
+ RADEON_IB_POOL_SIZE*64*1024, 256,
RADEON_GEM_DOMAIN_GTT,
RADEON_GEM_GTT_WC);
} else {
@@ -210,8 +209,7 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
* to the command stream checking
*/
r = radeon_sa_bo_manager_init(rdev, &rdev->ring_tmp_bo,
- RADEON_IB_POOL_SIZE*64*1024,
- RADEON_GPU_PAGE_SIZE,
+ RADEON_IB_POOL_SIZE*64*1024, 256,
RADEON_GEM_DOMAIN_GTT, 0);
}
if (r) {
diff --git a/drivers/gpu/drm/radeon/radeon_object.h b/drivers/gpu/drm/radeon/radeon_object.h
index 0a6ef49e990a..39cc87a59a9a 100644
--- a/drivers/gpu/drm/radeon/radeon_object.h
+++ b/drivers/gpu/drm/radeon/radeon_object.h
@@ -169,15 +169,22 @@ extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
/*
* sub allocation
*/
+static inline struct radeon_sa_manager *
+to_radeon_sa_manager(struct drm_suballoc_manager *manager)
+{
+ return container_of(manager, struct radeon_sa_manager, base);
+}
-static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
+static inline uint64_t radeon_sa_bo_gpu_addr(struct drm_suballoc *sa_bo)
{
- return sa_bo->manager->gpu_addr + sa_bo->soffset;
+ return to_radeon_sa_manager(sa_bo->manager)->gpu_addr +
+ drm_suballoc_soffset(sa_bo);
}
-static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
+static inline void *radeon_sa_bo_cpu_addr(struct drm_suballoc *sa_bo)
{
- return sa_bo->manager->cpu_ptr + sa_bo->soffset;
+ return to_radeon_sa_manager(sa_bo->manager)->cpu_ptr +
+ drm_suballoc_soffset(sa_bo);
}
extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
@@ -190,12 +197,10 @@ extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
struct radeon_sa_manager *sa_manager);
extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
struct radeon_sa_manager *sa_manager);
-extern int radeon_sa_bo_new(struct radeon_device *rdev,
- struct radeon_sa_manager *sa_manager,
- struct radeon_sa_bo **sa_bo,
- unsigned size, unsigned align);
-extern void radeon_sa_bo_free(struct radeon_device *rdev,
- struct radeon_sa_bo **sa_bo,
+extern int radeon_sa_bo_new(struct radeon_sa_manager *sa_manager,
+ struct drm_suballoc **sa_bo,
+ unsigned int size, unsigned int align);
+extern void radeon_sa_bo_free(struct drm_suballoc **sa_bo,
struct radeon_fence *fence);
#if defined(CONFIG_DEBUG_FS)
extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
diff --git a/drivers/gpu/drm/radeon/radeon_sa.c b/drivers/gpu/drm/radeon/radeon_sa.c
index 0981948bd9ed..c87a57c9c592 100644
--- a/drivers/gpu/drm/radeon/radeon_sa.c
+++ b/drivers/gpu/drm/radeon/radeon_sa.c
@@ -44,53 +44,32 @@
#include "radeon.h"
-static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo);
-static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager);
-
int radeon_sa_bo_manager_init(struct radeon_device *rdev,
struct radeon_sa_manager *sa_manager,
- unsigned size, u32 align, u32 domain, u32 flags)
+ unsigned int size, u32 sa_align, u32 domain,
+ u32 flags)
{
- int i, r;
-
- init_waitqueue_head(&sa_manager->wq);
- sa_manager->bo = NULL;
- sa_manager->size = size;
- sa_manager->domain = domain;
- sa_manager->align = align;
- sa_manager->hole = &sa_manager->olist;
- INIT_LIST_HEAD(&sa_manager->olist);
- for (i = 0; i < RADEON_NUM_RINGS; ++i) {
- INIT_LIST_HEAD(&sa_manager->flist[i]);
- }
+ int r;
- r = radeon_bo_create(rdev, size, align, true,
+ r = radeon_bo_create(rdev, size, RADEON_GPU_PAGE_SIZE, true,
domain, flags, NULL, NULL, &sa_manager->bo);
if (r) {
dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r);
return r;
}
+ sa_manager->domain = domain;
+
+ drm_suballoc_manager_init(&sa_manager->base, size, sa_align);
+
return r;
}
void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
struct radeon_sa_manager *sa_manager)
{
- struct radeon_sa_bo *sa_bo, *tmp;
-
- if (!list_empty(&sa_manager->olist)) {
- sa_manager->hole = &sa_manager->olist,
- radeon_sa_bo_try_free(sa_manager);
- if (!list_empty(&sa_manager->olist)) {
- dev_err(rdev->dev, "sa_manager is not empty, clearing anyway\n");
- }
- }
- list_for_each_entry_safe(sa_bo, tmp, &sa_manager->olist, olist) {
- radeon_sa_bo_remove_locked(sa_bo);
- }
+ drm_suballoc_manager_fini(&sa_manager->base);
radeon_bo_unref(&sa_manager->bo);
- sa_manager->size = 0;
}
int radeon_sa_bo_manager_start(struct radeon_device *rdev,
@@ -139,260 +118,34 @@ int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
return r;
}
-static void radeon_sa_bo_remove_locked(struct radeon_sa_bo *sa_bo)
+int radeon_sa_bo_new(struct radeon_sa_manager *sa_manager,
+ struct drm_suballoc **sa_bo,
+ unsigned int size, unsigned int align)
{
- struct radeon_sa_manager *sa_manager = sa_bo->manager;
- if (sa_manager->hole == &sa_bo->olist) {
- sa_manager->hole = sa_bo->olist.prev;
- }
- list_del_init(&sa_bo->olist);
- list_del_init(&sa_bo->flist);
- radeon_fence_unref(&sa_bo->fence);
- kfree(sa_bo);
-}
-
-static void radeon_sa_bo_try_free(struct radeon_sa_manager *sa_manager)
-{
- struct radeon_sa_bo *sa_bo, *tmp;
-
- if (sa_manager->hole->next == &sa_manager->olist)
- return;
+ struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,
+ GFP_KERNEL, true, align);
- sa_bo = list_entry(sa_manager->hole->next, struct radeon_sa_bo, olist);
- list_for_each_entry_safe_from(sa_bo, tmp, &sa_manager->olist, olist) {
- if (sa_bo->fence == NULL || !radeon_fence_signaled(sa_bo->fence)) {
- return;
- }
- radeon_sa_bo_remove_locked(sa_bo);
+ if (IS_ERR(sa)) {
+ *sa_bo = NULL;
+ return PTR_ERR(sa);
}
-}
-static inline unsigned radeon_sa_bo_hole_soffset(struct radeon_sa_manager *sa_manager)
-{
- struct list_head *hole = sa_manager->hole;
-
- if (hole != &sa_manager->olist) {
- return list_entry(hole, struct radeon_sa_bo, olist)->eoffset;
- }
+ *sa_bo = sa;
return 0;
}
-static inline unsigned radeon_sa_bo_hole_eoffset(struct radeon_sa_manager *sa_manager)
-{
- struct list_head *hole = sa_manager->hole;
-
- if (hole->next != &sa_manager->olist) {
- return list_entry(hole->next, struct radeon_sa_bo, olist)->soffset;
- }
- return sa_manager->size;
-}
-
-static bool radeon_sa_bo_try_alloc(struct radeon_sa_manager *sa_manager,
- struct radeon_sa_bo *sa_bo,
- unsigned size, unsigned align)
-{
- unsigned soffset, eoffset, wasted;
-
- soffset = radeon_sa_bo_hole_soffset(sa_manager);
- eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
- wasted = (align - (soffset % align)) % align;
-
- if ((eoffset - soffset) >= (size + wasted)) {
- soffset += wasted;
-
- sa_bo->manager = sa_manager;
- sa_bo->soffset = soffset;
- sa_bo->eoffset = soffset + size;
- list_add(&sa_bo->olist, sa_manager->hole);
- INIT_LIST_HEAD(&sa_bo->flist);
- sa_manager->hole = &sa_bo->olist;
- return true;
- }
- return false;
-}
-
-/**
- * radeon_sa_event - Check if we can stop waiting
- *
- * @sa_manager: pointer to the sa_manager
- * @size: number of bytes we want to allocate
- * @align: alignment we need to match
- *
- * Check if either there is a fence we can wait for or
- * enough free memory to satisfy the allocation directly
- */
-static bool radeon_sa_event(struct radeon_sa_manager *sa_manager,
- unsigned size, unsigned align)
-{
- unsigned soffset, eoffset, wasted;
- int i;
-
- for (i = 0; i < RADEON_NUM_RINGS; ++i) {
- if (!list_empty(&sa_manager->flist[i])) {
- return true;
- }
- }
-
- soffset = radeon_sa_bo_hole_soffset(sa_manager);
- eoffset = radeon_sa_bo_hole_eoffset(sa_manager);
- wasted = (align - (soffset % align)) % align;
-
- if ((eoffset - soffset) >= (size + wasted)) {
- return true;
- }
-
- return false;
-}
-
-static bool radeon_sa_bo_next_hole(struct radeon_sa_manager *sa_manager,
- struct radeon_fence **fences,
- unsigned *tries)
-{
- struct radeon_sa_bo *best_bo = NULL;
- unsigned i, soffset, best, tmp;
-
- /* if hole points to the end of the buffer */
- if (sa_manager->hole->next == &sa_manager->olist) {
- /* try again with its beginning */
- sa_manager->hole = &sa_manager->olist;
- return true;
- }
-
- soffset = radeon_sa_bo_hole_soffset(sa_manager);
- /* to handle wrap around we add sa_manager->size */
- best = sa_manager->size * 2;
- /* go over all fence list and try to find the closest sa_bo
- * of the current last
- */
- for (i = 0; i < RADEON_NUM_RINGS; ++i) {
- struct radeon_sa_bo *sa_bo;
-
- fences[i] = NULL;
-
- if (list_empty(&sa_manager->flist[i])) {
- continue;
- }
-
- sa_bo = list_first_entry(&sa_manager->flist[i],
- struct radeon_sa_bo, flist);
-
- if (!radeon_fence_signaled(sa_bo->fence)) {
- fences[i] = sa_bo->fence;
- continue;
- }
-
- /* limit the number of tries each ring gets */
- if (tries[i] > 2) {
- continue;
- }
-
- tmp = sa_bo->soffset;
- if (tmp < soffset) {
- /* wrap around, pretend it's after */
- tmp += sa_manager->size;
- }
- tmp -= soffset;
- if (tmp < best) {
- /* this sa bo is the closest one */
- best = tmp;
- best_bo = sa_bo;
- }
- }
-
- if (best_bo) {
- ++tries[best_bo->fence->ring];
- sa_manager->hole = best_bo->olist.prev;
-
- /* we knew that this one is signaled,
- so it's save to remote it */
- radeon_sa_bo_remove_locked(best_bo);
- return true;
- }
- return false;
-}
-
-int radeon_sa_bo_new(struct radeon_device *rdev,
- struct radeon_sa_manager *sa_manager,
- struct radeon_sa_bo **sa_bo,
- unsigned size, unsigned align)
-{
- struct radeon_fence *fences[RADEON_NUM_RINGS];
- unsigned tries[RADEON_NUM_RINGS];
- int i, r;
-
- BUG_ON(align > sa_manager->align);
- BUG_ON(size > sa_manager->size);
-
- *sa_bo = kmalloc(sizeof(struct radeon_sa_bo), GFP_KERNEL);
- if ((*sa_bo) == NULL) {
- return -ENOMEM;
- }
- (*sa_bo)->manager = sa_manager;
- (*sa_bo)->fence = NULL;
- INIT_LIST_HEAD(&(*sa_bo)->olist);
- INIT_LIST_HEAD(&(*sa_bo)->flist);
-
- spin_lock(&sa_manager->wq.lock);
- do {
- for (i = 0; i < RADEON_NUM_RINGS; ++i)
- tries[i] = 0;
-
- do {
- radeon_sa_bo_try_free(sa_manager);
-
- if (radeon_sa_bo_try_alloc(sa_manager, *sa_bo,
- size, align)) {
- spin_unlock(&sa_manager->wq.lock);
- return 0;
- }
-
- /* see if we can skip over some allocations */
- } while (radeon_sa_bo_next_hole(sa_manager, fences, tries));
-
- for (i = 0; i < RADEON_NUM_RINGS; ++i)
- radeon_fence_ref(fences[i]);
-
- spin_unlock(&sa_manager->wq.lock);
- r = radeon_fence_wait_any(rdev, fences, false);
- for (i = 0; i < RADEON_NUM_RINGS; ++i)
- radeon_fence_unref(&fences[i]);
- spin_lock(&sa_manager->wq.lock);
- /* if we have nothing to wait for block */
- if (r == -ENOENT) {
- r = wait_event_interruptible_locked(
- sa_manager->wq,
- radeon_sa_event(sa_manager, size, align)
- );
- }
-
- } while (!r);
-
- spin_unlock(&sa_manager->wq.lock);
- kfree(*sa_bo);
- *sa_bo = NULL;
- return r;
-}
-
-void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo,
+void radeon_sa_bo_free(struct drm_suballoc **sa_bo,
struct radeon_fence *fence)
{
- struct radeon_sa_manager *sa_manager;
-
if (sa_bo == NULL || *sa_bo == NULL) {
return;
}
- sa_manager = (*sa_bo)->manager;
- spin_lock(&sa_manager->wq.lock);
- if (fence && !radeon_fence_signaled(fence)) {
- (*sa_bo)->fence = radeon_fence_ref(fence);
- list_add_tail(&(*sa_bo)->flist,
- &sa_manager->flist[fence->ring]);
- } else {
- radeon_sa_bo_remove_locked(*sa_bo);
- }
- wake_up_all_locked(&sa_manager->wq);
- spin_unlock(&sa_manager->wq.lock);
+ if (fence)
+ drm_suballoc_free(*sa_bo, &fence->base);
+ else
+ drm_suballoc_free(*sa_bo, NULL);
+
*sa_bo = NULL;
}
@@ -400,25 +153,8 @@ void radeon_sa_bo_free(struct radeon_device *rdev, struct radeon_sa_bo **sa_bo,
void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
struct seq_file *m)
{
- struct radeon_sa_bo *i;
+ struct drm_printer p = drm_seq_file_printer(m);
- spin_lock(&sa_manager->wq.lock);
- list_for_each_entry(i, &sa_manager->olist, olist) {
- uint64_t soffset = i->soffset + sa_manager->gpu_addr;
- uint64_t eoffset = i->eoffset + sa_manager->gpu_addr;
- if (&i->olist == sa_manager->hole) {
- seq_printf(m, ">");
- } else {
- seq_printf(m, " ");
- }
- seq_printf(m, "[0x%010llx 0x%010llx] size %8lld",
- soffset, eoffset, eoffset - soffset);
- if (i->fence) {
- seq_printf(m, " protected by 0x%016llx on ring %d",
- i->fence->seq, i->fence->ring);
- }
- seq_printf(m, "\n");
- }
- spin_unlock(&sa_manager->wq.lock);
+ drm_suballoc_dump_debug_info(&sa_manager->base, &p, sa_manager->gpu_addr);
}
#endif
diff --git a/drivers/gpu/drm/radeon/radeon_semaphore.c b/drivers/gpu/drm/radeon/radeon_semaphore.c
index 221e59476f64..1f0a9a4ff5ae 100644
--- a/drivers/gpu/drm/radeon/radeon_semaphore.c
+++ b/drivers/gpu/drm/radeon/radeon_semaphore.c
@@ -40,7 +40,7 @@ int radeon_semaphore_create(struct radeon_device *rdev,
if (*semaphore == NULL) {
return -ENOMEM;
}
- r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo,
+ r = radeon_sa_bo_new(&rdev->ring_tmp_bo,
&(*semaphore)->sa_bo, 8, 8);
if (r) {
kfree(*semaphore);
@@ -100,7 +100,7 @@ void radeon_semaphore_free(struct radeon_device *rdev,
dev_err(rdev->dev, "semaphore %p has more waiters than signalers,"
" hardware lockup imminent!\n", *semaphore);
}
- radeon_sa_bo_free(rdev, &(*semaphore)->sa_bo, fence);
+ radeon_sa_bo_free(&(*semaphore)->sa_bo, fence);
kfree(*semaphore);
*semaphore = NULL;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/helpers: Make the suballocation manager drm generic (rev2)
2023-02-24 9:51 [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
` (2 preceding siblings ...)
2023-02-24 9:51 ` [Intel-gfx] [PATCH v4 3/3] drm/radeon: Use the drm suballocation manager implementation Thomas Hellström
@ 2023-02-24 10:23 ` Patchwork
2023-02-24 10:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-02-24 10:23 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-gfx
== Series Details ==
Series: drm/helpers: Make the suballocation manager drm generic (rev2)
URL : https://patchwork.freedesktop.org/series/114299/
State : warning
== Summary ==
Error: dim checkpatch failed
9a396adf2225 drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:66: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#66:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 584 lines checked
32ed88e340b0 drm/amd: Convert amdgpu to use suballocation helper.
-:62: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u64' over 'uint64_t'
#62: FILE: drivers/gpu/drm/amd/amdgpu/amdgpu.h:430:
+ uint64_t gpu_addr;
total: 0 errors, 0 warnings, 1 checks, 487 lines checked
c71372f410ef drm/radeon: Use the drm suballocation manager implementation.
-:95: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u64' over 'uint64_t'
#95: FILE: drivers/gpu/drm/radeon/radeon.h:518:
+ uint64_t gpu_addr;
-:156: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#156: FILE: drivers/gpu/drm/radeon/radeon_ib.c:204:
+ RADEON_IB_POOL_SIZE*64*1024, 256,
^
-:156: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#156: FILE: drivers/gpu/drm/radeon/radeon_ib.c:204:
+ RADEON_IB_POOL_SIZE*64*1024, 256,
^
-:166: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#166: FILE: drivers/gpu/drm/radeon/radeon_ib.c:212:
+ RADEON_IB_POOL_SIZE*64*1024, 256,
^
-:166: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#166: FILE: drivers/gpu/drm/radeon/radeon_ib.c:212:
+ RADEON_IB_POOL_SIZE*64*1024, 256,
^
-:211: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#211: FILE: drivers/gpu/drm/radeon/radeon_object.h:200:
+extern int radeon_sa_bo_new(struct radeon_sa_manager *sa_manager,
-:214: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#214: FILE: drivers/gpu/drm/radeon/radeon_object.h:203:
+extern void radeon_sa_bo_free(struct drm_suballoc **sa_bo,
total: 0 errors, 0 warnings, 7 checks, 551 lines checked
^ permalink raw reply [flat|nested] 12+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/helpers: Make the suballocation manager drm generic (rev2)
2023-02-24 9:51 [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
` (3 preceding siblings ...)
2023-02-24 10:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/helpers: Make the suballocation manager drm generic (rev2) Patchwork
@ 2023-02-24 10:42 ` Patchwork
2023-02-24 11:59 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-02-27 8:11 ` [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-02-24 10:42 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 10508 bytes --]
== Series Details ==
Series: drm/helpers: Make the suballocation manager drm generic (rev2)
URL : https://patchwork.freedesktop.org/series/114299/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12774 -> Patchwork_114299v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/index.html
Participating hosts (38 -> 35)
------------------------------
Additional (1): bat-dg1-6
Missing (4): fi-skl-guc fi-rkl-11600 bat-adls-5 fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_114299v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@smem:
- bat-rpls-1: [PASS][1] -> [ABORT][2] ([i915#6687] / [i915#7978])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_lmem_swapping@random-engines:
- bat-adlp-6: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-adlp-6/igt@gem_lmem_swapping@random-engines.html
* igt@gem_mmap@basic:
- bat-dg1-6: NOTRUN -> [SKIP][4] ([i915#4083])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@gem_mmap@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-dg1-6: NOTRUN -> [SKIP][5] ([i915#4079]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-dg1-6: NOTRUN -> [SKIP][6] ([i915#4077]) +2 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@gem_tiled_fence_blits@basic.html
* igt@i915_pm_backlight@basic-brightness:
- bat-dg1-6: NOTRUN -> [SKIP][7] ([i915#7561])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_pm_rps@basic-api:
- bat-dg1-6: NOTRUN -> [SKIP][8] ([i915#6621])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@i915_pm_rps@basic-api.html
- bat-adlp-6: NOTRUN -> [SKIP][9] ([i915#6621])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-adlp-6/igt@i915_pm_rps@basic-api.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-6: NOTRUN -> [SKIP][10] ([i915#4215])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg1-6: NOTRUN -> [SKIP][11] ([i915#4212]) +7 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-dg1-6: NOTRUN -> [SKIP][12] ([i915#7828]) +8 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- bat-adlp-6: NOTRUN -> [SKIP][13] ([i915#7828])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-adlp-6/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- bat-dg1-6: NOTRUN -> [SKIP][14] ([i915#4103] / [i915#4213]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-6: NOTRUN -> [SKIP][15] ([fdo#109285])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-edp-1:
- bat-rplp-1: [PASS][16] -> [DMESG-WARN][17] ([i915#2867]) +1 similar issue
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/bat-rplp-1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-edp-1.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-rplp-1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-edp-1.html
* igt@kms_psr@sprite_plane_onoff:
- bat-dg1-6: NOTRUN -> [SKIP][18] ([i915#1072] / [i915#4078]) +3 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-dg1-6: NOTRUN -> [SKIP][19] ([i915#3555])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-read:
- bat-adlp-6: NOTRUN -> [SKIP][20] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-adlp-6/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-gtt:
- bat-dg1-6: NOTRUN -> [SKIP][21] ([i915#3708] / [i915#4077]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@basic-read:
- bat-dg1-6: NOTRUN -> [SKIP][22] ([i915#3708]) +3 similar issues
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- bat-adlp-6: NOTRUN -> [SKIP][23] ([fdo#109295] / [i915#3301] / [i915#3708])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-adlp-6/igt@prime_vgem@basic-userptr.html
- bat-dg1-6: NOTRUN -> [SKIP][24] ([i915#3708] / [i915#4873])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg1-6/igt@prime_vgem@basic-userptr.html
#### Possible fixes ####
* igt@i915_pm_rpm@basic-rte:
- bat-adlp-6: [ABORT][25] ([i915#7977]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/bat-adlp-6/igt@i915_pm_rpm@basic-rte.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-adlp-6/igt@i915_pm_rpm@basic-rte.html
* igt@i915_selftest@live@gt_mocs:
- bat-rpls-1: [DMESG-FAIL][27] ([i915#7059]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/bat-rpls-1/igt@i915_selftest@live@gt_mocs.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-rpls-1/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@migrate:
- bat-dg2-11: [DMESG-WARN][29] ([i915#7699]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/bat-dg2-11/igt@i915_selftest@live@migrate.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-dg2-11/igt@i915_selftest@live@migrate.html
#### Warnings ####
* igt@i915_selftest@live@slpc:
- bat-rpls-2: [DMESG-FAIL][31] ([i915#6367] / [i915#7996]) -> [DMESG-FAIL][32] ([i915#6367])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/bat-rpls-2/igt@i915_selftest@live@slpc.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-rpls-2/igt@i915_selftest@live@slpc.html
- bat-rpls-1: [DMESG-FAIL][33] ([i915#6367]) -> [DMESG-FAIL][34] ([i915#6367] / [i915#7996])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/bat-rpls-1/igt@i915_selftest@live@slpc.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/bat-rpls-1/igt@i915_selftest@live@slpc.html
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7977]: https://gitlab.freedesktop.org/drm/intel/issues/7977
[i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
[i915#7996]: https://gitlab.freedesktop.org/drm/intel/issues/7996
Build changes
-------------
* Linux: CI_DRM_12774 -> Patchwork_114299v2
CI-20190529: 20190529
CI_DRM_12774: 51ea055cc2f62af7e9556def2dadb244a6d396c6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7171: 35a09092eabf7e55aeb625720634550a0368dde6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114299v2: 51ea055cc2f62af7e9556def2dadb244a6d396c6 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
e6e73e01a79d drm/radeon: Use the drm suballocation manager implementation.
f0e5561527ee drm/amd: Convert amdgpu to use suballocation helper.
04ed50ec8964 drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/index.html
[-- Attachment #2: Type: text/html, Size: 12576 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/helpers: Make the suballocation manager drm generic (rev2)
2023-02-24 9:51 [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
` (4 preceding siblings ...)
2023-02-24 10:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-02-24 11:59 ` Patchwork
2023-02-27 8:11 ` [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
6 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2023-02-24 11:59 UTC (permalink / raw)
To: Thomas Hellström; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 40980 bytes --]
== Series Details ==
Series: drm/helpers: Make the suballocation manager drm generic (rev2)
URL : https://patchwork.freedesktop.org/series/114299/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12774_full -> Patchwork_114299v2_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_114299v2_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_114299v2_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 10)
------------------------------
Additional (1): shard-tglu-9
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114299v2_full:
### IGT changes ###
#### Possible regressions ####
* igt@perf_pmu@cpu-hotplug:
- shard-glk: [PASS][1] -> [TIMEOUT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-glk5/igt@perf_pmu@cpu-hotplug.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-glk9/igt@perf_pmu@cpu-hotplug.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_hdr@invalid-hdr}:
- {shard-tglu}: NOTRUN -> [SKIP][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-8/igt@kms_hdr@invalid-hdr.html
Known issues
------------
Here are the changes found in Patchwork_114299v2_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@display-3x:
- shard-tglu-10: NOTRUN -> [SKIP][4] ([i915#1839])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@feature_discovery@display-3x.html
* igt@gem_ccs@suspend-resume:
- shard-tglu-9: NOTRUN -> [SKIP][5] ([i915#5325])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@gem_ccs@suspend-resume.html
* igt@gem_ctx_param@set-priority-not-supported:
- shard-tglu-10: NOTRUN -> [SKIP][6] ([fdo#109314])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@gem_ctx_param@set-priority-not-supported.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-tglu-9: NOTRUN -> [FAIL][7] ([i915#2842])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-tglu-10: NOTRUN -> [FAIL][8] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-cmd:
- shard-tglu-9: NOTRUN -> [SKIP][9] ([fdo#109313])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html
* igt@gem_exec_suspend@basic-s4-devices@smem:
- shard-tglu-10: NOTRUN -> [ABORT][10] ([i915#7975])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices@smem.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-apl: NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4613])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-apl2/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
- shard-tglu-10: NOTRUN -> [SKIP][12] ([i915#4613])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-tglu-9: NOTRUN -> [SKIP][13] ([i915#4613]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_pxp@display-protected-crc:
- shard-tglu-10: NOTRUN -> [SKIP][14] ([i915#4270])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@gem_pxp@display-protected-crc.html
* igt@gem_pxp@reject-modify-context-protection-on:
- shard-tglu-9: NOTRUN -> [SKIP][15] ([i915#4270])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@gem_pxp@reject-modify-context-protection-on.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-apl: NOTRUN -> [SKIP][16] ([fdo#109271]) +53 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-apl2/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gen7_exec_parse@chained-batch:
- shard-tglu-9: NOTRUN -> [SKIP][17] ([fdo#109289]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@gen7_exec_parse@chained-batch.html
* igt@gen9_exec_parse@allowed-single:
- shard-tglu-10: NOTRUN -> [SKIP][18] ([i915#2527] / [i915#2856])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@gen9_exec_parse@allowed-single.html
- shard-glk: [PASS][19] -> [ABORT][20] ([i915#5566])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-glk6/igt@gen9_exec_parse@allowed-single.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-glk5/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_backlight@fade:
- shard-tglu-10: NOTRUN -> [SKIP][21] ([i915#7561])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@i915_pm_backlight@fade.html
* igt@i915_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-tglu-10: NOTRUN -> [SKIP][22] ([fdo#111644] / [i915#1397])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@i915_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@i915_pm_rpm@pc8-residency:
- shard-tglu-9: NOTRUN -> [SKIP][23] ([fdo#109506])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@i915_pm_rpm@pc8-residency.html
* igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
- shard-tglu-10: NOTRUN -> [SKIP][24] ([i915#3826])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
* igt@kms_big_fb@4-tiled-addfb:
- shard-tglu-10: NOTRUN -> [SKIP][25] ([i915#5286]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_big_fb@4-tiled-addfb.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-270:
- shard-tglu-10: NOTRUN -> [SKIP][26] ([fdo#111614])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_big_fb@x-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
- shard-tglu-10: NOTRUN -> [SKIP][27] ([fdo#111615]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-tglu-9: NOTRUN -> [SKIP][28] ([fdo#111615] / [i915#1845] / [i915#7651]) +8 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_ccs@pipe-a-bad-rotation-90-4_tiled_dg2_mc_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][29] ([i915#6095]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_ccs@pipe-a-bad-rotation-90-4_tiled_dg2_mc_ccs.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][30] ([fdo#111615] / [i915#3689]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_ccs@pipe-a-crc-primary-rotation-180-4_tiled_dg2_rc_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][31] ([i915#3689] / [i915#6095]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_ccs@pipe-a-crc-primary-rotation-180-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3886]) +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-apl2/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-tglu-10: NOTRUN -> [SKIP][33] ([i915#3689] / [i915#3886]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-tglu-9: NOTRUN -> [SKIP][34] ([i915#1845] / [i915#7651]) +42 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs_cc:
- shard-tglu-10: NOTRUN -> [SKIP][35] ([i915#3689]) +3 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-tglu-9: NOTRUN -> [SKIP][36] ([fdo#111827]) +1 similar issue
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-tglu-10: NOTRUN -> [SKIP][37] ([fdo#111827])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-tglu-10: NOTRUN -> [SKIP][38] ([i915#7828]) +1 similar issue
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_chamelium_edid@hdmi-mode-timings:
- shard-tglu-9: NOTRUN -> [SKIP][39] ([i915#7828]) +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_chamelium_edid@hdmi-mode-timings.html
* igt@kms_color@ctm-green-to-red@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][40] ([fdo#109271]) +17 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-snb1/igt@kms_color@ctm-green-to-red@pipe-a-hdmi-a-1.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-tglu-9: NOTRUN -> [SKIP][41] ([i915#1845]) +13 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-apl: [PASS][42] -> [FAIL][43] ([i915#2346])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-apl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_dsc@dsc-with-bpc:
- shard-tglu-10: NOTRUN -> [SKIP][44] ([i915#3840])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_dsc@dsc-with-formats:
- shard-tglu-10: NOTRUN -> [SKIP][45] ([i915#3555]) +3 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_dsc@dsc-with-formats.html
* igt@kms_fbcon_fbt@psr:
- shard-tglu-9: NOTRUN -> [SKIP][46] ([i915#3469])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-tglu-9: NOTRUN -> [SKIP][47] ([fdo#109274] / [i915#3637]) +2 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-plain-flip:
- shard-tglu-10: NOTRUN -> [SKIP][48] ([fdo#109274] / [i915#3637]) +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@2x-plain-flip-ts-check@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][49] -> [FAIL][50] ([i915#2122])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-glk5/igt@kms_flip@2x-plain-flip-ts-check@bc-hdmi-a1-hdmi-a2.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-glk5/igt@kms_flip@2x-plain-flip-ts-check@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-fences-interruptible:
- shard-tglu-9: NOTRUN -> [SKIP][51] ([i915#3637]) +3 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_flip@flip-vs-fences-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
- shard-tglu-9: NOTRUN -> [SKIP][52] ([i915#3555]) +7 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-tglu-10: NOTRUN -> [SKIP][53] ([i915#2587] / [i915#2672])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt:
- shard-tglu-9: NOTRUN -> [SKIP][54] ([i915#1849]) +34 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-tglu-10: NOTRUN -> [SKIP][55] ([fdo#110189]) +10 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt:
- shard-tglu-10: NOTRUN -> [SKIP][56] ([fdo#109280]) +12 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-tglu-9: NOTRUN -> [SKIP][57] ([i915#1839]) +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-tglu-9: NOTRUN -> [SKIP][58] ([i915#1849] / [i915#3558]) +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-5@pipe-a-hdmi-a-1:
- shard-tglu-10: NOTRUN -> [SKIP][59] ([i915#5176]) +11 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-5@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5:
- shard-tglu-9: NOTRUN -> [SKIP][60] ([i915#6953] / [i915#8152])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_plane_scaling@planes-downscale-factor-0-5.html
* igt@kms_prime@basic-modeset-hybrid:
- shard-tglu-10: NOTRUN -> [SKIP][61] ([i915#6524])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@kms_prime@basic-modeset-hybrid.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-tglu-9: NOTRUN -> [SKIP][62] ([fdo#109642] / [fdo#111068] / [i915#658])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-tglu-9: NOTRUN -> [SKIP][63] ([fdo#110189]) +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@kms_pwrite_crc:
- shard-tglu-9: NOTRUN -> [SKIP][64] ([fdo#109274] / [i915#1845])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_pwrite_crc.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-tglu-9: NOTRUN -> [SKIP][65] ([fdo#111615] / [i915#1845])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_setmode@basic@pipe-a-vga-1:
- shard-snb: NOTRUN -> [FAIL][66] ([i915#5465]) +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-snb4/igt@kms_setmode@basic@pipe-a-vga-1.html
* igt@perf@mi-rpc:
- shard-tglu-10: NOTRUN -> [SKIP][67] ([fdo#109289])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@perf@mi-rpc.html
* igt@perf@stress-open-close:
- shard-glk: [PASS][68] -> [ABORT][69] ([i915#5213])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-glk3/igt@perf@stress-open-close.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-glk9/igt@perf@stress-open-close.html
* igt@prime_udl:
- shard-tglu-10: NOTRUN -> [SKIP][70] ([fdo#109291])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@prime_udl.html
* igt@tools_test@sysfs_l3_parity:
- shard-tglu-10: NOTRUN -> [SKIP][71] ([fdo#109307])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@tools_test@sysfs_l3_parity.html
* igt@v3d/v3d_create_bo@create-bo-4096:
- shard-tglu-9: NOTRUN -> [SKIP][72] ([fdo#109315] / [i915#2575])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@v3d/v3d_create_bo@create-bo-4096.html
* igt@v3d/v3d_perfmon@create-perfmon-invalid-counters:
- shard-tglu-10: NOTRUN -> [SKIP][73] ([fdo#109315] / [i915#2575])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@v3d/v3d_perfmon@create-perfmon-invalid-counters.html
* igt@vc4/vc4_purgeable_bo@mark-unpurgeable-twice:
- shard-tglu-9: NOTRUN -> [SKIP][74] ([i915#2575]) +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-9/igt@vc4/vc4_purgeable_bo@mark-unpurgeable-twice.html
* igt@vc4/vc4_tiling@set-bad-handle:
- shard-tglu-10: NOTRUN -> [SKIP][75] ([i915#2575])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-10/igt@vc4/vc4_tiling@set-bad-handle.html
#### Possible fixes ####
* igt@drm_fdinfo@idle@rcs0:
- {shard-rkl}: [FAIL][76] ([i915#7742]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-1/igt@drm_fdinfo@idle@rcs0.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@drm_fdinfo@idle@rcs0.html
* igt@fbdev@write:
- {shard-rkl}: [SKIP][78] ([i915#2582]) -> [PASS][79]
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-5/igt@fbdev@write.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@fbdev@write.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][80] ([i915#2842]) -> [PASS][81]
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-apl2/igt@gem_exec_fair@basic-none-solo@rcs0.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [FAIL][82] ([i915#2842]) -> [PASS][83] +1 similar issue
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- {shard-rkl}: [FAIL][84] ([i915#2842]) -> [PASS][85] +2 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-2/igt@gem_exec_fair@basic-pace@rcs0.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-5/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_reloc@basic-gtt-read:
- {shard-rkl}: [SKIP][86] ([i915#3281]) -> [PASS][87] +3 similar issues
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-2/igt@gem_exec_reloc@basic-gtt-read.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-read.html
* igt@gem_partial_pwrite_pread@writes-after-reads:
- {shard-rkl}: [SKIP][88] ([i915#3282]) -> [PASS][89] +2 similar issues
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-2/igt@gem_partial_pwrite_pread@writes-after-reads.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-5/igt@gem_partial_pwrite_pread@writes-after-reads.html
* igt@gen9_exec_parse@allowed-all:
- {shard-rkl}: [SKIP][90] ([i915#2527]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-1/igt@gen9_exec_parse@allowed-all.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-5/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@allowed-single:
- shard-apl: [ABORT][92] ([i915#5566]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-apl7/igt@gen9_exec_parse@allowed-single.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-apl2/igt@gen9_exec_parse@allowed-single.html
* igt@i915_pm_dc@dc9-dpms:
- {shard-rkl}: [SKIP][94] ([i915#3361]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-5/igt@i915_pm_dc@dc9-dpms.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_rc6_residency@rc6-idle@vecs0:
- {shard-dg1}: [FAIL][96] ([i915#3591]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-dg1-13/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
* igt@i915_pm_rpm@dpms-non-lpsp:
- {shard-dg1}: [SKIP][98] ([i915#1397]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-dg1-14/igt@i915_pm_rpm@dpms-non-lpsp.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-dg1-17/igt@i915_pm_rpm@dpms-non-lpsp.html
* igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
- {shard-rkl}: [SKIP][100] ([i915#1397]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-4/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
- {shard-tglu}: [SKIP][102] ([i915#1845]) -> [PASS][103] +2 similar issues
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-tglu-6/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-2/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
* igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2:
- shard-glk: [FAIL][104] ([i915#79]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-glk6/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-glk5/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt:
- {shard-tglu}: [SKIP][106] ([i915#1849]) -> [PASS][107] +1 similar issue
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-tglu-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-rkl}: [SKIP][108] ([i915#1849] / [i915#4098]) -> [PASS][109] +15 similar issues
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_hdmi_inject@inject-audio:
- {shard-rkl}: [SKIP][110] ([i915#433]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-2/igt@kms_hdmi_inject@inject-audio.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-5/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_plane@plane-position-hole@pipe-b-planes:
- {shard-tglu}: [SKIP][112] ([i915#1849] / [i915#3558]) -> [PASS][113] +1 similar issue
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-tglu-6/igt@kms_plane@plane-position-hole@pipe-b-planes.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-2/igt@kms_plane@plane-position-hole@pipe-b-planes.html
* igt@kms_properties@plane-properties-atomic:
- {shard-rkl}: [SKIP][114] ([i915#1849]) -> [PASS][115] +2 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-5/igt@kms_properties@plane-properties-atomic.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@kms_properties@plane-properties-atomic.html
* igt@kms_psr@primary_render:
- {shard-rkl}: [SKIP][116] ([i915#1072]) -> [PASS][117] +3 similar issues
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-5/igt@kms_psr@primary_render.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@kms_psr@primary_render.html
* igt@kms_universal_plane@universal-plane-pipe-b-sanity:
- {shard-tglu}: [SKIP][118] ([fdo#109274]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-tglu-6/igt@kms_universal_plane@universal-plane-pipe-b-sanity.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-2/igt@kms_universal_plane@universal-plane-pipe-b-sanity.html
* igt@kms_vblank@pipe-b-query-idle:
- {shard-rkl}: [SKIP][120] ([i915#1845] / [i915#4098]) -> [PASS][121] +23 similar issues
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-1/igt@kms_vblank@pipe-b-query-idle.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-6/igt@kms_vblank@pipe-b-query-idle.html
* igt@kms_vblank@pipe-c-wait-forked-hang:
- {shard-tglu}: [SKIP][122] ([i915#1845] / [i915#7651]) -> [PASS][123] +13 similar issues
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-tglu-6/igt@kms_vblank@pipe-c-wait-forked-hang.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-tglu-2/igt@kms_vblank@pipe-c-wait-forked-hang.html
* igt@perf@polling-small-buf:
- {shard-rkl}: [FAIL][124] ([i915#1722]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-2/igt@perf@polling-small-buf.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-5/igt@perf@polling-small-buf.html
* igt@prime_vgem@coherency-gtt:
- {shard-rkl}: [SKIP][126] ([fdo#109295] / [fdo#111656] / [i915#3708]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12774/shard-rkl-2/igt@prime_vgem@coherency-gtt.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/shard-rkl-5/igt@prime_vgem@coherency-gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2532]: https://gitlab.freedesktop.org/drm/intel/issues/2532
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#5115]: https://gitlab.freedesktop.org/drm/intel/issues/5115
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5431]: https://gitlab.freedesktop.org/drm/intel/issues/5431
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6252]: https://gitlab.freedesktop.org/drm/intel/issues/6252
[i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
[i915#6333]: https://gitlab.freedesktop.org/drm/intel/issues/6333
[i915#6412]: https://gitlab.freedesktop.org/drm/intel/issues/6412
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7791]: https://gitlab.freedesktop.org/drm/intel/issues/7791
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8018]: https://gitlab.freedesktop.org/drm/intel/issues/8018
[i915#8151]: https://gitlab.freedesktop.org/drm/intel/issues/8151
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
[i915#8154]: https://gitlab.freedesktop.org/drm/intel/issues/8154
Build changes
-------------
* Linux: CI_DRM_12774 -> Patchwork_114299v2
CI-20190529: 20190529
CI_DRM_12774: 51ea055cc2f62af7e9556def2dadb244a6d396c6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7171: 35a09092eabf7e55aeb625720634550a0368dde6 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114299v2: 51ea055cc2f62af7e9556def2dadb244a6d396c6 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114299v2/index.html
[-- Attachment #2: Type: text/html, Size: 40973 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic
2023-02-24 9:51 [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
` (5 preceding siblings ...)
2023-02-24 11:59 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2023-02-27 8:11 ` Thomas Hellström
2023-02-27 8:55 ` [Intel-gfx] [Intel-xe] " Maarten Lankhorst
6 siblings, 1 reply; 12+ messages in thread
From: Thomas Hellström @ 2023-02-27 8:11 UTC (permalink / raw)
To: dri-devel, Daniel Vetter, Dave Airlie
Cc: intel-gfx, Christian Koenig, intel-xe
Daniel, Dave
Ack to merge this to drm through drm-misc-next?
/Thomas
On 2/24/23 10:51, Thomas Hellström wrote:
> This series (or at least the suballocator helper) is a prerequisite
> for the new Xe driver.
>
> There was an unresolved issue when the series was last up for review,
> and that was the per allocation aligment. Last message was from
> Maarten Lankhorst arguing that the larger per-driver alignment used
> would only incur a small memory cost. This new variant resolves that.
>
> The generic suballocator has been tested with the Xe driver, and a
> kunit test is under development.
> The amd- and radeon adaptations are only compile-tested.
>
> v3:
> - Remove stale author information (Christian König)
> - Update Radeon Kconfig (Thomas Hellström)
>
> v4:
> - Avoid 64-bit integer divisions (kernel test robot <lkp@intel.com>)
> - Use size_t rather than u64 for the managed range. (Thomas)
>
>
> Maarten Lankhorst (3):
> drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
> drm/amd: Convert amdgpu to use suballocation helper.
> drm/radeon: Use the drm suballocation manager implementation.
>
> drivers/gpu/drm/Kconfig | 4 +
> drivers/gpu/drm/Makefile | 3 +
> drivers/gpu/drm/amd/amdgpu/Kconfig | 1 +
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 23 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 324 +--------------
> drivers/gpu/drm/drm_suballoc.c | 457 +++++++++++++++++++++
> drivers/gpu/drm/radeon/Kconfig | 1 +
> drivers/gpu/drm/radeon/radeon.h | 55 +--
> drivers/gpu/drm/radeon/radeon_ib.c | 12 +-
> drivers/gpu/drm/radeon/radeon_object.h | 25 +-
> drivers/gpu/drm/radeon/radeon_sa.c | 316 ++------------
> drivers/gpu/drm/radeon/radeon_semaphore.c | 4 +-
> include/drm/drm_suballoc.h | 108 +++++
> 16 files changed, 674 insertions(+), 693 deletions(-)
> create mode 100644 drivers/gpu/drm/drm_suballoc.c
> create mode 100644 include/drm/drm_suballoc.h
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [Intel-gfx] [Intel-xe] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic
2023-02-27 8:11 ` [Intel-gfx] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic Thomas Hellström
@ 2023-02-27 8:55 ` Maarten Lankhorst
2023-02-27 9:00 ` Thomas Hellström
0 siblings, 1 reply; 12+ messages in thread
From: Maarten Lankhorst @ 2023-02-27 8:55 UTC (permalink / raw)
To: Thomas Hellström, dri-devel, Daniel Vetter, Dave Airlie
Cc: intel-gfx, Christian Koenig, intel-xe
Hey,
I can push this to drm-misc-next, I don't think a drm maintainer ack is
needed, as long as we have the acks from the amd folk for merging
through drm-misc-next.
~Maarten
On 2023-02-27 09:11, Thomas Hellström wrote:
> Daniel, Dave
>
> Ack to merge this to drm through drm-misc-next?
>
> /Thomas
>
>
> On 2/24/23 10:51, Thomas Hellström wrote:
>> This series (or at least the suballocator helper) is a prerequisite
>> for the new Xe driver.
>>
>> There was an unresolved issue when the series was last up for review,
>> and that was the per allocation aligment. Last message was from
>> Maarten Lankhorst arguing that the larger per-driver alignment used
>> would only incur a small memory cost. This new variant resolves that.
>>
>> The generic suballocator has been tested with the Xe driver, and a
>> kunit test is under development.
>> The amd- and radeon adaptations are only compile-tested.
>>
>> v3:
>> - Remove stale author information (Christian König)
>> - Update Radeon Kconfig (Thomas Hellström)
>>
>> v4:
>> - Avoid 64-bit integer divisions (kernel test robot <lkp@intel.com>)
>> - Use size_t rather than u64 for the managed range. (Thomas)
>>
>>
>> Maarten Lankhorst (3):
>> drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
>> drm/amd: Convert amdgpu to use suballocation helper.
>> drm/radeon: Use the drm suballocation manager implementation.
>>
>> drivers/gpu/drm/Kconfig | 4 +
>> drivers/gpu/drm/Makefile | 3 +
>> drivers/gpu/drm/amd/amdgpu/Kconfig | 1 +
>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 23 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 324 +--------------
>> drivers/gpu/drm/drm_suballoc.c | 457 +++++++++++++++++++++
>> drivers/gpu/drm/radeon/Kconfig | 1 +
>> drivers/gpu/drm/radeon/radeon.h | 55 +--
>> drivers/gpu/drm/radeon/radeon_ib.c | 12 +-
>> drivers/gpu/drm/radeon/radeon_object.h | 25 +-
>> drivers/gpu/drm/radeon/radeon_sa.c | 316 ++------------
>> drivers/gpu/drm/radeon/radeon_semaphore.c | 4 +-
>> include/drm/drm_suballoc.h | 108 +++++
>> 16 files changed, 674 insertions(+), 693 deletions(-)
>> create mode 100644 drivers/gpu/drm/drm_suballoc.c
>> create mode 100644 include/drm/drm_suballoc.h
>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [Intel-xe] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic
2023-02-27 8:55 ` [Intel-gfx] [Intel-xe] " Maarten Lankhorst
@ 2023-02-27 9:00 ` Thomas Hellström
2023-02-27 13:03 ` Christian König
0 siblings, 1 reply; 12+ messages in thread
From: Thomas Hellström @ 2023-02-27 9:00 UTC (permalink / raw)
To: Maarten Lankhorst, dri-devel, Daniel Vetter, Dave Airlie
Cc: intel-gfx, Christian Koenig, intel-xe
Hi, Maarten,
On 2/27/23 09:55, Maarten Lankhorst wrote:
> Hey,
>
> I can push this to drm-misc-next, I don't think a drm maintainer ack
> is needed, as long as we have the acks from the amd folk for merging
> through drm-misc-next.
>
OK, sound good, we have that ack so please go ahead!
/Thomas
> ~Maarten
>
> On 2023-02-27 09:11, Thomas Hellström wrote:
>> Daniel, Dave
>>
>> Ack to merge this to drm through drm-misc-next?
>>
>> /Thomas
>>
>>
>> On 2/24/23 10:51, Thomas Hellström wrote:
>>> This series (or at least the suballocator helper) is a prerequisite
>>> for the new Xe driver.
>>>
>>> There was an unresolved issue when the series was last up for review,
>>> and that was the per allocation aligment. Last message was from
>>> Maarten Lankhorst arguing that the larger per-driver alignment used
>>> would only incur a small memory cost. This new variant resolves that.
>>>
>>> The generic suballocator has been tested with the Xe driver, and a
>>> kunit test is under development.
>>> The amd- and radeon adaptations are only compile-tested.
>>>
>>> v3:
>>> - Remove stale author information (Christian König)
>>> - Update Radeon Kconfig (Thomas Hellström)
>>>
>>> v4:
>>> - Avoid 64-bit integer divisions (kernel test robot <lkp@intel.com>)
>>> - Use size_t rather than u64 for the managed range. (Thomas)
>>>
>>>
>>> Maarten Lankhorst (3):
>>> drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
>>> drm/amd: Convert amdgpu to use suballocation helper.
>>> drm/radeon: Use the drm suballocation manager implementation.
>>>
>>> drivers/gpu/drm/Kconfig | 4 +
>>> drivers/gpu/drm/Makefile | 3 +
>>> drivers/gpu/drm/amd/amdgpu/Kconfig | 1 +
>>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 23 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +-
>>> drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 324 +--------------
>>> drivers/gpu/drm/drm_suballoc.c | 457
>>> +++++++++++++++++++++
>>> drivers/gpu/drm/radeon/Kconfig | 1 +
>>> drivers/gpu/drm/radeon/radeon.h | 55 +--
>>> drivers/gpu/drm/radeon/radeon_ib.c | 12 +-
>>> drivers/gpu/drm/radeon/radeon_object.h | 25 +-
>>> drivers/gpu/drm/radeon/radeon_sa.c | 316 ++------------
>>> drivers/gpu/drm/radeon/radeon_semaphore.c | 4 +-
>>> include/drm/drm_suballoc.h | 108 +++++
>>> 16 files changed, 674 insertions(+), 693 deletions(-)
>>> create mode 100644 drivers/gpu/drm/drm_suballoc.c
>>> create mode 100644 include/drm/drm_suballoc.h
>>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [Intel-xe] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic
2023-02-27 9:00 ` Thomas Hellström
@ 2023-02-27 13:03 ` Christian König
2023-02-27 15:00 ` Alex Deucher
0 siblings, 1 reply; 12+ messages in thread
From: Christian König @ 2023-02-27 13:03 UTC (permalink / raw)
To: Thomas Hellström, Maarten Lankhorst, dri-devel,
Daniel Vetter, Dave Airlie
Cc: intel-gfx, intel-xe
Am 27.02.23 um 10:00 schrieb Thomas Hellström:
> Hi, Maarten,
>
> On 2/27/23 09:55, Maarten Lankhorst wrote:
>> Hey,
>>
>> I can push this to drm-misc-next, I don't think a drm maintainer ack
>> is needed, as long as we have the acks from the amd folk for merging
>> through drm-misc-next.
>>
> OK, sound good, we have that ack so please go ahead!
Works for me and I don't think Alex would object either.
Regards,
Christian.
>
> /Thomas
>
>
>> ~Maarten
>>
>> On 2023-02-27 09:11, Thomas Hellström wrote:
>>> Daniel, Dave
>>>
>>> Ack to merge this to drm through drm-misc-next?
>>>
>>> /Thomas
>>>
>>>
>>> On 2/24/23 10:51, Thomas Hellström wrote:
>>>> This series (or at least the suballocator helper) is a prerequisite
>>>> for the new Xe driver.
>>>>
>>>> There was an unresolved issue when the series was last up for review,
>>>> and that was the per allocation aligment. Last message was from
>>>> Maarten Lankhorst arguing that the larger per-driver alignment used
>>>> would only incur a small memory cost. This new variant resolves that.
>>>>
>>>> The generic suballocator has been tested with the Xe driver, and a
>>>> kunit test is under development.
>>>> The amd- and radeon adaptations are only compile-tested.
>>>>
>>>> v3:
>>>> - Remove stale author information (Christian König)
>>>> - Update Radeon Kconfig (Thomas Hellström)
>>>>
>>>> v4:
>>>> - Avoid 64-bit integer divisions (kernel test robot <lkp@intel.com>)
>>>> - Use size_t rather than u64 for the managed range. (Thomas)
>>>>
>>>>
>>>> Maarten Lankhorst (3):
>>>> drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
>>>> drm/amd: Convert amdgpu to use suballocation helper.
>>>> drm/radeon: Use the drm suballocation manager implementation.
>>>>
>>>> drivers/gpu/drm/Kconfig | 4 +
>>>> drivers/gpu/drm/Makefile | 3 +
>>>> drivers/gpu/drm/amd/amdgpu/Kconfig | 1 +
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 +-
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +-
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 23 +-
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +-
>>>> drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 324 +--------------
>>>> drivers/gpu/drm/drm_suballoc.c | 457
>>>> +++++++++++++++++++++
>>>> drivers/gpu/drm/radeon/Kconfig | 1 +
>>>> drivers/gpu/drm/radeon/radeon.h | 55 +--
>>>> drivers/gpu/drm/radeon/radeon_ib.c | 12 +-
>>>> drivers/gpu/drm/radeon/radeon_object.h | 25 +-
>>>> drivers/gpu/drm/radeon/radeon_sa.c | 316 ++------------
>>>> drivers/gpu/drm/radeon/radeon_semaphore.c | 4 +-
>>>> include/drm/drm_suballoc.h | 108 +++++
>>>> 16 files changed, 674 insertions(+), 693 deletions(-)
>>>> create mode 100644 drivers/gpu/drm/drm_suballoc.c
>>>> create mode 100644 include/drm/drm_suballoc.h
>>>>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [Intel-gfx] [Intel-xe] [PATCH v4 0/3] drm/helpers: Make the suballocation manager drm generic
2023-02-27 13:03 ` Christian König
@ 2023-02-27 15:00 ` Alex Deucher
0 siblings, 0 replies; 12+ messages in thread
From: Alex Deucher @ 2023-02-27 15:00 UTC (permalink / raw)
To: Christian König
Cc: Thomas Hellström, intel-gfx, dri-devel, Daniel Vetter,
Dave Airlie, Maarten Lankhorst, intel-xe
On Mon, Feb 27, 2023 at 8:04 AM Christian König
<christian.koenig@amd.com> wrote:
>
> Am 27.02.23 um 10:00 schrieb Thomas Hellström:
> > Hi, Maarten,
> >
> > On 2/27/23 09:55, Maarten Lankhorst wrote:
> >> Hey,
> >>
> >> I can push this to drm-misc-next, I don't think a drm maintainer ack
> >> is needed, as long as we have the acks from the amd folk for merging
> >> through drm-misc-next.
> >>
> > OK, sound good, we have that ack so please go ahead!
>
> Works for me and I don't think Alex would object either.
Fine with me as well.
Alex
>
> Regards,
> Christian.
>
> >
> > /Thomas
> >
> >
> >> ~Maarten
> >>
> >> On 2023-02-27 09:11, Thomas Hellström wrote:
> >>> Daniel, Dave
> >>>
> >>> Ack to merge this to drm through drm-misc-next?
> >>>
> >>> /Thomas
> >>>
> >>>
> >>> On 2/24/23 10:51, Thomas Hellström wrote:
> >>>> This series (or at least the suballocator helper) is a prerequisite
> >>>> for the new Xe driver.
> >>>>
> >>>> There was an unresolved issue when the series was last up for review,
> >>>> and that was the per allocation aligment. Last message was from
> >>>> Maarten Lankhorst arguing that the larger per-driver alignment used
> >>>> would only incur a small memory cost. This new variant resolves that.
> >>>>
> >>>> The generic suballocator has been tested with the Xe driver, and a
> >>>> kunit test is under development.
> >>>> The amd- and radeon adaptations are only compile-tested.
> >>>>
> >>>> v3:
> >>>> - Remove stale author information (Christian König)
> >>>> - Update Radeon Kconfig (Thomas Hellström)
> >>>>
> >>>> v4:
> >>>> - Avoid 64-bit integer divisions (kernel test robot <lkp@intel.com>)
> >>>> - Use size_t rather than u64 for the managed range. (Thomas)
> >>>>
> >>>>
> >>>> Maarten Lankhorst (3):
> >>>> drm/suballoc: Extract amdgpu_sa.c as generic suballocation helper
> >>>> drm/amd: Convert amdgpu to use suballocation helper.
> >>>> drm/radeon: Use the drm suballocation manager implementation.
> >>>>
> >>>> drivers/gpu/drm/Kconfig | 4 +
> >>>> drivers/gpu/drm/Makefile | 3 +
> >>>> drivers/gpu/drm/amd/amdgpu/Kconfig | 1 +
> >>>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 +-
> >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +-
> >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 23 +-
> >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 3 +-
> >>>> drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 324 +--------------
> >>>> drivers/gpu/drm/drm_suballoc.c | 457
> >>>> +++++++++++++++++++++
> >>>> drivers/gpu/drm/radeon/Kconfig | 1 +
> >>>> drivers/gpu/drm/radeon/radeon.h | 55 +--
> >>>> drivers/gpu/drm/radeon/radeon_ib.c | 12 +-
> >>>> drivers/gpu/drm/radeon/radeon_object.h | 25 +-
> >>>> drivers/gpu/drm/radeon/radeon_sa.c | 316 ++------------
> >>>> drivers/gpu/drm/radeon/radeon_semaphore.c | 4 +-
> >>>> include/drm/drm_suballoc.h | 108 +++++
> >>>> 16 files changed, 674 insertions(+), 693 deletions(-)
> >>>> create mode 100644 drivers/gpu/drm/drm_suballoc.c
> >>>> create mode 100644 include/drm/drm_suballoc.h
> >>>>
>
^ permalink raw reply [flat|nested] 12+ messages in thread