From: Arun R Murthy <arun.r.murthy@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
jani.nikula@intel.com
Cc: Harry Wentland <harry.wentland@amd.com>
Subject: [Intel-gfx] [RESEND PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register
Date: Thu, 2 Mar 2023 13:45:31 +0530 [thread overview]
Message-ID: <20230302081532.765821-2-arun.r.murthy@intel.com> (raw)
In-Reply-To: <20230302081532.765821-1-arun.r.murthy@intel.com>
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 632376c291db..358db4a9f167 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -692,6 +692,9 @@
# define DP_FEC_LANE_2_SELECT (2 << 4)
# define DP_FEC_LANE_3_SELECT (3 << 4)
+#define DP_SDP_ERROR_DETECTION_CONFIGURATION 0x121 /* DP 2.0 E11 */
+#define DP_SDP_CRC16_128B132B_EN BIT(0)
+
#define DP_AUX_FRAME_SYNC_VALUE 0x15c /* eDP 1.4 */
# define DP_AUX_FRAME_SYNC_VALID (1 << 0)
--
2.25.1
next prev parent reply other threads:[~2023-03-02 8:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-02 8:15 [Intel-gfx] [PATCHv3 0/2] DP2.0 SDP CRC16 for 128/132b link layer Arun R Murthy
2023-03-02 8:15 ` Arun R Murthy [this message]
2023-03-02 8:15 ` [Intel-gfx] [PATCHv4 2/2] i915/display/dp: SDP CRC16 for 128b132b " Arun R Murthy
2023-03-07 9:09 ` Jani Nikula
2023-03-07 9:10 ` Jani Nikula
2023-03-21 14:49 ` Jani Nikula
2023-03-02 8:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DP2.0 SDP CRC16 for 128/132b link layer (rev3) Patchwork
2023-03-02 8:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-03-14 13:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DP2.0 SDP CRC16 for 128/132b link layer (rev5) Patchwork
2023-03-14 15:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-15 18:58 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-01-20 6:15 [Intel-gfx] [PATCHv2 0/2] DP2.0 SDP CRC16 for 128/132b link layer Arun R Murthy
2023-01-20 6:15 ` [Intel-gfx] [RESEND PATCHv2 1/2] drm: Add SDP Error Detection Configuration Register Arun R Murthy
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