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From: Suraj Kandpal <suraj.kandpal@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 2/7] drm/i915/dp: Check if DSC supports the given output_format
Date: Thu,  9 Mar 2023 11:58:50 +0530	[thread overview]
Message-ID: <20230309062855.393087-3-suraj.kandpal@intel.com> (raw)
In-Reply-To: <20230309062855.393087-1-suraj.kandpal@intel.com>

From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

Go with DSC only if the given output_format is supported.

v2: Use drm helper to get DSC format support for sink.

v3: remove drm_dp_dsc_compute_bpp.

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 28 +++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index aee93b0d810e..c725b40e2718 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1492,6 +1492,31 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
 	return drm_dsc_compute_rc_parameters(vdsc_cfg);
 }
 
+static bool intel_dp_dsc_supports_format(struct intel_dp *intel_dp,
+					 enum intel_output_format output_format)
+{
+	u8 sink_dsc_format;
+
+	switch (output_format) {
+	case INTEL_OUTPUT_FORMAT_RGB:
+		sink_dsc_format = DP_DSC_RGB;
+		break;
+	case INTEL_OUTPUT_FORMAT_YCBCR444:
+		sink_dsc_format = DP_DSC_YCbCr444;
+		break;
+	case INTEL_OUTPUT_FORMAT_YCBCR420:
+		if (min(intel_dp_source_dsc_version_minor(intel_dp),
+			intel_dp_sink_dsc_version_minor(intel_dp)) < 2)
+			return false;
+		sink_dsc_format = DP_DSC_YCbCr420_Native;
+		break;
+	default:
+		return false;
+	}
+
+	return drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, sink_dsc_format);
+}
+
 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 				struct intel_crtc_state *pipe_config,
 				struct drm_connector_state *conn_state,
@@ -1512,6 +1537,9 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 	if (!intel_dp_supports_dsc(intel_dp, pipe_config))
 		return -EINVAL;
 
+	if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
+		return -EINVAL;
+
 	if (compute_pipe_bpp)
 		pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
 	else
-- 
2.25.1


  parent reply	other threads:[~2023-03-09  6:30 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-09  6:28 [Intel-gfx] [PATCH v3 0/7] Enable YCbCr420 format for VDSC Suraj Kandpal
2023-03-09  6:28 ` [Intel-gfx] [PATCH v3 1/7] drm/dp_helper: Add helper to check DSC support with given o/p format Suraj Kandpal
2023-03-20  8:59   ` Jani Nikula
2023-03-24 15:42     ` Maarten Lankhorst
2023-03-09  6:28 ` Suraj Kandpal [this message]
2023-03-09  6:28 ` [Intel-gfx] [PATCH v3 3/7] drm/i915/dsc: Adding the new registers for DSC Suraj Kandpal
2023-03-09  6:28 ` [Intel-gfx] [PATCH v3 4/7] drm/i915/dsc: Enable YCbCr420 for VDSC Suraj Kandpal
2023-03-09  6:28 ` [Intel-gfx] [PATCH v3 5/7] drm/i915/dsc: Fill in native_420 field Suraj Kandpal
2023-03-09  6:28 ` [Intel-gfx] [PATCH v3 6/7] drm/i915/vdsc: Check slice design requirement Suraj Kandpal
2023-03-09  6:28 ` [Intel-gfx] [PATCH v3 7/7] drm/i915/dsc: Add debugfs entry to validate DSC output formats Suraj Kandpal
2023-03-09  7:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Enable YCbCr420 format for VDSC (rev3) Patchwork
2023-03-10 20:16 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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