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From: Andi Shyti <andi.shyti@linux.intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Andi Shyti <andi.shyti@kernel.org>,
	Maciej Patelczyk <maciej.patelczyk@intel.com>,
	Nirmoy Das <nirmoy.das@intel.com>
Subject: [Intel-gfx] [PATCH v3 1/2] drm/i915/gt: Create per-tile debugfs files
Date: Sat, 18 Mar 2023 21:36:15 +0100	[thread overview]
Message-ID: <20230318203616.183765-3-andi.shyti@linux.intel.com> (raw)
In-Reply-To: <20230318203616.183765-1-andi.shyti@linux.intel.com>

To support multi-GT configurations, we need to generate
independent debug files for each GT.

To achieve this create a separate directory for each GT under the
debugfs directory. For instance, in a system with two tiles, the
debugfs structure would look like this:

/sys/kernel/debug/dri
                  └── 0
                      ├── gt0
                      │   ├── drpc
                      │   ├── engines
                      │   ├── forcewake
                      │   ├── frequency
                      │   └── rps_boost
                      └── gt1
                      :   ├── drpc
                      :   ├── engines
                      :   ├── forcewake
                          ├── frequency
                          └── rps_boost

Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_debugfs.c    | 4 +++-
 drivers/gpu/drm/i915/gt/uc/intel_guc.h        | 2 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c    | 5 ++++-
 drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c | 2 ++
 4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index 5fc2df01aa0df..4dc23b8d3aa2d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -83,11 +83,13 @@ static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
 void intel_gt_debugfs_register(struct intel_gt *gt)
 {
 	struct dentry *root;
+	char gtname[4];
 
 	if (!gt->i915->drm.primary->debugfs_root)
 		return;
 
-	root = debugfs_create_dir("gt", gt->i915->drm.primary->debugfs_root);
+	snprintf(gtname, sizeof(gtname), "gt%u", gt->info.id);
+	root = debugfs_create_dir(gtname, gt->i915->drm.primary->debugfs_root);
 	if (IS_ERR(root))
 		return;
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index bb4dfe707a7d0..e46aac1a41e6d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -42,6 +42,8 @@ struct intel_guc {
 	/** @capture: the error-state-capture module's data and objects */
 	struct intel_guc_state_capture *capture;
 
+	struct dentry *dbgfs_node;
+
 	/** @sched_engine: Global engine used to submit requests to GuC */
 	struct i915_sched_engine *sched_engine;
 	/**
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 195db8c9d4200..55bc8b55fbc05 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -542,8 +542,11 @@ static int guc_log_relay_create(struct intel_guc_log *log)
 	 */
 	n_subbufs = 8;
 
+	if (!guc->dbgfs_node)
+		return -ENOENT;
+
 	guc_log_relay_chan = relay_open("guc_log",
-					i915->drm.primary->debugfs_root,
+					guc->dbgfs_node,
 					subbuf_size, n_subbufs,
 					&relay_callbacks, i915);
 	if (!guc_log_relay_chan) {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
index 284d6fbc2d08c..2f93cc4e408a8 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
@@ -54,6 +54,8 @@ void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root)
 	if (IS_ERR(root))
 		return;
 
+	uc->guc.dbgfs_node = root;
+
 	intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), uc);
 
 	intel_guc_debugfs_register(&uc->guc, root);
-- 
2.39.2


  parent reply	other threads:[~2023-03-18 20:37 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-18 20:36 [Intel-gfx] [PATCH v3 0/2] Some debugfs refactoring and improvements Andi Shyti
2023-03-18 20:36 ` [Intel-gfx] [PATCH v3 1/2] drm/i915/gt: Create per-gt debugfs files Andi Shyti
2023-03-18 20:36 ` Andi Shyti [this message]
2023-03-18 20:36 ` [Intel-gfx] [PATCH v3 2/2] drm/i915/debugfs: Enable upper layer interfaces to act on all gt's Andi Shyti
2023-03-18 21:06 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for Some debugfs refactoring and improvements (rev2) Patchwork
2023-03-18 21:06 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: " Patchwork
2023-03-18 21:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-18 21:06 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-18 21:30 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-03-18 22:02 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for Some debugfs refactoring and improvements (rev3) Patchwork
2023-03-18 22:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: " Patchwork
2023-03-18 22:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-18 22:32 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-03-20 20:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Some debugfs refactoring and improvements (rev4) Patchwork
2023-03-20 20:22 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-20 20:22 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-20 20:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-21  0:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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