From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions
Date: Thu, 23 Mar 2023 16:20:08 +0200 [thread overview]
Message-ID: <20230323142035.1432621-3-imre.deak@intel.com> (raw)
In-Reply-To: <20230323142035.1432621-1-imre.deak@intel.com>
Use the usual adlp prefix for all ADLP specific TC PHY functions. Other
ADL platforms don't support TC.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_tc.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index b6e425c44fcb9..099b1ec842ba2 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -457,7 +457,7 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
* ADLP TC PHY handlers
* --------------------
*/
-static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 adlp_tc_port_live_status_mask(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
@@ -492,7 +492,7 @@ static u32 adl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
* DP-alt, legacy or nothing). For TBT-alt sinks the PHY is owned by the TBT
* subsystem and so switching the ownership to display is not required.
*/
-static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
+static bool adlp_tc_phy_status_complete(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
@@ -509,8 +509,8 @@ static bool adl_tc_phy_status_complete(struct intel_digital_port *dig_port)
return val & TCSS_DDI_STATUS_READY;
}
-static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
- bool take)
+static bool adlp_tc_phy_take_ownership(struct intel_digital_port *dig_port,
+ bool take)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum port port = dig_port->base.port;
@@ -521,7 +521,7 @@ static bool adl_tc_phy_take_ownership(struct intel_digital_port *dig_port,
return true;
}
-static bool adl_tc_phy_is_owned(struct intel_digital_port *dig_port)
+static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
enum port port = dig_port->base.port;
@@ -540,7 +540,7 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
if (IS_ALDERLAKE_P(i915))
- return adl_tc_port_live_status_mask(dig_port);
+ return adlp_tc_port_live_status_mask(dig_port);
return icl_tc_port_live_status_mask(dig_port);
}
@@ -550,7 +550,7 @@ static bool tc_phy_status_complete(struct intel_digital_port *dig_port)
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
if (IS_ALDERLAKE_P(i915))
- return adl_tc_phy_status_complete(dig_port);
+ return adlp_tc_phy_status_complete(dig_port);
return icl_tc_phy_status_complete(dig_port);
}
@@ -560,7 +560,7 @@ static bool tc_phy_is_owned(struct intel_digital_port *dig_port)
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
if (IS_ALDERLAKE_P(i915))
- return adl_tc_phy_is_owned(dig_port);
+ return adlp_tc_phy_is_owned(dig_port);
return icl_tc_phy_is_owned(dig_port);
}
@@ -570,7 +570,7 @@ static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
if (IS_ALDERLAKE_P(i915))
- return adl_tc_phy_take_ownership(dig_port, take);
+ return adlp_tc_phy_take_ownership(dig_port, take);
return icl_tc_phy_take_ownership(dig_port, take);
}
--
2.37.1
next prev parent reply other threads:[~2023-03-23 14:20 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-23 14:20 [Intel-gfx] [PATCH 00/29] drm/i915/tc: Align the ADLP TypeC sequences with bspec Imre Deak
2023-03-23 14:20 ` [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform Imre Deak
2023-03-23 14:33 ` Jani Nikula
2023-03-24 9:36 ` Kahola, Mika
2023-03-23 16:50 ` kernel test robot
2023-03-23 16:50 ` kernel test robot
2023-03-23 14:20 ` Imre Deak [this message]
2023-03-24 9:41 ` [Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 03/29] drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready() Imre Deak
2023-03-24 9:48 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all TC PHY functions Imre Deak
2023-03-24 9:51 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 05/29] drm/i915/tc: Move TC port fields to a new intel_tc_port struct Imre Deak
2023-03-24 12:01 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 06/29] drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count() Imre Deak
2023-03-24 13:07 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 07/29] drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c Imre Deak
2023-03-24 13:08 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 08/29] drm/i915/tc: Add TC PHY hook to get the PHY HPD live status Imre Deak
2023-03-24 13:10 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 09/29] drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state Imre Deak
2023-03-24 13:11 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 10/29] drm/i915/tc: Add TC PHY hook to read out the PHY HW state Imre Deak
2023-03-24 13:35 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 11/29] drm/i915/tc: Add generic TC PHY connect/disconnect handlers Imre Deak
2023-03-24 14:20 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 12/29] drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode() Imre Deak
2023-03-24 14:21 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 13/29] drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY Imre Deak
2023-03-27 11:04 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 14/29] drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode Imre Deak
2023-03-27 11:05 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 15/29] drm/i915/tc: Check TC mode instead of the VBT legacy flag Imre Deak
2023-03-27 11:06 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 16/29] drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks Imre Deak
2023-03-27 11:52 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 17/29] drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold() Imre Deak
2023-03-27 11:53 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 18/29] drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter Imre Deak
2023-03-27 11:55 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 19/29] drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain Imre Deak
2023-03-27 11:57 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on Imre Deak
2023-03-23 14:33 ` Jani Nikula
2023-03-23 17:08 ` Imre Deak
2023-03-27 12:00 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 21/29] drm/i915/tc: Add TC PHY hook to init the PHY Imre Deak
2023-03-27 12:01 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 22/29] drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection Imre Deak
2023-03-27 12:15 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 23/29] drm/i915/tc: Get power ref for reading the HPD live status register Imre Deak
2023-03-27 12:43 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 24/29] drm/i915/tc: Don't connect the PHY in intel_tc_port_connected() Imre Deak
2023-03-27 12:48 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 25/29] drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec Imre Deak
2023-03-28 10:13 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 26/29] drm/i915: Move shared DPLL disabling into CRTC disable hook Imre Deak
2023-03-28 10:14 ` Kahola, Mika
2023-03-30 16:16 ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-03-23 14:20 ` [Intel-gfx] [PATCH 27/29] drm/i915: Disable DPLLs before disconnecting the TC PHY Imre Deak
2023-03-28 10:15 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 28/29] drm/i915: Remove TC PHY disconnect workaround Imre Deak
2023-03-28 10:16 ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 29/29] drm/i915: Remove the encoder update_prepare()/complete() hooks Imre Deak
2023-03-28 10:18 ` Kahola, Mika
2023-03-23 16:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec Patchwork
2023-03-23 16:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-23 16:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-23 20:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-03-30 23:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2) Patchwork
2023-03-30 23:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-30 23:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-01 0:02 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-04-03 9:06 ` Imre Deak
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