Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all TC PHY functions
Date: Thu, 23 Mar 2023 16:20:10 +0200	[thread overview]
Message-ID: <20230323142035.1432621-5-imre.deak@intel.com> (raw)
In-Reply-To: <20230323142035.1432621-1-imre.deak@intel.com>

For consistency use the tc_phy prefix for all TC PHY functions.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 30 ++++++++++++-------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 9fecf24b69c16..d2afe8b65beee 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -15,7 +15,7 @@
 #include "intel_mg_phy_regs.h"
 #include "intel_tc.h"
 
-static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port);
+static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port);
 static bool tc_phy_is_ready(struct intel_digital_port *dig_port);
 static bool tc_phy_take_ownership(struct intel_digital_port *dig_port, bool take);
 
@@ -264,7 +264,7 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
  * ICL TC PHY handlers
  * -------------------
  */
-static u32 icl_tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 icl_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	u32 isr_bit = i915->display.hotplug.pch_hpd[dig_port->base.hpd_pin];
@@ -384,7 +384,7 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 		goto out_set_tbt_alt_mode;
 	}
 
-	live_status_mask = tc_port_live_status_mask(dig_port);
+	live_status_mask = tc_phy_hpd_live_status(dig_port);
 	if (!(live_status_mask & (BIT(TC_PORT_DP_ALT) | BIT(TC_PORT_LEGACY))) &&
 	    !dig_port->tc_legacy_port) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not required (live status %02x)\n",
@@ -408,7 +408,7 @@ static void icl_tc_phy_connect(struct intel_digital_port *dig_port,
 	 * Now we have to re-check the live state, in case the port recently
 	 * became disconnected. Not necessary for legacy mode.
 	 */
-	if (!(tc_port_live_status_mask(dig_port) & BIT(TC_PORT_DP_ALT))) {
+	if (!(tc_phy_hpd_live_status(dig_port) & BIT(TC_PORT_DP_ALT))) {
 		drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n",
 			    dig_port->tc_port_name);
 		goto out_release_phy;
@@ -457,7 +457,7 @@ static void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
  * ADLP TC PHY handlers
  * --------------------
  */
-static u32 adlp_tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 adlp_tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
@@ -535,14 +535,14 @@ static bool adlp_tc_phy_is_owned(struct intel_digital_port *dig_port)
  * Generic TC PHY handlers
  * -----------------------
  */
-static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
+static u32 tc_phy_hpd_live_status(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 
 	if (IS_ALDERLAKE_P(i915))
-		return adlp_tc_port_live_status_mask(dig_port);
+		return adlp_tc_phy_hpd_live_status(dig_port);
 
-	return icl_tc_port_live_status_mask(dig_port);
+	return icl_tc_phy_hpd_live_status(dig_port);
 }
 
 static bool tc_phy_is_ready(struct intel_digital_port *dig_port)
@@ -631,7 +631,7 @@ hpd_mask_to_tc_mode(u32 live_status_mask)
 static enum tc_port_mode
 tc_phy_hpd_live_mode(struct intel_digital_port *dig_port)
 {
-	u32 live_status_mask = tc_port_live_status_mask(dig_port);
+	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
 
 	return hpd_mask_to_tc_mode(live_status_mask);
 }
@@ -678,7 +678,7 @@ get_tc_mode_in_phy_not_owned_state(struct intel_digital_port *dig_port,
 }
 
 static enum tc_port_mode
-intel_tc_port_get_current_mode(struct intel_digital_port *dig_port)
+tc_phy_get_current_mode(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port_mode live_mode = tc_phy_hpd_live_mode(dig_port);
@@ -735,9 +735,9 @@ hpd_mask_to_target_mode(struct intel_digital_port *dig_port, u32 live_status_mas
 }
 
 static enum tc_port_mode
-intel_tc_port_get_target_mode(struct intel_digital_port *dig_port)
+tc_phy_get_target_mode(struct intel_digital_port *dig_port)
 {
-	u32 live_status_mask = tc_port_live_status_mask(dig_port);
+	u32 live_status_mask = tc_phy_hpd_live_status(dig_port);
 
 	return hpd_mask_to_target_mode(dig_port, live_status_mask);
 }
@@ -770,7 +770,7 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
 
 static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
 {
-	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
+	return tc_phy_get_target_mode(dig_port) != dig_port->tc_mode;
 }
 
 static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
@@ -847,7 +847,7 @@ void intel_tc_port_init_mode(struct intel_digital_port *dig_port)
 
 	tc_cold_wref = tc_cold_block(dig_port, &domain);
 
-	dig_port->tc_mode = intel_tc_port_get_current_mode(dig_port);
+	dig_port->tc_mode = tc_phy_get_current_mode(dig_port);
 	/*
 	 * Save the initial mode for the state check in
 	 * intel_tc_port_sanitize_mode().
@@ -976,7 +976,7 @@ bool intel_tc_port_connected_locked(struct intel_encoder *encoder)
 
 	drm_WARN_ON(&i915->drm, !intel_tc_port_ref_held(dig_port));
 
-	return tc_port_live_status_mask(dig_port) & BIT(dig_port->tc_mode);
+	return tc_phy_hpd_live_status(dig_port) & BIT(dig_port->tc_mode);
 }
 
 bool intel_tc_port_connected(struct intel_encoder *encoder)
-- 
2.37.1


  parent reply	other threads:[~2023-03-23 14:20 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-23 14:20 [Intel-gfx] [PATCH 00/29] drm/i915/tc: Align the ADLP TypeC sequences with bspec Imre Deak
2023-03-23 14:20 ` [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform Imre Deak
2023-03-23 14:33   ` Jani Nikula
2023-03-24  9:36     ` Kahola, Mika
2023-03-23 16:50   ` kernel test robot
2023-03-23 16:50   ` kernel test robot
2023-03-23 14:20 ` [Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions Imre Deak
2023-03-24  9:41   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 03/29] drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready() Imre Deak
2023-03-24  9:48   ` Kahola, Mika
2023-03-23 14:20 ` Imre Deak [this message]
2023-03-24  9:51   ` [Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all TC PHY functions Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 05/29] drm/i915/tc: Move TC port fields to a new intel_tc_port struct Imre Deak
2023-03-24 12:01   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 06/29] drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count() Imre Deak
2023-03-24 13:07   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 07/29] drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c Imre Deak
2023-03-24 13:08   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 08/29] drm/i915/tc: Add TC PHY hook to get the PHY HPD live status Imre Deak
2023-03-24 13:10   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 09/29] drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state Imre Deak
2023-03-24 13:11   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 10/29] drm/i915/tc: Add TC PHY hook to read out the PHY HW state Imre Deak
2023-03-24 13:35   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 11/29] drm/i915/tc: Add generic TC PHY connect/disconnect handlers Imre Deak
2023-03-24 14:20   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 12/29] drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode() Imre Deak
2023-03-24 14:21   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 13/29] drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY Imre Deak
2023-03-27 11:04   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 14/29] drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode Imre Deak
2023-03-27 11:05   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 15/29] drm/i915/tc: Check TC mode instead of the VBT legacy flag Imre Deak
2023-03-27 11:06   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 16/29] drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks Imre Deak
2023-03-27 11:52   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 17/29] drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold() Imre Deak
2023-03-27 11:53   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 18/29] drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter Imre Deak
2023-03-27 11:55   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 19/29] drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain Imre Deak
2023-03-27 11:57   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on Imre Deak
2023-03-23 14:33   ` Jani Nikula
2023-03-23 17:08     ` Imre Deak
2023-03-27 12:00       ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 21/29] drm/i915/tc: Add TC PHY hook to init the PHY Imre Deak
2023-03-27 12:01   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 22/29] drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection Imre Deak
2023-03-27 12:15   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 23/29] drm/i915/tc: Get power ref for reading the HPD live status register Imre Deak
2023-03-27 12:43   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 24/29] drm/i915/tc: Don't connect the PHY in intel_tc_port_connected() Imre Deak
2023-03-27 12:48   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 25/29] drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec Imre Deak
2023-03-28 10:13   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 26/29] drm/i915: Move shared DPLL disabling into CRTC disable hook Imre Deak
2023-03-28 10:14   ` Kahola, Mika
2023-03-30 16:16   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-03-23 14:20 ` [Intel-gfx] [PATCH 27/29] drm/i915: Disable DPLLs before disconnecting the TC PHY Imre Deak
2023-03-28 10:15   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 28/29] drm/i915: Remove TC PHY disconnect workaround Imre Deak
2023-03-28 10:16   ` Kahola, Mika
2023-03-23 14:20 ` [Intel-gfx] [PATCH 29/29] drm/i915: Remove the encoder update_prepare()/complete() hooks Imre Deak
2023-03-28 10:18   ` Kahola, Mika
2023-03-23 16:03 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec Patchwork
2023-03-23 16:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-23 16:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-23 20:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-03-30 23:23 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec (rev2) Patchwork
2023-03-30 23:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-30 23:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-01  0:02 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-04-03  9:06   ` Imre Deak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230323142035.1432621-5-imre.deak@intel.com \
    --to=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox