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From: John.C.Harrison@Intel.com
To: Intel-GFX@Lists.FreeDesktop.Org
Cc: DRI-Devel@Lists.FreeDesktop.Org
Subject: [Intel-gfx] [PATCH 5/5] drm/i915/guc: Capture list clean up - 4
Date: Thu,  6 Apr 2023 15:26:17 -0700	[thread overview]
Message-ID: <20230406222617.790484-6-John.C.Harrison@Intel.com> (raw)
In-Reply-To: <20230406222617.790484-1-John.C.Harrison@Intel.com>

From: John Harrison <John.C.Harrison@Intel.com>

Don't use GEN9 as a prefix for register lists that contain all GEN8
registers.

Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
index fbd0be4afc6d5..c1a75a2d17f1e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
@@ -30,12 +30,12 @@
 #define COMMON_BASE_GLOBAL \
 	{ FORCEWAKE_MT,             0,      0, "FORCEWAKE" }
 
-#define COMMON_GEN9BASE_GLOBAL \
+#define COMMON_GEN8BASE_GLOBAL \
 	{ ERROR_GEN6,               0,      0, "ERROR_GEN6" }, \
 	{ DONE_REG,                 0,      0, "DONE_REG" }, \
 	{ HSW_GTT_CACHE_EN,         0,      0, "HSW_GTT_CACHE_EN" }
 
-#define GEN9_GLOBAL \
+#define GEN8_GLOBAL \
 	{ GEN8_FAULT_TLB_DATA0,     0,      0, "GEN8_FAULT_TLB_DATA0" }, \
 	{ GEN8_FAULT_TLB_DATA1,     0,      0, "GEN8_FAULT_TLB_DATA1" }
 
@@ -99,7 +99,7 @@
 /* XE_LP Global */
 static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {
 	COMMON_BASE_GLOBAL,
-	COMMON_GEN9BASE_GLOBAL,
+	COMMON_GEN8BASE_GLOBAL,
 	COMMON_GEN12BASE_GLOBAL,
 };
 
@@ -140,11 +140,11 @@ static const struct __guc_mmio_reg_descr xe_lp_gsc_inst_regs[] = {
 	COMMON_BASE_ENGINE_INSTANCE,
 };
 
-/* GEN9 - Global */
+/* GEN8 - Global */
 static const struct __guc_mmio_reg_descr default_global_regs[] = {
 	COMMON_BASE_GLOBAL,
-	COMMON_GEN9BASE_GLOBAL,
-	GEN9_GLOBAL,
+	COMMON_GEN8BASE_GLOBAL,
+	GEN8_GLOBAL,
 };
 
 static const struct __guc_mmio_reg_descr default_rc_class_regs[] = {
-- 
2.39.1


  parent reply	other threads:[~2023-04-06 22:27 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-06 22:26 [Intel-gfx] [PATCH 0/5] Improvements to GuC error capture list processing John.C.Harrison
2023-04-06 22:26 ` [Intel-gfx] [PATCH 1/5] drm/i915/guc: Don't capture Gen8 regs on Xe devices John.C.Harrison
2023-04-25 17:55   ` Teres Alexis, Alan Previn
2023-04-26 17:22     ` John Harrison
2023-04-26 17:23     ` John Harrison
2023-04-26 21:14       ` Teres Alexis, Alan Previn
2023-04-28 18:21         ` John Harrison
2023-04-06 22:26 ` [Intel-gfx] [PATCH 2/5] drm/i915/guc: Capture list clean up - 1 John.C.Harrison
2023-04-25 18:28   ` Teres Alexis, Alan Previn
2023-04-06 22:26 ` [Intel-gfx] [PATCH 3/5] drm/i915/guc: Capture list clean up - 2 John.C.Harrison
2023-04-25 18:54   ` Teres Alexis, Alan Previn
2023-04-26 18:01     ` John Harrison
2023-04-06 22:26 ` [Intel-gfx] [PATCH 4/5] drm/i915/guc: Capture list clean up - 3 John.C.Harrison
2023-04-25 19:05   ` Teres Alexis, Alan Previn
2023-04-26 17:29     ` John Harrison
2023-04-26 17:37       ` John Harrison
2023-04-26 18:24         ` [Intel-gfx] [PATCH 6/6] drm/i915/guc: Capture list clean up - 5 John.C.Harrison
2023-04-26 21:16           ` Teres Alexis, Alan Previn
2023-04-06 22:26 ` John.C.Harrison [this message]
2023-04-25 19:10   ` [Intel-gfx] [PATCH 5/5] drm/i915/guc: Capture list clean up - 4 Teres Alexis, Alan Previn
2023-04-06 23:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Improvements to GuC error capture list processing Patchwork
2023-04-06 23:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-07 11:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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