public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: John Harrison <john.c.harrison@intel.com>
To: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>,
	"Intel-GFX@Lists.FreeDesktop.Org"
	<Intel-GFX@Lists.FreeDesktop.Org>
Cc: "DRI-Devel@Lists.FreeDesktop.Org" <DRI-Devel@Lists.FreeDesktop.Org>
Subject: Re: [Intel-gfx] [PATCH 4/5] drm/i915/guc: Capture list clean up - 3
Date: Wed, 26 Apr 2023 10:29:12 -0700	[thread overview]
Message-ID: <413b6fc5-3182-d5cd-9a86-d7a4d814064c@intel.com> (raw)
In-Reply-To: <9e0711a1e40cdeccdf6ae003e924dfec5cdbb77b.camel@intel.com>

[-- Attachment #1: Type: text/plain, Size: 2182 bytes --]

On 4/25/2023 12:05, Teres Alexis, Alan Previn wrote:
> On Thu, 2023-04-06 at 15:26 -0700,John.C.Harrison@Intel.com  wrote:
>> From: John Harrison<John.C.Harrison@Intel.com>
>>
>> Fix Xe_LP name.
>>
>> Signed-off-by: John Harrison<John.C.Harrison@Intel.com>
> alan:snip
>
>
>> -/* GEN9/XE_LPD - Render / Compute Per-Engine-Instance */
>> +/* GEN8+ Render / Compute Per-Engine-Instance */
> alan: two comments on this:
> 1. shouldnt this go with the earlier patch?
See comment in cover letter:

    NB: The changes are being sent as multiple patches to make code review
    simpler. However, before merging it may be better to squash into a
    single patch, especially if it going to be sent with a 'fixes' tag.



> 2. i agree with renaming the names of the register to reflect the when
>     all of those registers got first introduced... however, considering
>     we only support GuC on Gen12 and beyond (we do have select CI-tests
>     that enable GuC on Gen9 but not on Gen8 and before), should we also
>     change the comments? I think the comment should reflect the usage
>     not just follow the same name of the registe #define - else why even
>     add the comments. (please apply this same comment for gen8_vd_inst_regs,
>     gen8_vec_inst_regs and gen8_blt_inst_regs).
> alternatively, we could keep those GEN8+ comments above the list but maybe
> add just one comment in the default list - see below.
Because at some point we might want to start supporting other platforms. 
My view is that the comment should be accurate. These registers exist on 
Gen8+. So if you are building a register list for a Gen8 or later 
device, they can/should be included.

> alan: snip
>
>> @@ -366,7 +364,7 @@ guc_capture_get_device_reglist(struct intel_guc *guc)
>>   	const struct __guc_mmio_reg_descr_group *lists;
>>   
>>   	if (GRAPHICS_VER(i915) >= 12)
>> -		lists = xe_lpd_lists;
>> +		lists = xe_lp_lists;
>>   	else
>>   		lists = default_lists;
> alan: perhaps add a comment that we really don't support any of this
> on anything below Gen9?
It wasn't me that named it 'default_' rather than gen9_. I could add yet 
another rename of s/default_/gen9_/g...

John.

>
>>   

[-- Attachment #2: Type: text/html, Size: 3873 bytes --]

  reply	other threads:[~2023-04-26 17:29 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-06 22:26 [Intel-gfx] [PATCH 0/5] Improvements to GuC error capture list processing John.C.Harrison
2023-04-06 22:26 ` [Intel-gfx] [PATCH 1/5] drm/i915/guc: Don't capture Gen8 regs on Xe devices John.C.Harrison
2023-04-25 17:55   ` Teres Alexis, Alan Previn
2023-04-26 17:22     ` John Harrison
2023-04-26 17:23     ` John Harrison
2023-04-26 21:14       ` Teres Alexis, Alan Previn
2023-04-28 18:21         ` John Harrison
2023-04-06 22:26 ` [Intel-gfx] [PATCH 2/5] drm/i915/guc: Capture list clean up - 1 John.C.Harrison
2023-04-25 18:28   ` Teres Alexis, Alan Previn
2023-04-06 22:26 ` [Intel-gfx] [PATCH 3/5] drm/i915/guc: Capture list clean up - 2 John.C.Harrison
2023-04-25 18:54   ` Teres Alexis, Alan Previn
2023-04-26 18:01     ` John Harrison
2023-04-06 22:26 ` [Intel-gfx] [PATCH 4/5] drm/i915/guc: Capture list clean up - 3 John.C.Harrison
2023-04-25 19:05   ` Teres Alexis, Alan Previn
2023-04-26 17:29     ` John Harrison [this message]
2023-04-26 17:37       ` John Harrison
2023-04-26 18:24         ` [Intel-gfx] [PATCH 6/6] drm/i915/guc: Capture list clean up - 5 John.C.Harrison
2023-04-26 21:16           ` Teres Alexis, Alan Previn
2023-04-06 22:26 ` [Intel-gfx] [PATCH 5/5] drm/i915/guc: Capture list clean up - 4 John.C.Harrison
2023-04-25 19:10   ` Teres Alexis, Alan Previn
2023-04-06 23:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Improvements to GuC error capture list processing Patchwork
2023-04-06 23:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-07 11:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=413b6fc5-3182-d5cd-9a86-d7a4d814064c@intel.com \
    --to=john.c.harrison@intel.com \
    --cc=DRI-Devel@Lists.FreeDesktop.Org \
    --cc=Intel-GFX@Lists.FreeDesktop.Org \
    --cc=alan.previn.teres.alexis@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox