From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/6] drm/i915: Expose crtc CTM property on ilk/snb
Date: Wed, 12 Apr 2023 01:29:27 +0300 [thread overview]
Message-ID: <20230411222931.15127-3-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230411222931.15127-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The ilk/snb code is internally fully capable of handling the
CTM property, so expose it.
Note that we still choose not to expose DEGAMMA_LUT though.
The hardware is capable if degamma or gamma, but not both
similtanously due to lack of the split gamma mode. Exposing
both LUTs might encourage userspace to try enabling both
at the same time.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 07f1afe1d406..4fc16cac052d 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3473,7 +3473,7 @@ void intel_color_crtc_init(struct intel_crtc *crtc)
gamma_lut_size = INTEL_INFO(i915)->display.color.gamma_lut_size;
degamma_lut_size = INTEL_INFO(i915)->display.color.degamma_lut_size;
- has_ctm = degamma_lut_size != 0;
+ has_ctm = DISPLAY_VER(i915) >= 5 && !IS_VALLEYVIEW(i915);
/*
* "DPALETTE_A: NOTE: The 8-bit (non-10-bit) mode is the
--
2.39.2
next prev parent reply other threads:[~2023-04-11 22:29 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-11 22:29 [Intel-gfx] [PATCH 0/6] drm/i915: CTM stuff mostly Ville Syrjala
2023-04-11 22:29 ` [Intel-gfx] [PATCH 1/6] drm/uapi: Document CTM matrix better Ville Syrjala
2023-04-27 22:31 ` Xaver Hugl
2023-04-28 13:39 ` Ville Syrjälä
2023-04-28 9:27 ` Simon Ser
2023-04-11 22:29 ` Ville Syrjala [this message]
2023-04-11 22:29 ` [Intel-gfx] [PATCH 3/6] drm/i915: Fix CHV CGM CSC coefficient sign handling Ville Syrjala
2023-04-11 22:29 ` [Intel-gfx] [PATCH 4/6] drm/i915: Implement CTM property support for VLV Ville Syrjala
2023-04-11 22:29 ` [Intel-gfx] [PATCH 5/6] drm/i915: No 10bit gamma on desktop gen3 parts Ville Syrjala
2023-04-11 22:29 ` [Intel-gfx] [PATCH 6/6] drm/i915: Do state check for color management changes Ville Syrjala
2023-04-12 1:58 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: CTM stuff mostly Patchwork
2023-04-12 1:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-12 2:15 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-04-12 6:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: CTM stuff mostly (rev2) Patchwork
2023-04-12 6:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-12 6:27 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-04-13 5:50 ` Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230411222931.15127-3-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox