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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH v2 1/2] drm/i915: Make intel_{mpllb, c10pll}_state_verify() safer
Date: Fri, 14 Apr 2023 22:01:59 +0300	[thread overview]
Message-ID: <20230414190159.7904-1-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20230413200602.6037-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

intel_{mpllb,c10pll}_state_verify() blows up if you call them
for a non-modeset/fastset commit on account of the relevant
connector not being part of the overall atomic state.
Currently the state checker only runs for modeset/fastset
commits, but for testing purposes it is sometimes desirable
to run it for other commits too. Check for modeset/fastset
in intel_{mpllb,c10pll}_state_verify() itself to make this safe.

v2: Give the new intel_c10pll_state_verify() the same treatment
    Add comment to explain why we do this

Reviewed-by: Jani Nikula <jani.nikula@intel.com> #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 5 +++++
 drivers/gpu/drm/i915/display/intel_snps_phy.c | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index d46ff3401e5e..83180074b512 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -1874,6 +1874,11 @@ void intel_c10pll_state_verify(struct intel_atomic_state *state,
 	if (!new_crtc_state->hw.active)
 		return;
 
+	/* intel_get_crtc_new_encoder() only works for modeset/fastset commits */
+	if (!intel_crtc_needs_modeset(new_crtc_state) &&
+	    !intel_crtc_needs_fastset(new_crtc_state))
+		return;
+
 	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
 	phy = intel_port_to_phy(i915, encoder->port);
 
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index 1cfb94b5cedb..a72677bf617b 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -2007,6 +2007,11 @@ void intel_mpllb_state_verify(struct intel_atomic_state *state,
 	if (!new_crtc_state->hw.active)
 		return;
 
+	/* intel_get_crtc_new_encoder() only works for modeset/fastset commits */
+	if (!intel_crtc_needs_modeset(new_crtc_state) &&
+	    !intel_crtc_needs_fastset(new_crtc_state))
+		return;
+
 	encoder = intel_get_crtc_new_encoder(state, new_crtc_state);
 	intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
 
-- 
2.39.2


  parent reply	other threads:[~2023-04-14 19:02 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-13 20:06 [Intel-gfx] [PATCH 1/2] drm/i915: Make intel_mpllb_state_verify() safer Ville Syrjala
2023-04-13 20:06 ` [Intel-gfx] [PATCH 2/2] drm/i915: Make intel_get_crtc_new_encoder() less oopsy Ville Syrjala
2023-04-14  9:31   ` Jani Nikula
2023-04-14  9:39     ` Jani Nikula
2023-04-14  0:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: Make intel_mpllb_state_verify() safer Patchwork
2023-04-14  0:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-14  6:48 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-04-14  9:38 ` [Intel-gfx] [PATCH 1/2] " Jani Nikula
2023-04-14 19:01 ` Ville Syrjala [this message]
2023-04-14 19:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915: Make intel_{mpllb, c10pll}_state_verify() safer (rev2) Patchwork
2023-04-14 19:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-15  3:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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