From: Mika Kahola <mika.kahola@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 06/13] drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA
Date: Thu, 20 Apr 2023 15:40:43 +0300 [thread overview]
Message-ID: <20230420124050.3617608-7-mika.kahola@intel.com> (raw)
In-Reply-To: <20230420124050.3617608-1-mika.kahola@intel.com>
Use MPLLA for DP2.0 rates 20G and 20G, when ssc is enabled.
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index f7720acaf58c..4231ba98f075 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2340,8 +2340,11 @@ static void intel_program_port_clock_ctl(struct intel_encoder *encoder,
val |= XELPDP_DDI_CLOCK_SELECT(XELPDP_DDI_CLOCK_SELECT_MAXPCLK);
/* TODO: HDMI FRL */
- /* TODO: DP2.0 10G and 20G rates enable MPLLA*/
- val |= crtc_state->cx0pll_state.ssc_enabled ? XELPDP_SSC_ENABLE_PLLB : 0;
+ /* DP2.0 10G and 20G rates enable MPLLA*/
+ if (crtc_state->port_clock == 1000000 || crtc_state->port_clock == 2000000)
+ val |= crtc_state->cx0pll_state.ssc_enabled ? XELPDP_SSC_ENABLE_PLLA : 0;
+ else
+ val |= crtc_state->cx0pll_state.ssc_enabled ? XELPDP_SSC_ENABLE_PLLB : 0;
intel_de_rmw(i915, XELPDP_PORT_CLOCK_CTL(encoder->port),
XELPDP_LANE1_PHY_CLOCK_SELECT | XELPDP_FORWARD_CLOCK_UNGATE |
--
2.34.1
next prev parent reply other threads:[~2023-04-20 12:46 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-20 12:40 [Intel-gfx] [PATCH 00/13] drm/i915/mtl: Add support for C20 phy Mika Kahola
2023-04-20 12:40 ` [Intel-gfx] [PATCH 01/13] drm/i915/mtl: C20 PLL programming Mika Kahola
2023-04-21 23:24 ` Radhakrishna Sripada
2023-04-24 8:39 ` Kahola, Mika
2023-04-27 3:22 ` Murthy, Arun R
2023-04-28 9:07 ` Andi Shyti
2023-04-28 9:11 ` Kahola, Mika
2023-04-20 12:40 ` [Intel-gfx] [PATCH 02/13] drm/i915/mtl: C20 HW readout Mika Kahola
2023-04-24 20:56 ` Radhakrishna Sripada
2023-04-26 11:43 ` Kahola, Mika
2023-04-27 16:47 ` Sripada, Radhakrishna
2023-04-27 3:31 ` Murthy, Arun R
2023-04-27 10:25 ` Kahola, Mika
2023-04-28 9:14 ` Andi Shyti
2023-04-20 12:40 ` [Intel-gfx] [PATCH 03/13] drm/i915/mtl: Dump C20 pll hw state Mika Kahola
2023-04-24 21:18 ` Radhakrishna Sripada
2023-04-27 3:37 ` Murthy, Arun R
2023-04-28 9:15 ` Andi Shyti
2023-04-20 12:40 ` [Intel-gfx] [PATCH 04/13] drm/i915/mtl: C20 port clock calculation Mika Kahola
2023-04-25 19:08 ` Radhakrishna Sripada
2023-04-27 3:50 ` Murthy, Arun R
2023-04-20 12:40 ` [Intel-gfx] [PATCH 05/13] drm/i915/mtl: Add voltage swing sequence for C20 Mika Kahola
2023-04-27 4:29 ` Murthy, Arun R
2023-04-20 12:40 ` Mika Kahola [this message]
2023-04-24 18:09 ` [Intel-gfx] [PATCH 06/13] drm/i915/mtl: For DP2.0 10G and 20G rates use MPLLA Radhakrishna Sripada
2023-04-27 4:31 ` Murthy, Arun R
2023-04-27 9:14 ` Manna, Animesh
2023-05-03 8:25 ` Jani Nikula
2023-04-20 12:40 ` [Intel-gfx] [PATCH 07/13] drm/i915/mtl: Enabling/disabling sequence Thunderbolt pll Mika Kahola
2023-04-25 19:32 ` Radhakrishna Sripada
2023-04-28 9:20 ` Andi Shyti
2023-04-20 12:40 ` [Intel-gfx] [PATCH 08/13] drm/i915/mtl: Readout Thunderbolt HW state Mika Kahola
2023-04-25 20:11 ` Radhakrishna Sripada
2023-04-20 12:40 ` [Intel-gfx] [PATCH 09/13] drm/i915/mtl: Define mask for DDI AUX interrupts Mika Kahola
2023-04-25 20:29 ` Radhakrishna Sripada
2023-04-20 12:40 ` [Intel-gfx] [PATCH 10/13] drm/i915/mtl: Power up TCSS Mika Kahola
2023-04-27 16:09 ` Matt Atwood
2023-04-20 12:40 ` [Intel-gfx] [PATCH 11/13] drm/i915/mtl: TypeC HPD live status query Mika Kahola
2023-04-27 16:13 ` Matt Atwood
2023-04-20 12:40 ` [Intel-gfx] [PATCH 12/13] drm/i915/mtl: Pin assignment for TypeC Mika Kahola
2023-04-27 16:17 ` Matt Atwood
2023-04-20 12:40 ` [Intel-gfx] [PATCH 13/13] drm/i915/mtl: Enable TC ports Mika Kahola
2023-04-27 15:49 ` Clint Taylor
2023-04-20 15:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/mtl: Add support for C20 phy Patchwork
2023-04-20 15:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-04-20 15:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-04-20 21:38 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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