[Intel-gfx] [PATCH 1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

[Intel-gfx] [PATCH 1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

[Jani Nikula]

In general, we don't do assertions that a function gets called on the
right platforms, and if we did, it should not be a state warn.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index ed372d227aa7..936b8de9e439 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -464,8 +464,6 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)
 	u32 val;
 	bool enabled;
 
-	I915_STATE_WARN_ON(!(HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)));
-
 	val = intel_de_read(dev_priv, PCH_DREF_CONTROL);
 	enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |
 			    DREF_SUPERSPREAD_SOURCE_MASK));
-- 
2.39.2

[Intel-gfx] [PATCH 2/4] drm/i915/crtc: replace I915_STATE_WARN_ON() with I915_STATE_WARN()

[Jani Nikula]

Describe the assertion better.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_crtc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index df7d05f1e14b..1e3f88d00609 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -35,7 +35,9 @@
 
 static void assert_vblank_disabled(struct drm_crtc *crtc)
 {
-	if (I915_STATE_WARN_ON(drm_crtc_vblank_get(crtc) == 0))
+	if (I915_STATE_WARN(drm_crtc_vblank_get(crtc) == 0,
+			    "[CRTC:%d:%s] vblank assertion failure (expected off, current on)\n",
+			    crtc->base.id, crtc->name))
 		drm_crtc_vblank_put(crtc);
 }
 
-- 
2.39.2

Re: [Intel-gfx] [PATCH 2/4] drm/i915/crtc: replace I915_STATE_WARN_ON() with I915_STATE_WARN()

[Rodrigo Vivi]

On Fri, May 12, 2023 at 02:04:42PM +0300, Jani Nikula wrote:
> Describe the assertion better.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_crtc.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index df7d05f1e14b..1e3f88d00609 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -35,7 +35,9 @@
>  
>  static void assert_vblank_disabled(struct drm_crtc *crtc)
>  {
> -	if (I915_STATE_WARN_ON(drm_crtc_vblank_get(crtc) == 0))
> +	if (I915_STATE_WARN(drm_crtc_vblank_get(crtc) == 0,
> +			    "[CRTC:%d:%s] vblank assertion failure (expected off, current on)\n",
> +			    crtc->base.id, crtc->name))
>  		drm_crtc_vblank_put(crtc);
>  }
>  
> -- 
> 2.39.2
> 

[Intel-gfx] [PATCH 3/4] drm/i915/display: remove I915_STATE_WARN_ON()

[Jani Nikula]

Remove the unused macro.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index ac95961f68ba..8f451aaf5760 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -538,12 +538,12 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
 #define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
 #define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
 
-/* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
- * WARN_ON()) for hw state sanity checks to check for unexpected conditions
- * which may not necessarily be a user visible problem.  This will either
- * WARN() or DRM_ERROR() depending on the verbose_checks moduleparam, to
- * enable distros and users to tailor their preferred amount of i915 abrt
- * spam.
+/*
+ * Use I915_STATE_WARN(x) (rather than WARN() and WARN_ON()) for hw state sanity
+ * checks to check for unexpected conditions which may not necessarily be a user
+ * visible problem. This will either WARN() or DRM_ERROR() depending on the
+ * verbose_state_checks module param, to enable distros and users to tailor
+ * their preferred amount of i915 abrt spam.
  */
 #define I915_STATE_WARN(condition, format...) ({			\
 	int __ret_warn_on = !!(condition);				\
@@ -553,9 +553,6 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
 	unlikely(__ret_warn_on);					\
 })
 
-#define I915_STATE_WARN_ON(x)						\
-	I915_STATE_WARN((x), "%s", "WARN_ON(" __stringify(x) ")")
-
 bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915);
 
 #endif
-- 
2.39.2

Re: [Intel-gfx] [PATCH 3/4] drm/i915/display: remove I915_STATE_WARN_ON()

[Rodrigo Vivi]

On Fri, May 12, 2023 at 02:04:43PM +0300, Jani Nikula wrote:
> Remove the unused macro.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.h | 15 ++++++---------
>  1 file changed, 6 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index ac95961f68ba..8f451aaf5760 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -538,12 +538,12 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
>  #define assert_transcoder_enabled(d, t) assert_transcoder(d, t, true)
>  #define assert_transcoder_disabled(d, t) assert_transcoder(d, t, false)
>  
> -/* Use I915_STATE_WARN(x) and I915_STATE_WARN_ON() (rather than WARN() and
> - * WARN_ON()) for hw state sanity checks to check for unexpected conditions
> - * which may not necessarily be a user visible problem.  This will either
> - * WARN() or DRM_ERROR() depending on the verbose_checks moduleparam, to
> - * enable distros and users to tailor their preferred amount of i915 abrt
> - * spam.
> +/*
> + * Use I915_STATE_WARN(x) (rather than WARN() and WARN_ON()) for hw state sanity
> + * checks to check for unexpected conditions which may not necessarily be a user
> + * visible problem. This will either WARN() or DRM_ERROR() depending on the
> + * verbose_state_checks module param, to enable distros and users to tailor
> + * their preferred amount of i915 abrt spam.
>   */
>  #define I915_STATE_WARN(condition, format...) ({			\
>  	int __ret_warn_on = !!(condition);				\
> @@ -553,9 +553,6 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
>  	unlikely(__ret_warn_on);					\
>  })
>  
> -#define I915_STATE_WARN_ON(x)						\
> -	I915_STATE_WARN((x), "%s", "WARN_ON(" __stringify(x) ")")
> -
>  bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915);
>  
>  #endif
> -- 
> 2.39.2
> 

[Intel-gfx] [PATCH 4/4] drm/i915/display: add i915 parameter to I915_STATE_WARN()

[Jani Nikula]

Add i915 parameter to I915_STATE_WARN() and use device based logging.

Done using cocci + hand edited where there was no i915 local variable
ready.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c         |  4 +-
 drivers/gpu/drm/i915/display/intel_crtc.c     |  4 +-
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 10 ++---
 drivers/gpu/drm/i915/display/intel_display.c  |  9 +++--
 drivers/gpu/drm/i915/display/intel_display.h  |  7 ++--
 .../drm/i915/display/intel_display_power.c    | 37 ++++++++++++-------
 drivers/gpu/drm/i915/display/intel_dpll.c     |  2 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 30 ++++++++-------
 drivers/gpu/drm/i915/display/intel_fdi.c      |  9 +++--
 .../drm/i915/display/intel_modeset_verify.c   | 35 ++++++++++--------
 .../gpu/drm/i915/display/intel_pch_display.c  | 20 +++++-----
 drivers/gpu/drm/i915/display/intel_pps.c      |  7 ++--
 drivers/gpu/drm/i915/display/intel_snps_phy.c |  2 +-
 drivers/gpu/drm/i915/display/vlv_dsi_pll.c    |  2 +-
 14 files changed, 100 insertions(+), 78 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 920d570f7594..112d91d81fdc 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -169,7 +169,7 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state)
 	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
 	bool cur_state = intel_de_read(dev_priv, intel_dp->output_reg) & DP_PORT_EN;
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"[ENCODER:%d:%s] state assertion failure (expected %s, current %s)\n",
 			dig_port->base.base.base.id, dig_port->base.base.name,
 			str_on_off(state), str_on_off(cur_state));
@@ -180,7 +180,7 @@ static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state)
 {
 	bool cur_state = intel_de_read(dev_priv, DP_A) & DP_PLL_ENABLE;
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"eDP PLL state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 1e3f88d00609..ecae9bf05269 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -35,7 +35,9 @@
 
 static void assert_vblank_disabled(struct drm_crtc *crtc)
 {
-	if (I915_STATE_WARN(drm_crtc_vblank_get(crtc) == 0,
+	struct drm_i915_private *i915 = to_i915(crtc->dev);
+
+	if (I915_STATE_WARN(i915, drm_crtc_vblank_get(crtc) == 0,
 			    "[CRTC:%d:%s] vblank assertion failure (expected off, current on)\n",
 			    crtc->base.id, crtc->name))
 		drm_crtc_vblank_put(crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index d94127e7448b..ef0615cdc8a0 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2945,18 +2945,18 @@ void intel_c10pll_state_verify(struct intel_atomic_state *state,
 	for (i = 0; i < ARRAY_SIZE(mpllb_sw_state->pll); i++) {
 		u8 expected = mpllb_sw_state->pll[i];
 
-		I915_STATE_WARN(mpllb_hw_state.pll[i] != expected,
+		I915_STATE_WARN(i915, mpllb_hw_state.pll[i] != expected,
 				"[CRTC:%d:%s] mismatch in C10MPLLB: Register[%d] (expected 0x%02x, found 0x%02x)",
-				crtc->base.base.id, crtc->base.name,
-				i, expected, mpllb_hw_state.pll[i]);
+				crtc->base.base.id, crtc->base.name, i,
+				expected, mpllb_hw_state.pll[i]);
 	}
 
-	I915_STATE_WARN(mpllb_hw_state.tx != mpllb_sw_state->tx,
+	I915_STATE_WARN(i915, mpllb_hw_state.tx != mpllb_sw_state->tx,
 			"[CRTC:%d:%s] mismatch in C10MPLLB: Register TX0 (expected 0x%02x, found 0x%02x)",
 			crtc->base.base.id, crtc->base.name,
 			mpllb_sw_state->tx, mpllb_hw_state.tx);
 
-	I915_STATE_WARN(mpllb_hw_state.cmn != mpllb_sw_state->cmn,
+	I915_STATE_WARN(i915, mpllb_hw_state.cmn != mpllb_sw_state->cmn,
 			"[CRTC:%d:%s] mismatch in C10MPLLB: Register CMN0 (expected 0x%02x, found 0x%02x)",
 			crtc->base.base.id, crtc->base.name,
 			mpllb_sw_state->cmn, mpllb_hw_state.cmn);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1d5d42a40803..4b70b389e0cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -322,20 +322,21 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
 		cur_state = false;
 	}
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"transcoder %s assertion failure (expected %s, current %s)\n",
-			transcoder_name(cpu_transcoder),
-			str_on_off(state), str_on_off(cur_state));
+			transcoder_name(cpu_transcoder), str_on_off(state),
+			str_on_off(cur_state));
 }
 
 static void assert_plane(struct intel_plane *plane, bool state)
 {
+	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe;
 	bool cur_state;
 
 	cur_state = plane->get_hw_state(plane, &pipe);
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(i915, cur_state != state,
 			"%s assertion failure (expected %s, current %s)\n",
 			plane->base.name, str_on_off(state),
 			str_on_off(cur_state));
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 8f451aaf5760..ee3def6e14a8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -545,11 +545,12 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
  * verbose_state_checks module param, to enable distros and users to tailor
  * their preferred amount of i915 abrt spam.
  */
-#define I915_STATE_WARN(condition, format...) ({			\
+#define I915_STATE_WARN(__i915, condition, format...) ({		\
+	struct drm_device *drm = &(__i915)->drm;			\
 	int __ret_warn_on = !!(condition);				\
 	if (unlikely(__ret_warn_on))					\
-		if (!WARN(i915_modparams.verbose_state_checks, format))	\
-			DRM_ERROR(format);				\
+		if (!drm_WARN(drm, i915_modparams.verbose_state_checks, format)) \
+			drm_err(drm, format);				\
 	unlikely(__ret_warn_on);					\
 })
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 5150069f3f82..6ed2ece89c3f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1165,31 +1165,39 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 	struct intel_crtc *crtc;
 
 	for_each_intel_crtc(&dev_priv->drm, crtc)
-		I915_STATE_WARN(crtc->active, "CRTC for pipe %c enabled\n",
+		I915_STATE_WARN(dev_priv, crtc->active,
+				"CRTC for pipe %c enabled\n",
 				pipe_name(crtc->pipe));
 
-	I915_STATE_WARN(intel_de_read(dev_priv, HSW_PWR_WELL_CTL2),
+	I915_STATE_WARN(dev_priv, intel_de_read(dev_priv, HSW_PWR_WELL_CTL2),
 			"Display power well on\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE,
 			"SPLL enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, WRPLL_CTL(0)) & WRPLL_PLL_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, WRPLL_CTL(0)) & WRPLL_PLL_ENABLE,
 			"WRPLL1 enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, WRPLL_CTL(1)) & WRPLL_PLL_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, WRPLL_CTL(1)) & WRPLL_PLL_ENABLE,
 			"WRPLL2 enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON,
 			"Panel power on\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
 			"CPU PWM1 enabled\n");
 	if (IS_HASWELL(dev_priv))
-		I915_STATE_WARN(intel_de_read(dev_priv, HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,
+		I915_STATE_WARN(dev_priv,
+				intel_de_read(dev_priv, HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,
 				"CPU PWM2 enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
 			"PCH PWM1 enabled\n");
-	I915_STATE_WARN((intel_de_read(dev_priv, UTIL_PIN_CTL) &
-			 (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) ==
-			(UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
+	I915_STATE_WARN(dev_priv,
+			(intel_de_read(dev_priv, UTIL_PIN_CTL) & (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) == (UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
 			"Utility pin enabled in PWM mode\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,
 			"PCH GTC enabled\n");
 
 	/*
@@ -1198,7 +1206,8 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 	 * gen-specific and since we only disable LCPLL after we fully disable
 	 * the interrupts, the check below should be enough.
 	 */
-	I915_STATE_WARN(intel_irqs_enabled(dev_priv), "IRQs enabled\n");
+	I915_STATE_WARN(dev_priv, intel_irqs_enabled(dev_priv),
+			"IRQs enabled\n");
 }
 
 static u32 hsw_read_dcomp(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index ca0f362a40e3..824be7f03724 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -2080,7 +2080,7 @@ static void assert_pll(struct drm_i915_private *dev_priv,
 	bool cur_state;
 
 	cur_state = intel_de_read(dev_priv, DPLL(pipe)) & DPLL_VCO_ENABLE;
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"PLL state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 936b8de9e439..ee55ab309568 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -169,8 +169,8 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
 		return;
 
 	cur_state = intel_dpll_get_hw_state(dev_priv, pll, &hw_state);
-	I915_STATE_WARN(cur_state != state,
-	     "%s assertion failure (expected %s, current %s)\n",
+	I915_STATE_WARN(dev_priv, cur_state != state,
+			"%s assertion failure (expected %s, current %s)\n",
 			pll->info->name, str_on_off(state),
 			str_on_off(cur_state));
 }
@@ -467,7 +467,8 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)
 	val = intel_de_read(dev_priv, PCH_DREF_CONTROL);
 	enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |
 			    DREF_SUPERSPREAD_SOURCE_MASK));
-	I915_STATE_WARN(!enabled, "PCH refclk assertion failure, should be active but is disabled\n");
+	I915_STATE_WARN(dev_priv, !enabled,
+			"PCH refclk assertion failure, should be active but is disabled\n");
 }
 
 static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv,
@@ -4405,17 +4406,18 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
 	active = intel_dpll_get_hw_state(dev_priv, pll, &dpll_hw_state);
 
 	if (!(pll->info->flags & INTEL_DPLL_ALWAYS_ON)) {
-		I915_STATE_WARN(!pll->on && pll->active_mask,
+		I915_STATE_WARN(dev_priv, !pll->on && pll->active_mask,
 				"pll in active use but not on in sw tracking\n");
-		I915_STATE_WARN(pll->on && !pll->active_mask,
+		I915_STATE_WARN(dev_priv, pll->on && !pll->active_mask,
 				"pll is on but not used by any active pipe\n");
-		I915_STATE_WARN(pll->on != active,
+		I915_STATE_WARN(dev_priv, pll->on != active,
 				"pll on state mismatch (expected %i, found %i)\n",
 				pll->on, active);
 	}
 
 	if (!crtc) {
-		I915_STATE_WARN(pll->active_mask & ~pll->state.pipe_mask,
+		I915_STATE_WARN(dev_priv,
+				pll->active_mask & ~pll->state.pipe_mask,
 				"more active pll users than references: 0x%x vs 0x%x\n",
 				pll->active_mask, pll->state.pipe_mask);
 
@@ -4425,20 +4427,20 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
 	pipe_mask = BIT(crtc->pipe);
 
 	if (new_crtc_state->hw.active)
-		I915_STATE_WARN(!(pll->active_mask & pipe_mask),
+		I915_STATE_WARN(dev_priv, !(pll->active_mask & pipe_mask),
 				"pll active mismatch (expected pipe %c in active mask 0x%x)\n",
 				pipe_name(crtc->pipe), pll->active_mask);
 	else
-		I915_STATE_WARN(pll->active_mask & pipe_mask,
+		I915_STATE_WARN(dev_priv, pll->active_mask & pipe_mask,
 				"pll active mismatch (didn't expect pipe %c in active mask 0x%x)\n",
 				pipe_name(crtc->pipe), pll->active_mask);
 
-	I915_STATE_WARN(!(pll->state.pipe_mask & pipe_mask),
+	I915_STATE_WARN(dev_priv, !(pll->state.pipe_mask & pipe_mask),
 			"pll enabled crtcs mismatch (expected 0x%x in 0x%x)\n",
 			pipe_mask, pll->state.pipe_mask);
 
-	I915_STATE_WARN(pll->on && memcmp(&pll->state.hw_state,
-					  &dpll_hw_state,
+	I915_STATE_WARN(dev_priv,
+			pll->on && memcmp(&pll->state.hw_state, &dpll_hw_state,
 					  sizeof(dpll_hw_state)),
 			"pll hw state mismatch\n");
 }
@@ -4458,10 +4460,10 @@ void intel_shared_dpll_state_verify(struct intel_crtc *crtc,
 		u8 pipe_mask = BIT(crtc->pipe);
 		struct intel_shared_dpll *pll = old_crtc_state->shared_dpll;
 
-		I915_STATE_WARN(pll->active_mask & pipe_mask,
+		I915_STATE_WARN(dev_priv, pll->active_mask & pipe_mask,
 				"pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n",
 				pipe_name(crtc->pipe), pll->active_mask);
-		I915_STATE_WARN(pll->state.pipe_mask & pipe_mask,
+		I915_STATE_WARN(dev_priv, pll->state.pipe_mask & pipe_mask,
 				"pll enabled crtcs mismatch (found %x in enabled mask (0x%x))\n",
 				pipe_name(crtc->pipe), pll->state.pipe_mask);
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 55283677c45a..e12b46a84fa1 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -36,7 +36,7 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,
 	} else {
 		cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;
 	}
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"FDI TX state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
@@ -57,7 +57,7 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
 	bool cur_state;
 
 	cur_state = intel_de_read(dev_priv, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE;
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"FDI RX state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
@@ -86,7 +86,8 @@ void assert_fdi_tx_pll_enabled(struct drm_i915_private *i915,
 		return;
 
 	cur_state = intel_de_read(i915, FDI_TX_CTL(pipe)) & FDI_TX_PLL_ENABLE;
-	I915_STATE_WARN(!cur_state, "FDI TX PLL assertion failure, should be active but is disabled\n");
+	I915_STATE_WARN(i915, !cur_state,
+			"FDI TX PLL assertion failure, should be active but is disabled\n");
 }
 
 static void assert_fdi_rx_pll(struct drm_i915_private *i915,
@@ -95,7 +96,7 @@ static void assert_fdi_rx_pll(struct drm_i915_private *i915,
 	bool cur_state;
 
 	cur_state = intel_de_read(i915, FDI_RX_CTL(pipe)) & FDI_RX_PLL_ENABLE;
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(i915, cur_state != state,
 			"FDI RX PLL assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
index 5e0ec15d9fd5..7718e632991e 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
@@ -35,27 +35,28 @@ static void intel_connector_verify_state(struct intel_crtc_state *crtc_state,
 	if (connector->get_hw_state(connector)) {
 		struct intel_encoder *encoder = intel_attached_encoder(connector);
 
-		I915_STATE_WARN(!crtc_state,
+		I915_STATE_WARN(i915, !crtc_state,
 				"connector enabled without attached crtc\n");
 
 		if (!crtc_state)
 			return;
 
-		I915_STATE_WARN(!crtc_state->hw.active,
+		I915_STATE_WARN(i915, !crtc_state->hw.active,
 				"connector is active, but attached crtc isn't\n");
 
 		if (!encoder || encoder->type == INTEL_OUTPUT_DP_MST)
 			return;
 
-		I915_STATE_WARN(conn_state->best_encoder != &encoder->base,
+		I915_STATE_WARN(i915,
+				conn_state->best_encoder != &encoder->base,
 				"atomic encoder doesn't match attached encoder\n");
 
-		I915_STATE_WARN(conn_state->crtc != encoder->base.crtc,
+		I915_STATE_WARN(i915, conn_state->crtc != encoder->base.crtc,
 				"attached encoder crtc differs from connector crtc\n");
 	} else {
-		I915_STATE_WARN(crtc_state && crtc_state->hw.active,
+		I915_STATE_WARN(i915, crtc_state && crtc_state->hw.active,
 				"attached crtc is active, but connector isn't\n");
-		I915_STATE_WARN(!crtc_state && conn_state->best_encoder,
+		I915_STATE_WARN(i915, !crtc_state && conn_state->best_encoder,
 				"best encoder set without crtc!\n");
 	}
 }
@@ -64,6 +65,7 @@ static void
 verify_connector_state(struct intel_atomic_state *state,
 		       struct intel_crtc *crtc)
 {
+	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
 	struct drm_connector *connector;
 	struct drm_connector_state *new_conn_state;
 	int i;
@@ -80,7 +82,7 @@ verify_connector_state(struct intel_atomic_state *state,
 
 		intel_connector_verify_state(crtc_state, new_conn_state);
 
-		I915_STATE_WARN(new_conn_state->best_encoder != encoder,
+		I915_STATE_WARN(i915, new_conn_state->best_encoder != encoder,
 				"connector's atomic encoder doesn't match legacy encoder\n");
 	}
 }
@@ -131,15 +133,15 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat
 			found = true;
 			enabled = true;
 
-			I915_STATE_WARN(new_conn_state->crtc !=
-					encoder->base.crtc,
+			I915_STATE_WARN(dev_priv,
+					new_conn_state->crtc != encoder->base.crtc,
 					"connector's crtc doesn't match encoder crtc\n");
 		}
 
 		if (!found)
 			continue;
 
-		I915_STATE_WARN(!!encoder->base.crtc != enabled,
+		I915_STATE_WARN(dev_priv, !!encoder->base.crtc != enabled,
 				"encoder's enabled state mismatch (expected %i, found %i)\n",
 				!!encoder->base.crtc, enabled);
 
@@ -147,7 +149,7 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat
 			bool active;
 
 			active = encoder->get_hw_state(encoder, &pipe);
-			I915_STATE_WARN(active,
+			I915_STATE_WARN(dev_priv, active,
 					"encoder detached but still enabled on pipe %c.\n",
 					pipe_name(pipe));
 		}
@@ -182,11 +184,12 @@ verify_crtc_state(struct intel_crtc *crtc,
 	if (IS_I830(dev_priv) && pipe_config->hw.active)
 		pipe_config->hw.active = new_crtc_state->hw.active;
 
-	I915_STATE_WARN(new_crtc_state->hw.active != pipe_config->hw.active,
+	I915_STATE_WARN(dev_priv,
+			new_crtc_state->hw.active != pipe_config->hw.active,
 			"crtc active state doesn't match with hw state (expected %i, found %i)\n",
 			new_crtc_state->hw.active, pipe_config->hw.active);
 
-	I915_STATE_WARN(crtc->active != new_crtc_state->hw.active,
+	I915_STATE_WARN(dev_priv, crtc->active != new_crtc_state->hw.active,
 			"transitional active state does not match atomic hw state (expected %i, found %i)\n",
 			new_crtc_state->hw.active, crtc->active);
 
@@ -197,12 +200,12 @@ verify_crtc_state(struct intel_crtc *crtc,
 		bool active;
 
 		active = encoder->get_hw_state(encoder, &pipe);
-		I915_STATE_WARN(active != new_crtc_state->hw.active,
+		I915_STATE_WARN(dev_priv, active != new_crtc_state->hw.active,
 				"[ENCODER:%i] active %i with crtc active %i\n",
 				encoder->base.base.id, active,
 				new_crtc_state->hw.active);
 
-		I915_STATE_WARN(active && master_crtc->pipe != pipe,
+		I915_STATE_WARN(dev_priv, active && master_crtc->pipe != pipe,
 				"Encoder connected to wrong pipe %c\n",
 				pipe_name(pipe));
 
@@ -217,7 +220,7 @@ verify_crtc_state(struct intel_crtc *crtc,
 
 	if (!intel_pipe_config_compare(new_crtc_state,
 				       pipe_config, false)) {
-		I915_STATE_WARN(1, "pipe state doesn't match!\n");
+		I915_STATE_WARN(dev_priv, 1, "pipe state doesn't match!\n");
 		intel_crtc_state_dump(pipe_config, NULL, "hw state");
 		intel_crtc_state_dump(new_crtc_state, NULL, "sw state");
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 2411fe4dee8b..866786e6b32f 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -43,11 +43,12 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
 
 	state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
 
-	I915_STATE_WARN(state && port_pipe == pipe,
+	I915_STATE_WARN(dev_priv, state && port_pipe == pipe,
 			"PCH DP %c enabled on transcoder %c, should be disabled\n",
 			port_name(port), pipe_name(pipe));
 
-	I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
+	I915_STATE_WARN(dev_priv,
+			HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
 			"IBX PCH DP %c still using transcoder B\n",
 			port_name(port));
 }
@@ -61,11 +62,12 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
 
 	state = intel_sdvo_port_enabled(dev_priv, hdmi_reg, &port_pipe);
 
-	I915_STATE_WARN(state && port_pipe == pipe,
+	I915_STATE_WARN(dev_priv, state && port_pipe == pipe,
 			"PCH HDMI %c enabled on transcoder %c, should be disabled\n",
 			port_name(port), pipe_name(pipe));
 
-	I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
+	I915_STATE_WARN(dev_priv,
+			HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
 			"IBX PCH HDMI %c still using transcoder B\n",
 			port_name(port));
 }
@@ -79,13 +81,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
 	assert_pch_dp_disabled(dev_priv, pipe, PORT_C, PCH_DP_C);
 	assert_pch_dp_disabled(dev_priv, pipe, PORT_D, PCH_DP_D);
 
-	I915_STATE_WARN(intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) &&
-			port_pipe == pipe,
+	I915_STATE_WARN(dev_priv,
+			intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) && port_pipe == pipe,
 			"PCH VGA enabled on transcoder %c, should be disabled\n",
 			pipe_name(pipe));
 
-	I915_STATE_WARN(intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) &&
-			port_pipe == pipe,
+	I915_STATE_WARN(dev_priv,
+			intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) && port_pipe == pipe,
 			"PCH LVDS enabled on transcoder %c, should be disabled\n",
 			pipe_name(pipe));
 
@@ -103,7 +105,7 @@ static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
 
 	val = intel_de_read(dev_priv, PCH_TRANSCONF(pipe));
 	enabled = !!(val & TRANS_ENABLE);
-	I915_STATE_WARN(enabled,
+	I915_STATE_WARN(dev_priv, enabled,
 			"transcoder assertion failed, should be off on pipe %c but is still active\n",
 			pipe_name(pipe));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 4f0b0cca03cc..5e7ba594e7e7 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -787,7 +787,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp)
 	vdd = false;
 	with_intel_pps_lock(intel_dp, wakeref)
 		vdd = intel_pps_vdd_on_unlocked(intel_dp);
-	I915_STATE_WARN(!vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
+	I915_STATE_WARN(i915, !vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
 			dp_to_dig_port(intel_dp)->base.base.base.id,
 			dp_to_dig_port(intel_dp)->base.base.name,
 			pps_name(i915, &intel_dp->pps));
@@ -899,7 +899,8 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	I915_STATE_WARN(!intel_dp->pps.want_panel_vdd, "[ENCODER:%d:%s] %s VDD not forced on",
+	I915_STATE_WARN(dev_priv, !intel_dp->pps.want_panel_vdd,
+			"[ENCODER:%d:%s] %s VDD not forced on",
 			dp_to_dig_port(intel_dp)->base.base.base.id,
 			dp_to_dig_port(intel_dp)->base.base.name,
 			pps_name(dev_priv, &intel_dp->pps));
@@ -1721,7 +1722,7 @@ void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
 	    ((val & PANEL_UNLOCK_MASK) == PANEL_UNLOCK_REGS))
 		locked = false;
 
-	I915_STATE_WARN(panel_pipe == pipe && locked,
+	I915_STATE_WARN(dev_priv, panel_pipe == pipe && locked,
 			"panel assertion failure, pipe %c regs locked\n",
 			pipe_name(pipe));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index a72677bf617b..88ef56b6e0fd 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -2016,7 +2016,7 @@ void intel_mpllb_state_verify(struct intel_atomic_state *state,
 	intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
 
 #define MPLLB_CHECK(__name)						\
-	I915_STATE_WARN(mpllb_sw_state->__name != mpllb_hw_state.__name,	\
+	I915_STATE_WARN(i915, mpllb_sw_state->__name != mpllb_hw_state.__name, \
 			"[CRTC:%d:%s] mismatch in MPLLB: %s (expected 0x%08x, found 0x%08x)", \
 			crtc->base.base.id, crtc->base.name,		\
 			__stringify(__name),				\
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
index b697badbbe71..ae0a0b11bae3 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
@@ -598,7 +598,7 @@ static void assert_dsi_pll(struct drm_i915_private *i915, bool state)
 	cur_state = vlv_cck_read(i915, CCK_REG_DSI_PLL_CONTROL) & DSI_PLL_VCO_EN;
 	vlv_cck_put(i915);
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(i915, cur_state != state,
 			"DSI PLL state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
-- 
2.39.2

Re: [Intel-gfx] [PATCH 4/4] drm/i915/display: add i915 parameter to I915_STATE_WARN()

[Rodrigo Vivi]

On Fri, May 12, 2023 at 02:04:44PM +0300, Jani Nikula wrote:
> Add i915 parameter to I915_STATE_WARN() and use device based logging.
> 
> Done using cocci + hand edited where there was no i915 local variable
> ready.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

with a bit of trust in coccinelle + compiler (for dev_priv vs i915 checks):

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/g4x_dp.c         |  4 +-
>  drivers/gpu/drm/i915/display/intel_crtc.c     |  4 +-
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 10 ++---
>  drivers/gpu/drm/i915/display/intel_display.c  |  9 +++--
>  drivers/gpu/drm/i915/display/intel_display.h  |  7 ++--
>  .../drm/i915/display/intel_display_power.c    | 37 ++++++++++++-------
>  drivers/gpu/drm/i915/display/intel_dpll.c     |  2 +-
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 30 ++++++++-------
>  drivers/gpu/drm/i915/display/intel_fdi.c      |  9 +++--
>  .../drm/i915/display/intel_modeset_verify.c   | 35 ++++++++++--------
>  .../gpu/drm/i915/display/intel_pch_display.c  | 20 +++++-----
>  drivers/gpu/drm/i915/display/intel_pps.c      |  7 ++--
>  drivers/gpu/drm/i915/display/intel_snps_phy.c |  2 +-
>  drivers/gpu/drm/i915/display/vlv_dsi_pll.c    |  2 +-
>  14 files changed, 100 insertions(+), 78 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 920d570f7594..112d91d81fdc 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -169,7 +169,7 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state)
>  	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
>  	bool cur_state = intel_de_read(dev_priv, intel_dp->output_reg) & DP_PORT_EN;
>  
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(dev_priv, cur_state != state,
>  			"[ENCODER:%d:%s] state assertion failure (expected %s, current %s)\n",
>  			dig_port->base.base.base.id, dig_port->base.base.name,
>  			str_on_off(state), str_on_off(cur_state));
> @@ -180,7 +180,7 @@ static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state)
>  {
>  	bool cur_state = intel_de_read(dev_priv, DP_A) & DP_PLL_ENABLE;
>  
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(dev_priv, cur_state != state,
>  			"eDP PLL state assertion failure (expected %s, current %s)\n",
>  			str_on_off(state), str_on_off(cur_state));
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
> index 1e3f88d00609..ecae9bf05269 100644
> --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> @@ -35,7 +35,9 @@
>  
>  static void assert_vblank_disabled(struct drm_crtc *crtc)
>  {
> -	if (I915_STATE_WARN(drm_crtc_vblank_get(crtc) == 0,
> +	struct drm_i915_private *i915 = to_i915(crtc->dev);
> +
> +	if (I915_STATE_WARN(i915, drm_crtc_vblank_get(crtc) == 0,
>  			    "[CRTC:%d:%s] vblank assertion failure (expected off, current on)\n",
>  			    crtc->base.id, crtc->name))
>  		drm_crtc_vblank_put(crtc);
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index d94127e7448b..ef0615cdc8a0 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -2945,18 +2945,18 @@ void intel_c10pll_state_verify(struct intel_atomic_state *state,
>  	for (i = 0; i < ARRAY_SIZE(mpllb_sw_state->pll); i++) {
>  		u8 expected = mpllb_sw_state->pll[i];
>  
> -		I915_STATE_WARN(mpllb_hw_state.pll[i] != expected,
> +		I915_STATE_WARN(i915, mpllb_hw_state.pll[i] != expected,
>  				"[CRTC:%d:%s] mismatch in C10MPLLB: Register[%d] (expected 0x%02x, found 0x%02x)",
> -				crtc->base.base.id, crtc->base.name,
> -				i, expected, mpllb_hw_state.pll[i]);
> +				crtc->base.base.id, crtc->base.name, i,
> +				expected, mpllb_hw_state.pll[i]);
>  	}
>  
> -	I915_STATE_WARN(mpllb_hw_state.tx != mpllb_sw_state->tx,
> +	I915_STATE_WARN(i915, mpllb_hw_state.tx != mpllb_sw_state->tx,
>  			"[CRTC:%d:%s] mismatch in C10MPLLB: Register TX0 (expected 0x%02x, found 0x%02x)",
>  			crtc->base.base.id, crtc->base.name,
>  			mpllb_sw_state->tx, mpllb_hw_state.tx);
>  
> -	I915_STATE_WARN(mpllb_hw_state.cmn != mpllb_sw_state->cmn,
> +	I915_STATE_WARN(i915, mpllb_hw_state.cmn != mpllb_sw_state->cmn,
>  			"[CRTC:%d:%s] mismatch in C10MPLLB: Register CMN0 (expected 0x%02x, found 0x%02x)",
>  			crtc->base.base.id, crtc->base.name,
>  			mpllb_sw_state->cmn, mpllb_hw_state.cmn);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 1d5d42a40803..4b70b389e0cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -322,20 +322,21 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
>  		cur_state = false;
>  	}
>  
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(dev_priv, cur_state != state,
>  			"transcoder %s assertion failure (expected %s, current %s)\n",
> -			transcoder_name(cpu_transcoder),
> -			str_on_off(state), str_on_off(cur_state));
> +			transcoder_name(cpu_transcoder), str_on_off(state),
> +			str_on_off(cur_state));
>  }
>  
>  static void assert_plane(struct intel_plane *plane, bool state)
>  {
> +	struct drm_i915_private *i915 = to_i915(plane->base.dev);
>  	enum pipe pipe;
>  	bool cur_state;
>  
>  	cur_state = plane->get_hw_state(plane, &pipe);
>  
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(i915, cur_state != state,
>  			"%s assertion failure (expected %s, current %s)\n",
>  			plane->base.name, str_on_off(state),
>  			str_on_off(cur_state));
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 8f451aaf5760..ee3def6e14a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -545,11 +545,12 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
>   * verbose_state_checks module param, to enable distros and users to tailor
>   * their preferred amount of i915 abrt spam.
>   */
> -#define I915_STATE_WARN(condition, format...) ({			\
> +#define I915_STATE_WARN(__i915, condition, format...) ({		\
> +	struct drm_device *drm = &(__i915)->drm;			\
>  	int __ret_warn_on = !!(condition);				\
>  	if (unlikely(__ret_warn_on))					\
> -		if (!WARN(i915_modparams.verbose_state_checks, format))	\
> -			DRM_ERROR(format);				\
> +		if (!drm_WARN(drm, i915_modparams.verbose_state_checks, format)) \
> +			drm_err(drm, format);				\
>  	unlikely(__ret_warn_on);					\
>  })
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 5150069f3f82..6ed2ece89c3f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1165,31 +1165,39 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
>  	struct intel_crtc *crtc;
>  
>  	for_each_intel_crtc(&dev_priv->drm, crtc)
> -		I915_STATE_WARN(crtc->active, "CRTC for pipe %c enabled\n",
> +		I915_STATE_WARN(dev_priv, crtc->active,
> +				"CRTC for pipe %c enabled\n",
>  				pipe_name(crtc->pipe));
>  
> -	I915_STATE_WARN(intel_de_read(dev_priv, HSW_PWR_WELL_CTL2),
> +	I915_STATE_WARN(dev_priv, intel_de_read(dev_priv, HSW_PWR_WELL_CTL2),
>  			"Display power well on\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE,
> +	I915_STATE_WARN(dev_priv,
> +			intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE,
>  			"SPLL enabled\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, WRPLL_CTL(0)) & WRPLL_PLL_ENABLE,
> +	I915_STATE_WARN(dev_priv,
> +			intel_de_read(dev_priv, WRPLL_CTL(0)) & WRPLL_PLL_ENABLE,
>  			"WRPLL1 enabled\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, WRPLL_CTL(1)) & WRPLL_PLL_ENABLE,
> +	I915_STATE_WARN(dev_priv,
> +			intel_de_read(dev_priv, WRPLL_CTL(1)) & WRPLL_PLL_ENABLE,
>  			"WRPLL2 enabled\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON,
> +	I915_STATE_WARN(dev_priv,
> +			intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON,
>  			"Panel power on\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
> +	I915_STATE_WARN(dev_priv,
> +			intel_de_read(dev_priv, BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
>  			"CPU PWM1 enabled\n");
>  	if (IS_HASWELL(dev_priv))
> -		I915_STATE_WARN(intel_de_read(dev_priv, HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,
> +		I915_STATE_WARN(dev_priv,
> +				intel_de_read(dev_priv, HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,
>  				"CPU PWM2 enabled\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
> +	I915_STATE_WARN(dev_priv,
> +			intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
>  			"PCH PWM1 enabled\n");
> -	I915_STATE_WARN((intel_de_read(dev_priv, UTIL_PIN_CTL) &
> -			 (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) ==
> -			(UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
> +	I915_STATE_WARN(dev_priv,
> +			(intel_de_read(dev_priv, UTIL_PIN_CTL) & (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) == (UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
>  			"Utility pin enabled in PWM mode\n");
> -	I915_STATE_WARN(intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,
> +	I915_STATE_WARN(dev_priv,
> +			intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,
>  			"PCH GTC enabled\n");
>  
>  	/*
> @@ -1198,7 +1206,8 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
>  	 * gen-specific and since we only disable LCPLL after we fully disable
>  	 * the interrupts, the check below should be enough.
>  	 */
> -	I915_STATE_WARN(intel_irqs_enabled(dev_priv), "IRQs enabled\n");
> +	I915_STATE_WARN(dev_priv, intel_irqs_enabled(dev_priv),
> +			"IRQs enabled\n");
>  }
>  
>  static u32 hsw_read_dcomp(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index ca0f362a40e3..824be7f03724 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -2080,7 +2080,7 @@ static void assert_pll(struct drm_i915_private *dev_priv,
>  	bool cur_state;
>  
>  	cur_state = intel_de_read(dev_priv, DPLL(pipe)) & DPLL_VCO_ENABLE;
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(dev_priv, cur_state != state,
>  			"PLL state assertion failure (expected %s, current %s)\n",
>  			str_on_off(state), str_on_off(cur_state));
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 936b8de9e439..ee55ab309568 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -169,8 +169,8 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
>  		return;
>  
>  	cur_state = intel_dpll_get_hw_state(dev_priv, pll, &hw_state);
> -	I915_STATE_WARN(cur_state != state,
> -	     "%s assertion failure (expected %s, current %s)\n",
> +	I915_STATE_WARN(dev_priv, cur_state != state,
> +			"%s assertion failure (expected %s, current %s)\n",
>  			pll->info->name, str_on_off(state),
>  			str_on_off(cur_state));
>  }
> @@ -467,7 +467,8 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)
>  	val = intel_de_read(dev_priv, PCH_DREF_CONTROL);
>  	enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |
>  			    DREF_SUPERSPREAD_SOURCE_MASK));
> -	I915_STATE_WARN(!enabled, "PCH refclk assertion failure, should be active but is disabled\n");
> +	I915_STATE_WARN(dev_priv, !enabled,
> +			"PCH refclk assertion failure, should be active but is disabled\n");
>  }
>  
>  static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv,
> @@ -4405,17 +4406,18 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
>  	active = intel_dpll_get_hw_state(dev_priv, pll, &dpll_hw_state);
>  
>  	if (!(pll->info->flags & INTEL_DPLL_ALWAYS_ON)) {
> -		I915_STATE_WARN(!pll->on && pll->active_mask,
> +		I915_STATE_WARN(dev_priv, !pll->on && pll->active_mask,
>  				"pll in active use but not on in sw tracking\n");
> -		I915_STATE_WARN(pll->on && !pll->active_mask,
> +		I915_STATE_WARN(dev_priv, pll->on && !pll->active_mask,
>  				"pll is on but not used by any active pipe\n");
> -		I915_STATE_WARN(pll->on != active,
> +		I915_STATE_WARN(dev_priv, pll->on != active,
>  				"pll on state mismatch (expected %i, found %i)\n",
>  				pll->on, active);
>  	}
>  
>  	if (!crtc) {
> -		I915_STATE_WARN(pll->active_mask & ~pll->state.pipe_mask,
> +		I915_STATE_WARN(dev_priv,
> +				pll->active_mask & ~pll->state.pipe_mask,
>  				"more active pll users than references: 0x%x vs 0x%x\n",
>  				pll->active_mask, pll->state.pipe_mask);
>  
> @@ -4425,20 +4427,20 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
>  	pipe_mask = BIT(crtc->pipe);
>  
>  	if (new_crtc_state->hw.active)
> -		I915_STATE_WARN(!(pll->active_mask & pipe_mask),
> +		I915_STATE_WARN(dev_priv, !(pll->active_mask & pipe_mask),
>  				"pll active mismatch (expected pipe %c in active mask 0x%x)\n",
>  				pipe_name(crtc->pipe), pll->active_mask);
>  	else
> -		I915_STATE_WARN(pll->active_mask & pipe_mask,
> +		I915_STATE_WARN(dev_priv, pll->active_mask & pipe_mask,
>  				"pll active mismatch (didn't expect pipe %c in active mask 0x%x)\n",
>  				pipe_name(crtc->pipe), pll->active_mask);
>  
> -	I915_STATE_WARN(!(pll->state.pipe_mask & pipe_mask),
> +	I915_STATE_WARN(dev_priv, !(pll->state.pipe_mask & pipe_mask),
>  			"pll enabled crtcs mismatch (expected 0x%x in 0x%x)\n",
>  			pipe_mask, pll->state.pipe_mask);
>  
> -	I915_STATE_WARN(pll->on && memcmp(&pll->state.hw_state,
> -					  &dpll_hw_state,
> +	I915_STATE_WARN(dev_priv,
> +			pll->on && memcmp(&pll->state.hw_state, &dpll_hw_state,
>  					  sizeof(dpll_hw_state)),
>  			"pll hw state mismatch\n");
>  }
> @@ -4458,10 +4460,10 @@ void intel_shared_dpll_state_verify(struct intel_crtc *crtc,
>  		u8 pipe_mask = BIT(crtc->pipe);
>  		struct intel_shared_dpll *pll = old_crtc_state->shared_dpll;
>  
> -		I915_STATE_WARN(pll->active_mask & pipe_mask,
> +		I915_STATE_WARN(dev_priv, pll->active_mask & pipe_mask,
>  				"pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n",
>  				pipe_name(crtc->pipe), pll->active_mask);
> -		I915_STATE_WARN(pll->state.pipe_mask & pipe_mask,
> +		I915_STATE_WARN(dev_priv, pll->state.pipe_mask & pipe_mask,
>  				"pll enabled crtcs mismatch (found %x in enabled mask (0x%x))\n",
>  				pipe_name(crtc->pipe), pll->state.pipe_mask);
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index 55283677c45a..e12b46a84fa1 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -36,7 +36,7 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,
>  	} else {
>  		cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;
>  	}
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(dev_priv, cur_state != state,
>  			"FDI TX state assertion failure (expected %s, current %s)\n",
>  			str_on_off(state), str_on_off(cur_state));
>  }
> @@ -57,7 +57,7 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
>  	bool cur_state;
>  
>  	cur_state = intel_de_read(dev_priv, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE;
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(dev_priv, cur_state != state,
>  			"FDI RX state assertion failure (expected %s, current %s)\n",
>  			str_on_off(state), str_on_off(cur_state));
>  }
> @@ -86,7 +86,8 @@ void assert_fdi_tx_pll_enabled(struct drm_i915_private *i915,
>  		return;
>  
>  	cur_state = intel_de_read(i915, FDI_TX_CTL(pipe)) & FDI_TX_PLL_ENABLE;
> -	I915_STATE_WARN(!cur_state, "FDI TX PLL assertion failure, should be active but is disabled\n");
> +	I915_STATE_WARN(i915, !cur_state,
> +			"FDI TX PLL assertion failure, should be active but is disabled\n");
>  }
>  
>  static void assert_fdi_rx_pll(struct drm_i915_private *i915,
> @@ -95,7 +96,7 @@ static void assert_fdi_rx_pll(struct drm_i915_private *i915,
>  	bool cur_state;
>  
>  	cur_state = intel_de_read(i915, FDI_RX_CTL(pipe)) & FDI_RX_PLL_ENABLE;
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(i915, cur_state != state,
>  			"FDI RX PLL assertion failure (expected %s, current %s)\n",
>  			str_on_off(state), str_on_off(cur_state));
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> index 5e0ec15d9fd5..7718e632991e 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
> @@ -35,27 +35,28 @@ static void intel_connector_verify_state(struct intel_crtc_state *crtc_state,
>  	if (connector->get_hw_state(connector)) {
>  		struct intel_encoder *encoder = intel_attached_encoder(connector);
>  
> -		I915_STATE_WARN(!crtc_state,
> +		I915_STATE_WARN(i915, !crtc_state,
>  				"connector enabled without attached crtc\n");
>  
>  		if (!crtc_state)
>  			return;
>  
> -		I915_STATE_WARN(!crtc_state->hw.active,
> +		I915_STATE_WARN(i915, !crtc_state->hw.active,
>  				"connector is active, but attached crtc isn't\n");
>  
>  		if (!encoder || encoder->type == INTEL_OUTPUT_DP_MST)
>  			return;
>  
> -		I915_STATE_WARN(conn_state->best_encoder != &encoder->base,
> +		I915_STATE_WARN(i915,
> +				conn_state->best_encoder != &encoder->base,
>  				"atomic encoder doesn't match attached encoder\n");
>  
> -		I915_STATE_WARN(conn_state->crtc != encoder->base.crtc,
> +		I915_STATE_WARN(i915, conn_state->crtc != encoder->base.crtc,
>  				"attached encoder crtc differs from connector crtc\n");
>  	} else {
> -		I915_STATE_WARN(crtc_state && crtc_state->hw.active,
> +		I915_STATE_WARN(i915, crtc_state && crtc_state->hw.active,
>  				"attached crtc is active, but connector isn't\n");
> -		I915_STATE_WARN(!crtc_state && conn_state->best_encoder,
> +		I915_STATE_WARN(i915, !crtc_state && conn_state->best_encoder,
>  				"best encoder set without crtc!\n");
>  	}
>  }
> @@ -64,6 +65,7 @@ static void
>  verify_connector_state(struct intel_atomic_state *state,
>  		       struct intel_crtc *crtc)
>  {
> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
>  	struct drm_connector *connector;
>  	struct drm_connector_state *new_conn_state;
>  	int i;
> @@ -80,7 +82,7 @@ verify_connector_state(struct intel_atomic_state *state,
>  
>  		intel_connector_verify_state(crtc_state, new_conn_state);
>  
> -		I915_STATE_WARN(new_conn_state->best_encoder != encoder,
> +		I915_STATE_WARN(i915, new_conn_state->best_encoder != encoder,
>  				"connector's atomic encoder doesn't match legacy encoder\n");
>  	}
>  }
> @@ -131,15 +133,15 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat
>  			found = true;
>  			enabled = true;
>  
> -			I915_STATE_WARN(new_conn_state->crtc !=
> -					encoder->base.crtc,
> +			I915_STATE_WARN(dev_priv,
> +					new_conn_state->crtc != encoder->base.crtc,
>  					"connector's crtc doesn't match encoder crtc\n");
>  		}
>  
>  		if (!found)
>  			continue;
>  
> -		I915_STATE_WARN(!!encoder->base.crtc != enabled,
> +		I915_STATE_WARN(dev_priv, !!encoder->base.crtc != enabled,
>  				"encoder's enabled state mismatch (expected %i, found %i)\n",
>  				!!encoder->base.crtc, enabled);
>  
> @@ -147,7 +149,7 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat
>  			bool active;
>  
>  			active = encoder->get_hw_state(encoder, &pipe);
> -			I915_STATE_WARN(active,
> +			I915_STATE_WARN(dev_priv, active,
>  					"encoder detached but still enabled on pipe %c.\n",
>  					pipe_name(pipe));
>  		}
> @@ -182,11 +184,12 @@ verify_crtc_state(struct intel_crtc *crtc,
>  	if (IS_I830(dev_priv) && pipe_config->hw.active)
>  		pipe_config->hw.active = new_crtc_state->hw.active;
>  
> -	I915_STATE_WARN(new_crtc_state->hw.active != pipe_config->hw.active,
> +	I915_STATE_WARN(dev_priv,
> +			new_crtc_state->hw.active != pipe_config->hw.active,
>  			"crtc active state doesn't match with hw state (expected %i, found %i)\n",
>  			new_crtc_state->hw.active, pipe_config->hw.active);
>  
> -	I915_STATE_WARN(crtc->active != new_crtc_state->hw.active,
> +	I915_STATE_WARN(dev_priv, crtc->active != new_crtc_state->hw.active,
>  			"transitional active state does not match atomic hw state (expected %i, found %i)\n",
>  			new_crtc_state->hw.active, crtc->active);
>  
> @@ -197,12 +200,12 @@ verify_crtc_state(struct intel_crtc *crtc,
>  		bool active;
>  
>  		active = encoder->get_hw_state(encoder, &pipe);
> -		I915_STATE_WARN(active != new_crtc_state->hw.active,
> +		I915_STATE_WARN(dev_priv, active != new_crtc_state->hw.active,
>  				"[ENCODER:%i] active %i with crtc active %i\n",
>  				encoder->base.base.id, active,
>  				new_crtc_state->hw.active);
>  
> -		I915_STATE_WARN(active && master_crtc->pipe != pipe,
> +		I915_STATE_WARN(dev_priv, active && master_crtc->pipe != pipe,
>  				"Encoder connected to wrong pipe %c\n",
>  				pipe_name(pipe));
>  
> @@ -217,7 +220,7 @@ verify_crtc_state(struct intel_crtc *crtc,
>  
>  	if (!intel_pipe_config_compare(new_crtc_state,
>  				       pipe_config, false)) {
> -		I915_STATE_WARN(1, "pipe state doesn't match!\n");
> +		I915_STATE_WARN(dev_priv, 1, "pipe state doesn't match!\n");
>  		intel_crtc_state_dump(pipe_config, NULL, "hw state");
>  		intel_crtc_state_dump(new_crtc_state, NULL, "sw state");
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
> index 2411fe4dee8b..866786e6b32f 100644
> --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> @@ -43,11 +43,12 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
>  
>  	state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
>  
> -	I915_STATE_WARN(state && port_pipe == pipe,
> +	I915_STATE_WARN(dev_priv, state && port_pipe == pipe,
>  			"PCH DP %c enabled on transcoder %c, should be disabled\n",
>  			port_name(port), pipe_name(pipe));
>  
> -	I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
> +	I915_STATE_WARN(dev_priv,
> +			HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
>  			"IBX PCH DP %c still using transcoder B\n",
>  			port_name(port));
>  }
> @@ -61,11 +62,12 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
>  
>  	state = intel_sdvo_port_enabled(dev_priv, hdmi_reg, &port_pipe);
>  
> -	I915_STATE_WARN(state && port_pipe == pipe,
> +	I915_STATE_WARN(dev_priv, state && port_pipe == pipe,
>  			"PCH HDMI %c enabled on transcoder %c, should be disabled\n",
>  			port_name(port), pipe_name(pipe));
>  
> -	I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
> +	I915_STATE_WARN(dev_priv,
> +			HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
>  			"IBX PCH HDMI %c still using transcoder B\n",
>  			port_name(port));
>  }
> @@ -79,13 +81,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
>  	assert_pch_dp_disabled(dev_priv, pipe, PORT_C, PCH_DP_C);
>  	assert_pch_dp_disabled(dev_priv, pipe, PORT_D, PCH_DP_D);
>  
> -	I915_STATE_WARN(intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) &&
> -			port_pipe == pipe,
> +	I915_STATE_WARN(dev_priv,
> +			intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) && port_pipe == pipe,
>  			"PCH VGA enabled on transcoder %c, should be disabled\n",
>  			pipe_name(pipe));
>  
> -	I915_STATE_WARN(intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) &&
> -			port_pipe == pipe,
> +	I915_STATE_WARN(dev_priv,
> +			intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) && port_pipe == pipe,
>  			"PCH LVDS enabled on transcoder %c, should be disabled\n",
>  			pipe_name(pipe));
>  
> @@ -103,7 +105,7 @@ static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
>  
>  	val = intel_de_read(dev_priv, PCH_TRANSCONF(pipe));
>  	enabled = !!(val & TRANS_ENABLE);
> -	I915_STATE_WARN(enabled,
> +	I915_STATE_WARN(dev_priv, enabled,
>  			"transcoder assertion failed, should be off on pipe %c but is still active\n",
>  			pipe_name(pipe));
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 4f0b0cca03cc..5e7ba594e7e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -787,7 +787,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp)
>  	vdd = false;
>  	with_intel_pps_lock(intel_dp, wakeref)
>  		vdd = intel_pps_vdd_on_unlocked(intel_dp);
> -	I915_STATE_WARN(!vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
> +	I915_STATE_WARN(i915, !vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
>  			dp_to_dig_port(intel_dp)->base.base.base.id,
>  			dp_to_dig_port(intel_dp)->base.base.name,
>  			pps_name(i915, &intel_dp->pps));
> @@ -899,7 +899,8 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
>  	if (!intel_dp_is_edp(intel_dp))
>  		return;
>  
> -	I915_STATE_WARN(!intel_dp->pps.want_panel_vdd, "[ENCODER:%d:%s] %s VDD not forced on",
> +	I915_STATE_WARN(dev_priv, !intel_dp->pps.want_panel_vdd,
> +			"[ENCODER:%d:%s] %s VDD not forced on",
>  			dp_to_dig_port(intel_dp)->base.base.base.id,
>  			dp_to_dig_port(intel_dp)->base.base.name,
>  			pps_name(dev_priv, &intel_dp->pps));
> @@ -1721,7 +1722,7 @@ void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
>  	    ((val & PANEL_UNLOCK_MASK) == PANEL_UNLOCK_REGS))
>  		locked = false;
>  
> -	I915_STATE_WARN(panel_pipe == pipe && locked,
> +	I915_STATE_WARN(dev_priv, panel_pipe == pipe && locked,
>  			"panel assertion failure, pipe %c regs locked\n",
>  			pipe_name(pipe));
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> index a72677bf617b..88ef56b6e0fd 100644
> --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
> @@ -2016,7 +2016,7 @@ void intel_mpllb_state_verify(struct intel_atomic_state *state,
>  	intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
>  
>  #define MPLLB_CHECK(__name)						\
> -	I915_STATE_WARN(mpllb_sw_state->__name != mpllb_hw_state.__name,	\
> +	I915_STATE_WARN(i915, mpllb_sw_state->__name != mpllb_hw_state.__name, \
>  			"[CRTC:%d:%s] mismatch in MPLLB: %s (expected 0x%08x, found 0x%08x)", \
>  			crtc->base.base.id, crtc->base.name,		\
>  			__stringify(__name),				\
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
> index b697badbbe71..ae0a0b11bae3 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
> @@ -598,7 +598,7 @@ static void assert_dsi_pll(struct drm_i915_private *i915, bool state)
>  	cur_state = vlv_cck_read(i915, CCK_REG_DSI_PLL_CONTROL) & DSI_PLL_VCO_EN;
>  	vlv_cck_put(i915);
>  
> -	I915_STATE_WARN(cur_state != state,
> +	I915_STATE_WARN(i915, cur_state != state,
>  			"DSI PLL state assertion failure (expected %s, current %s)\n",
>  			str_on_off(state), str_on_off(cur_state));
>  }
> -- 
> 2.39.2
> 

Re: [Intel-gfx] [PATCH 4/4] drm/i915/display: add i915 parameter to I915_STATE_WARN()

[Jani Nikula]

On Fri, 12 May 2023, Rodrigo Vivi <rodrigo.vivi@kernel.org> wrote:
> On Fri, May 12, 2023 at 02:04:44PM +0300, Jani Nikula wrote:
>> Add i915 parameter to I915_STATE_WARN() and use device based logging.
>> 
>> Done using cocci + hand edited where there was no i915 local variable
>> ready.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> with a bit of trust in coccinelle + compiler (for dev_priv vs i915 checks):

That was too much trust, as verify_connector_state() had crtc->base.dev
but it's possible the crtc is NULL. Caught by CI, hooray.

>> @@ -64,6 +65,7 @@ static void
>>  verify_connector_state(struct intel_atomic_state *state,
>>  		       struct intel_crtc *crtc)
>>  {
>> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);

crtc can be NULL here.

v2 in-reply to v1.

BR,
Jani.

>>  	struct drm_connector *connector;
>>  	struct drm_connector_state *new_conn_state;
>>  	int i;
>> @@ -80,7 +82,7 @@ verify_connector_state(struct intel_atomic_state *state,
>>  
>>  		intel_connector_verify_state(crtc_state, new_conn_state);
>>  
>> -		I915_STATE_WARN(new_conn_state->best_encoder != encoder,
>> +		I915_STATE_WARN(i915, new_conn_state->best_encoder != encoder,
>>  				"connector's atomic encoder doesn't match legacy encoder\n");
>>  	}
>>  }

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH v2] drm/i915/display: add i915 parameter to I915_STATE_WARN()

[Jani Nikula]

Add i915 parameter to I915_STATE_WARN() and use device based logging.

Done using cocci + hand edited where there was no i915 local variable
ready.

v2: avoid null deref in verify_connector_state()

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c         |  4 +-
 drivers/gpu/drm/i915/display/intel_crtc.c     |  4 +-
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 10 ++---
 drivers/gpu/drm/i915/display/intel_display.c  |  9 +++--
 drivers/gpu/drm/i915/display/intel_display.h  |  7 ++--
 .../drm/i915/display/intel_display_power.c    | 37 ++++++++++++-------
 drivers/gpu/drm/i915/display/intel_dpll.c     |  2 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 30 ++++++++-------
 drivers/gpu/drm/i915/display/intel_fdi.c      |  9 +++--
 .../drm/i915/display/intel_modeset_verify.c   | 34 +++++++++--------
 .../gpu/drm/i915/display/intel_pch_display.c  | 20 +++++-----
 drivers/gpu/drm/i915/display/intel_pps.c      |  7 ++--
 drivers/gpu/drm/i915/display/intel_snps_phy.c |  2 +-
 drivers/gpu/drm/i915/display/vlv_dsi_pll.c    |  2 +-
 14 files changed, 99 insertions(+), 78 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index 920d570f7594..112d91d81fdc 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -169,7 +169,7 @@ static void assert_dp_port(struct intel_dp *intel_dp, bool state)
 	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
 	bool cur_state = intel_de_read(dev_priv, intel_dp->output_reg) & DP_PORT_EN;
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"[ENCODER:%d:%s] state assertion failure (expected %s, current %s)\n",
 			dig_port->base.base.base.id, dig_port->base.base.name,
 			str_on_off(state), str_on_off(cur_state));
@@ -180,7 +180,7 @@ static void assert_edp_pll(struct drm_i915_private *dev_priv, bool state)
 {
 	bool cur_state = intel_de_read(dev_priv, DP_A) & DP_PLL_ENABLE;
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"eDP PLL state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c
index 1e3f88d00609..ecae9bf05269 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -35,7 +35,9 @@
 
 static void assert_vblank_disabled(struct drm_crtc *crtc)
 {
-	if (I915_STATE_WARN(drm_crtc_vblank_get(crtc) == 0,
+	struct drm_i915_private *i915 = to_i915(crtc->dev);
+
+	if (I915_STATE_WARN(i915, drm_crtc_vblank_get(crtc) == 0,
 			    "[CRTC:%d:%s] vblank assertion failure (expected off, current on)\n",
 			    crtc->base.id, crtc->name))
 		drm_crtc_vblank_put(crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index d94127e7448b..ef0615cdc8a0 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2945,18 +2945,18 @@ void intel_c10pll_state_verify(struct intel_atomic_state *state,
 	for (i = 0; i < ARRAY_SIZE(mpllb_sw_state->pll); i++) {
 		u8 expected = mpllb_sw_state->pll[i];
 
-		I915_STATE_WARN(mpllb_hw_state.pll[i] != expected,
+		I915_STATE_WARN(i915, mpllb_hw_state.pll[i] != expected,
 				"[CRTC:%d:%s] mismatch in C10MPLLB: Register[%d] (expected 0x%02x, found 0x%02x)",
-				crtc->base.base.id, crtc->base.name,
-				i, expected, mpllb_hw_state.pll[i]);
+				crtc->base.base.id, crtc->base.name, i,
+				expected, mpllb_hw_state.pll[i]);
 	}
 
-	I915_STATE_WARN(mpllb_hw_state.tx != mpllb_sw_state->tx,
+	I915_STATE_WARN(i915, mpllb_hw_state.tx != mpllb_sw_state->tx,
 			"[CRTC:%d:%s] mismatch in C10MPLLB: Register TX0 (expected 0x%02x, found 0x%02x)",
 			crtc->base.base.id, crtc->base.name,
 			mpllb_sw_state->tx, mpllb_hw_state.tx);
 
-	I915_STATE_WARN(mpllb_hw_state.cmn != mpllb_sw_state->cmn,
+	I915_STATE_WARN(i915, mpllb_hw_state.cmn != mpllb_sw_state->cmn,
 			"[CRTC:%d:%s] mismatch in C10MPLLB: Register CMN0 (expected 0x%02x, found 0x%02x)",
 			crtc->base.base.id, crtc->base.name,
 			mpllb_sw_state->cmn, mpllb_hw_state.cmn);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1d5d42a40803..4b70b389e0cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -322,20 +322,21 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
 		cur_state = false;
 	}
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"transcoder %s assertion failure (expected %s, current %s)\n",
-			transcoder_name(cpu_transcoder),
-			str_on_off(state), str_on_off(cur_state));
+			transcoder_name(cpu_transcoder), str_on_off(state),
+			str_on_off(cur_state));
 }
 
 static void assert_plane(struct intel_plane *plane, bool state)
 {
+	struct drm_i915_private *i915 = to_i915(plane->base.dev);
 	enum pipe pipe;
 	bool cur_state;
 
 	cur_state = plane->get_hw_state(plane, &pipe);
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(i915, cur_state != state,
 			"%s assertion failure (expected %s, current %s)\n",
 			plane->base.name, str_on_off(state),
 			str_on_off(cur_state));
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 8f451aaf5760..ee3def6e14a8 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -545,11 +545,12 @@ void assert_transcoder(struct drm_i915_private *dev_priv,
  * verbose_state_checks module param, to enable distros and users to tailor
  * their preferred amount of i915 abrt spam.
  */
-#define I915_STATE_WARN(condition, format...) ({			\
+#define I915_STATE_WARN(__i915, condition, format...) ({		\
+	struct drm_device *drm = &(__i915)->drm;			\
 	int __ret_warn_on = !!(condition);				\
 	if (unlikely(__ret_warn_on))					\
-		if (!WARN(i915_modparams.verbose_state_checks, format))	\
-			DRM_ERROR(format);				\
+		if (!drm_WARN(drm, i915_modparams.verbose_state_checks, format)) \
+			drm_err(drm, format);				\
 	unlikely(__ret_warn_on);					\
 })
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 5150069f3f82..6ed2ece89c3f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1165,31 +1165,39 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 	struct intel_crtc *crtc;
 
 	for_each_intel_crtc(&dev_priv->drm, crtc)
-		I915_STATE_WARN(crtc->active, "CRTC for pipe %c enabled\n",
+		I915_STATE_WARN(dev_priv, crtc->active,
+				"CRTC for pipe %c enabled\n",
 				pipe_name(crtc->pipe));
 
-	I915_STATE_WARN(intel_de_read(dev_priv, HSW_PWR_WELL_CTL2),
+	I915_STATE_WARN(dev_priv, intel_de_read(dev_priv, HSW_PWR_WELL_CTL2),
 			"Display power well on\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, SPLL_CTL) & SPLL_PLL_ENABLE,
 			"SPLL enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, WRPLL_CTL(0)) & WRPLL_PLL_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, WRPLL_CTL(0)) & WRPLL_PLL_ENABLE,
 			"WRPLL1 enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, WRPLL_CTL(1)) & WRPLL_PLL_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, WRPLL_CTL(1)) & WRPLL_PLL_ENABLE,
 			"WRPLL2 enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, PP_STATUS(0)) & PP_ON,
 			"Panel power on\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, BLC_PWM_CPU_CTL2) & BLM_PWM_ENABLE,
 			"CPU PWM1 enabled\n");
 	if (IS_HASWELL(dev_priv))
-		I915_STATE_WARN(intel_de_read(dev_priv, HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,
+		I915_STATE_WARN(dev_priv,
+				intel_de_read(dev_priv, HSW_BLC_PWM2_CTL) & BLM_PWM_ENABLE,
 				"CPU PWM2 enabled\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
 			"PCH PWM1 enabled\n");
-	I915_STATE_WARN((intel_de_read(dev_priv, UTIL_PIN_CTL) &
-			 (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) ==
-			(UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
+	I915_STATE_WARN(dev_priv,
+			(intel_de_read(dev_priv, UTIL_PIN_CTL) & (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) == (UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),
 			"Utility pin enabled in PWM mode\n");
-	I915_STATE_WARN(intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,
+	I915_STATE_WARN(dev_priv,
+			intel_de_read(dev_priv, PCH_GTC_CTL) & PCH_GTC_ENABLE,
 			"PCH GTC enabled\n");
 
 	/*
@@ -1198,7 +1206,8 @@ static void assert_can_disable_lcpll(struct drm_i915_private *dev_priv)
 	 * gen-specific and since we only disable LCPLL after we fully disable
 	 * the interrupts, the check below should be enough.
 	 */
-	I915_STATE_WARN(intel_irqs_enabled(dev_priv), "IRQs enabled\n");
+	I915_STATE_WARN(dev_priv, intel_irqs_enabled(dev_priv),
+			"IRQs enabled\n");
 }
 
 static u32 hsw_read_dcomp(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index ca0f362a40e3..824be7f03724 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -2080,7 +2080,7 @@ static void assert_pll(struct drm_i915_private *dev_priv,
 	bool cur_state;
 
 	cur_state = intel_de_read(dev_priv, DPLL(pipe)) & DPLL_VCO_ENABLE;
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"PLL state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 936b8de9e439..ee55ab309568 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -169,8 +169,8 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
 		return;
 
 	cur_state = intel_dpll_get_hw_state(dev_priv, pll, &hw_state);
-	I915_STATE_WARN(cur_state != state,
-	     "%s assertion failure (expected %s, current %s)\n",
+	I915_STATE_WARN(dev_priv, cur_state != state,
+			"%s assertion failure (expected %s, current %s)\n",
 			pll->info->name, str_on_off(state),
 			str_on_off(cur_state));
 }
@@ -467,7 +467,8 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)
 	val = intel_de_read(dev_priv, PCH_DREF_CONTROL);
 	enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |
 			    DREF_SUPERSPREAD_SOURCE_MASK));
-	I915_STATE_WARN(!enabled, "PCH refclk assertion failure, should be active but is disabled\n");
+	I915_STATE_WARN(dev_priv, !enabled,
+			"PCH refclk assertion failure, should be active but is disabled\n");
 }
 
 static void ibx_pch_dpll_enable(struct drm_i915_private *dev_priv,
@@ -4405,17 +4406,18 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
 	active = intel_dpll_get_hw_state(dev_priv, pll, &dpll_hw_state);
 
 	if (!(pll->info->flags & INTEL_DPLL_ALWAYS_ON)) {
-		I915_STATE_WARN(!pll->on && pll->active_mask,
+		I915_STATE_WARN(dev_priv, !pll->on && pll->active_mask,
 				"pll in active use but not on in sw tracking\n");
-		I915_STATE_WARN(pll->on && !pll->active_mask,
+		I915_STATE_WARN(dev_priv, pll->on && !pll->active_mask,
 				"pll is on but not used by any active pipe\n");
-		I915_STATE_WARN(pll->on != active,
+		I915_STATE_WARN(dev_priv, pll->on != active,
 				"pll on state mismatch (expected %i, found %i)\n",
 				pll->on, active);
 	}
 
 	if (!crtc) {
-		I915_STATE_WARN(pll->active_mask & ~pll->state.pipe_mask,
+		I915_STATE_WARN(dev_priv,
+				pll->active_mask & ~pll->state.pipe_mask,
 				"more active pll users than references: 0x%x vs 0x%x\n",
 				pll->active_mask, pll->state.pipe_mask);
 
@@ -4425,20 +4427,20 @@ verify_single_dpll_state(struct drm_i915_private *dev_priv,
 	pipe_mask = BIT(crtc->pipe);
 
 	if (new_crtc_state->hw.active)
-		I915_STATE_WARN(!(pll->active_mask & pipe_mask),
+		I915_STATE_WARN(dev_priv, !(pll->active_mask & pipe_mask),
 				"pll active mismatch (expected pipe %c in active mask 0x%x)\n",
 				pipe_name(crtc->pipe), pll->active_mask);
 	else
-		I915_STATE_WARN(pll->active_mask & pipe_mask,
+		I915_STATE_WARN(dev_priv, pll->active_mask & pipe_mask,
 				"pll active mismatch (didn't expect pipe %c in active mask 0x%x)\n",
 				pipe_name(crtc->pipe), pll->active_mask);
 
-	I915_STATE_WARN(!(pll->state.pipe_mask & pipe_mask),
+	I915_STATE_WARN(dev_priv, !(pll->state.pipe_mask & pipe_mask),
 			"pll enabled crtcs mismatch (expected 0x%x in 0x%x)\n",
 			pipe_mask, pll->state.pipe_mask);
 
-	I915_STATE_WARN(pll->on && memcmp(&pll->state.hw_state,
-					  &dpll_hw_state,
+	I915_STATE_WARN(dev_priv,
+			pll->on && memcmp(&pll->state.hw_state, &dpll_hw_state,
 					  sizeof(dpll_hw_state)),
 			"pll hw state mismatch\n");
 }
@@ -4458,10 +4460,10 @@ void intel_shared_dpll_state_verify(struct intel_crtc *crtc,
 		u8 pipe_mask = BIT(crtc->pipe);
 		struct intel_shared_dpll *pll = old_crtc_state->shared_dpll;
 
-		I915_STATE_WARN(pll->active_mask & pipe_mask,
+		I915_STATE_WARN(dev_priv, pll->active_mask & pipe_mask,
 				"pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n",
 				pipe_name(crtc->pipe), pll->active_mask);
-		I915_STATE_WARN(pll->state.pipe_mask & pipe_mask,
+		I915_STATE_WARN(dev_priv, pll->state.pipe_mask & pipe_mask,
 				"pll enabled crtcs mismatch (found %x in enabled mask (0x%x))\n",
 				pipe_name(crtc->pipe), pll->state.pipe_mask);
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 55283677c45a..e12b46a84fa1 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -36,7 +36,7 @@ static void assert_fdi_tx(struct drm_i915_private *dev_priv,
 	} else {
 		cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE;
 	}
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"FDI TX state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
@@ -57,7 +57,7 @@ static void assert_fdi_rx(struct drm_i915_private *dev_priv,
 	bool cur_state;
 
 	cur_state = intel_de_read(dev_priv, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE;
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(dev_priv, cur_state != state,
 			"FDI RX state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
@@ -86,7 +86,8 @@ void assert_fdi_tx_pll_enabled(struct drm_i915_private *i915,
 		return;
 
 	cur_state = intel_de_read(i915, FDI_TX_CTL(pipe)) & FDI_TX_PLL_ENABLE;
-	I915_STATE_WARN(!cur_state, "FDI TX PLL assertion failure, should be active but is disabled\n");
+	I915_STATE_WARN(i915, !cur_state,
+			"FDI TX PLL assertion failure, should be active but is disabled\n");
 }
 
 static void assert_fdi_rx_pll(struct drm_i915_private *i915,
@@ -95,7 +96,7 @@ static void assert_fdi_rx_pll(struct drm_i915_private *i915,
 	bool cur_state;
 
 	cur_state = intel_de_read(i915, FDI_RX_CTL(pipe)) & FDI_RX_PLL_ENABLE;
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(i915, cur_state != state,
 			"FDI RX PLL assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
index 5e0ec15d9fd5..138144a65a45 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
@@ -35,27 +35,28 @@ static void intel_connector_verify_state(struct intel_crtc_state *crtc_state,
 	if (connector->get_hw_state(connector)) {
 		struct intel_encoder *encoder = intel_attached_encoder(connector);
 
-		I915_STATE_WARN(!crtc_state,
+		I915_STATE_WARN(i915, !crtc_state,
 				"connector enabled without attached crtc\n");
 
 		if (!crtc_state)
 			return;
 
-		I915_STATE_WARN(!crtc_state->hw.active,
+		I915_STATE_WARN(i915, !crtc_state->hw.active,
 				"connector is active, but attached crtc isn't\n");
 
 		if (!encoder || encoder->type == INTEL_OUTPUT_DP_MST)
 			return;
 
-		I915_STATE_WARN(conn_state->best_encoder != &encoder->base,
+		I915_STATE_WARN(i915,
+				conn_state->best_encoder != &encoder->base,
 				"atomic encoder doesn't match attached encoder\n");
 
-		I915_STATE_WARN(conn_state->crtc != encoder->base.crtc,
+		I915_STATE_WARN(i915, conn_state->crtc != encoder->base.crtc,
 				"attached encoder crtc differs from connector crtc\n");
 	} else {
-		I915_STATE_WARN(crtc_state && crtc_state->hw.active,
+		I915_STATE_WARN(i915, crtc_state && crtc_state->hw.active,
 				"attached crtc is active, but connector isn't\n");
-		I915_STATE_WARN(!crtc_state && conn_state->best_encoder,
+		I915_STATE_WARN(i915, !crtc_state && conn_state->best_encoder,
 				"best encoder set without crtc!\n");
 	}
 }
@@ -80,7 +81,7 @@ verify_connector_state(struct intel_atomic_state *state,
 
 		intel_connector_verify_state(crtc_state, new_conn_state);
 
-		I915_STATE_WARN(new_conn_state->best_encoder != encoder,
+		I915_STATE_WARN(to_i915(connector->dev), new_conn_state->best_encoder != encoder,
 				"connector's atomic encoder doesn't match legacy encoder\n");
 	}
 }
@@ -131,15 +132,15 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat
 			found = true;
 			enabled = true;
 
-			I915_STATE_WARN(new_conn_state->crtc !=
-					encoder->base.crtc,
+			I915_STATE_WARN(dev_priv,
+					new_conn_state->crtc != encoder->base.crtc,
 					"connector's crtc doesn't match encoder crtc\n");
 		}
 
 		if (!found)
 			continue;
 
-		I915_STATE_WARN(!!encoder->base.crtc != enabled,
+		I915_STATE_WARN(dev_priv, !!encoder->base.crtc != enabled,
 				"encoder's enabled state mismatch (expected %i, found %i)\n",
 				!!encoder->base.crtc, enabled);
 
@@ -147,7 +148,7 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat
 			bool active;
 
 			active = encoder->get_hw_state(encoder, &pipe);
-			I915_STATE_WARN(active,
+			I915_STATE_WARN(dev_priv, active,
 					"encoder detached but still enabled on pipe %c.\n",
 					pipe_name(pipe));
 		}
@@ -182,11 +183,12 @@ verify_crtc_state(struct intel_crtc *crtc,
 	if (IS_I830(dev_priv) && pipe_config->hw.active)
 		pipe_config->hw.active = new_crtc_state->hw.active;
 
-	I915_STATE_WARN(new_crtc_state->hw.active != pipe_config->hw.active,
+	I915_STATE_WARN(dev_priv,
+			new_crtc_state->hw.active != pipe_config->hw.active,
 			"crtc active state doesn't match with hw state (expected %i, found %i)\n",
 			new_crtc_state->hw.active, pipe_config->hw.active);
 
-	I915_STATE_WARN(crtc->active != new_crtc_state->hw.active,
+	I915_STATE_WARN(dev_priv, crtc->active != new_crtc_state->hw.active,
 			"transitional active state does not match atomic hw state (expected %i, found %i)\n",
 			new_crtc_state->hw.active, crtc->active);
 
@@ -197,12 +199,12 @@ verify_crtc_state(struct intel_crtc *crtc,
 		bool active;
 
 		active = encoder->get_hw_state(encoder, &pipe);
-		I915_STATE_WARN(active != new_crtc_state->hw.active,
+		I915_STATE_WARN(dev_priv, active != new_crtc_state->hw.active,
 				"[ENCODER:%i] active %i with crtc active %i\n",
 				encoder->base.base.id, active,
 				new_crtc_state->hw.active);
 
-		I915_STATE_WARN(active && master_crtc->pipe != pipe,
+		I915_STATE_WARN(dev_priv, active && master_crtc->pipe != pipe,
 				"Encoder connected to wrong pipe %c\n",
 				pipe_name(pipe));
 
@@ -217,7 +219,7 @@ verify_crtc_state(struct intel_crtc *crtc,
 
 	if (!intel_pipe_config_compare(new_crtc_state,
 				       pipe_config, false)) {
-		I915_STATE_WARN(1, "pipe state doesn't match!\n");
+		I915_STATE_WARN(dev_priv, 1, "pipe state doesn't match!\n");
 		intel_crtc_state_dump(pipe_config, NULL, "hw state");
 		intel_crtc_state_dump(new_crtc_state, NULL, "sw state");
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 2411fe4dee8b..866786e6b32f 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -43,11 +43,12 @@ static void assert_pch_dp_disabled(struct drm_i915_private *dev_priv,
 
 	state = g4x_dp_port_enabled(dev_priv, dp_reg, port, &port_pipe);
 
-	I915_STATE_WARN(state && port_pipe == pipe,
+	I915_STATE_WARN(dev_priv, state && port_pipe == pipe,
 			"PCH DP %c enabled on transcoder %c, should be disabled\n",
 			port_name(port), pipe_name(pipe));
 
-	I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
+	I915_STATE_WARN(dev_priv,
+			HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
 			"IBX PCH DP %c still using transcoder B\n",
 			port_name(port));
 }
@@ -61,11 +62,12 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv,
 
 	state = intel_sdvo_port_enabled(dev_priv, hdmi_reg, &port_pipe);
 
-	I915_STATE_WARN(state && port_pipe == pipe,
+	I915_STATE_WARN(dev_priv, state && port_pipe == pipe,
 			"PCH HDMI %c enabled on transcoder %c, should be disabled\n",
 			port_name(port), pipe_name(pipe));
 
-	I915_STATE_WARN(HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
+	I915_STATE_WARN(dev_priv,
+			HAS_PCH_IBX(dev_priv) && !state && port_pipe == PIPE_B,
 			"IBX PCH HDMI %c still using transcoder B\n",
 			port_name(port));
 }
@@ -79,13 +81,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv,
 	assert_pch_dp_disabled(dev_priv, pipe, PORT_C, PCH_DP_C);
 	assert_pch_dp_disabled(dev_priv, pipe, PORT_D, PCH_DP_D);
 
-	I915_STATE_WARN(intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) &&
-			port_pipe == pipe,
+	I915_STATE_WARN(dev_priv,
+			intel_crt_port_enabled(dev_priv, PCH_ADPA, &port_pipe) && port_pipe == pipe,
 			"PCH VGA enabled on transcoder %c, should be disabled\n",
 			pipe_name(pipe));
 
-	I915_STATE_WARN(intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) &&
-			port_pipe == pipe,
+	I915_STATE_WARN(dev_priv,
+			intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) && port_pipe == pipe,
 			"PCH LVDS enabled on transcoder %c, should be disabled\n",
 			pipe_name(pipe));
 
@@ -103,7 +105,7 @@ static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv,
 
 	val = intel_de_read(dev_priv, PCH_TRANSCONF(pipe));
 	enabled = !!(val & TRANS_ENABLE);
-	I915_STATE_WARN(enabled,
+	I915_STATE_WARN(dev_priv, enabled,
 			"transcoder assertion failed, should be off on pipe %c but is still active\n",
 			pipe_name(pipe));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 4f0b0cca03cc..5e7ba594e7e7 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -787,7 +787,7 @@ void intel_pps_vdd_on(struct intel_dp *intel_dp)
 	vdd = false;
 	with_intel_pps_lock(intel_dp, wakeref)
 		vdd = intel_pps_vdd_on_unlocked(intel_dp);
-	I915_STATE_WARN(!vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
+	I915_STATE_WARN(i915, !vdd, "[ENCODER:%d:%s] %s VDD already requested on\n",
 			dp_to_dig_port(intel_dp)->base.base.base.id,
 			dp_to_dig_port(intel_dp)->base.base.name,
 			pps_name(i915, &intel_dp->pps));
@@ -899,7 +899,8 @@ void intel_pps_vdd_off_unlocked(struct intel_dp *intel_dp, bool sync)
 	if (!intel_dp_is_edp(intel_dp))
 		return;
 
-	I915_STATE_WARN(!intel_dp->pps.want_panel_vdd, "[ENCODER:%d:%s] %s VDD not forced on",
+	I915_STATE_WARN(dev_priv, !intel_dp->pps.want_panel_vdd,
+			"[ENCODER:%d:%s] %s VDD not forced on",
 			dp_to_dig_port(intel_dp)->base.base.base.id,
 			dp_to_dig_port(intel_dp)->base.base.name,
 			pps_name(dev_priv, &intel_dp->pps));
@@ -1721,7 +1722,7 @@ void assert_pps_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
 	    ((val & PANEL_UNLOCK_MASK) == PANEL_UNLOCK_REGS))
 		locked = false;
 
-	I915_STATE_WARN(panel_pipe == pipe && locked,
+	I915_STATE_WARN(dev_priv, panel_pipe == pipe && locked,
 			"panel assertion failure, pipe %c regs locked\n",
 			pipe_name(pipe));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c
index a72677bf617b..88ef56b6e0fd 100644
--- a/drivers/gpu/drm/i915/display/intel_snps_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c
@@ -2016,7 +2016,7 @@ void intel_mpllb_state_verify(struct intel_atomic_state *state,
 	intel_mpllb_readout_hw_state(encoder, &mpllb_hw_state);
 
 #define MPLLB_CHECK(__name)						\
-	I915_STATE_WARN(mpllb_sw_state->__name != mpllb_hw_state.__name,	\
+	I915_STATE_WARN(i915, mpllb_sw_state->__name != mpllb_hw_state.__name, \
 			"[CRTC:%d:%s] mismatch in MPLLB: %s (expected 0x%08x, found 0x%08x)", \
 			crtc->base.base.id, crtc->base.name,		\
 			__stringify(__name),				\
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
index b697badbbe71..ae0a0b11bae3 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
@@ -598,7 +598,7 @@ static void assert_dsi_pll(struct drm_i915_private *i915, bool state)
 	cur_state = vlv_cck_read(i915, CCK_REG_DSI_PLL_CONTROL) & DSI_PLL_VCO_EN;
 	vlv_cck_put(i915);
 
-	I915_STATE_WARN(cur_state != state,
+	I915_STATE_WARN(i915, cur_state != state,
 			"DSI PLL state assertion failure (expected %s, current %s)\n",
 			str_on_off(state), str_on_off(cur_state));
 }
-- 
2.39.2

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()
URL   : https://patchwork.freedesktop.org/series/117685/
State : warning

== Summary ==

Error: dim checkpatch failed
0069d0cb8670 drm/i915/dpll: drop a useless I915_STATE_WARN_ON()
36901f4331a1 drm/i915/crtc: replace I915_STATE_WARN_ON() with I915_STATE_WARN()
7255d8345e66 drm/i915/display: remove I915_STATE_WARN_ON()
0cf62eb904a6 drm/i915/display: add i915 parameter to I915_STATE_WARN()
-:177: WARNING:LONG_LINE: line length of 146 exceeds 100 columns
#177: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1197:
+			(intel_de_read(dev_priv, UTIL_PIN_CTL) & (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) == (UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),

-:507: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#507: FILE: drivers/gpu/drm/i915/display/intel_pch_display.c:90:
+			intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) && port_pipe == pipe,

total: 0 errors, 2 warnings, 0 checks, 474 lines checked

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 12504 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()
URL   : https://patchwork.freedesktop.org/series/117685/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13142 -> Patchwork_117685v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_117685v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_117685v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/index.html

Participating hosts (40 -> 38)
------------------------------

  Missing    (2): fi-snb-2520m bat-mtlp-6 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_117685v1:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_module_load@load:
    - fi-ilk-650:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-ilk-650/igt@i915_module_load@load.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-ilk-650/igt@i915_module_load@load.html
    - fi-blb-e6850:       [PASS][3] -> [ABORT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-blb-e6850/igt@i915_module_load@load.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-blb-e6850/igt@i915_module_load@load.html
    - fi-bsw-n3050:       [PASS][5] -> [ABORT][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-bsw-n3050/igt@i915_module_load@load.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-bsw-n3050/igt@i915_module_load@load.html
    - fi-rkl-11600:       [PASS][7] -> [ABORT][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-rkl-11600/igt@i915_module_load@load.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-rkl-11600/igt@i915_module_load@load.html
    - bat-adls-5:         [PASS][9] -> [ABORT][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-adls-5/igt@i915_module_load@load.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-adls-5/igt@i915_module_load@load.html
    - bat-dg1-5:          [PASS][11] -> [ABORT][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-dg1-5/igt@i915_module_load@load.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-dg1-5/igt@i915_module_load@load.html
    - bat-adln-1:         [PASS][13] -> [ABORT][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-adln-1/igt@i915_module_load@load.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-adln-1/igt@i915_module_load@load.html
    - fi-cfl-8700k:       [PASS][15] -> [ABORT][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-cfl-8700k/igt@i915_module_load@load.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-cfl-8700k/igt@i915_module_load@load.html
    - fi-elk-e7500:       [PASS][17] -> [ABORT][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-elk-e7500/igt@i915_module_load@load.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-elk-e7500/igt@i915_module_load@load.html
    - bat-rplp-1:         [PASS][19] -> [ABORT][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-rplp-1/igt@i915_module_load@load.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-rplp-1/igt@i915_module_load@load.html
    - fi-hsw-4770:        [PASS][21] -> [ABORT][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-hsw-4770/igt@i915_module_load@load.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-hsw-4770/igt@i915_module_load@load.html
    - fi-ivb-3770:        [PASS][23] -> [ABORT][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-ivb-3770/igt@i915_module_load@load.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-ivb-3770/igt@i915_module_load@load.html

  * igt@kms_force_connector_basic@force-connector-state:
    - bat-adlm-1:         [PASS][25] -> [ABORT][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-adlm-1/igt@kms_force_connector_basic@force-connector-state.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-adlm-1/igt@kms_force_connector_basic@force-connector-state.html
    - bat-dg1-7:          [PASS][27] -> [ABORT][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-dg1-7/igt@kms_force_connector_basic@force-connector-state.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-dg1-7/igt@kms_force_connector_basic@force-connector-state.html
    - fi-bsw-nick:        [PASS][29] -> [ABORT][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-bsw-nick/igt@kms_force_connector_basic@force-connector-state.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-bsw-nick/igt@kms_force_connector_basic@force-connector-state.html
    - bat-rpls-2:         [PASS][31] -> [ABORT][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-rpls-2/igt@kms_force_connector_basic@force-connector-state.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-rpls-2/igt@kms_force_connector_basic@force-connector-state.html

  
Known issues
------------

  Here are the changes found in Patchwork_117685v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@load:
    - bat-jsl-1:          [PASS][33] -> [ABORT][34] ([i915#8189])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-jsl-1/igt@i915_module_load@load.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-jsl-1/igt@i915_module_load@load.html
    - bat-adlp-6:         [PASS][35] -> [ABORT][36] ([i915#8189])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-adlp-6/igt@i915_module_load@load.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-adlp-6/igt@i915_module_load@load.html
    - fi-skl-6600u:       [PASS][37] -> [ABORT][38] ([i915#8189])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-skl-6600u/igt@i915_module_load@load.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-skl-6600u/igt@i915_module_load@load.html
    - fi-apl-guc:         [PASS][39] -> [ABORT][40] ([i915#8189])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-apl-guc/igt@i915_module_load@load.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-apl-guc/igt@i915_module_load@load.html
    - bat-jsl-3:          [PASS][41] -> [ABORT][42] ([i915#8189])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-jsl-3/igt@i915_module_load@load.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-jsl-3/igt@i915_module_load@load.html
    - fi-glk-j4005:       [PASS][43] -> [ABORT][44] ([i915#8143])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-glk-j4005/igt@i915_module_load@load.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-glk-j4005/igt@i915_module_load@load.html
    - bat-adlp-9:         [PASS][45] -> [ABORT][46] ([i915#8189])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-adlp-9/igt@i915_module_load@load.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-adlp-9/igt@i915_module_load@load.html
    - fi-skl-guc:         [PASS][47] -> [ABORT][48] ([i915#8189])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-skl-guc/igt@i915_module_load@load.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-skl-guc/igt@i915_module_load@load.html
    - bat-dg2-11:         [PASS][49] -> [ABORT][50] ([i915#7953] / [i915#8189])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-dg2-11/igt@i915_module_load@load.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-dg2-11/igt@i915_module_load@load.html
    - fi-kbl-7567u:       [PASS][51] -> [ABORT][52] ([i915#8141])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-kbl-7567u/igt@i915_module_load@load.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-kbl-7567u/igt@i915_module_load@load.html
    - fi-tgl-1115g4:      [PASS][53] -> [ABORT][54] ([i915#7953] / [i915#8189])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-tgl-1115g4/igt@i915_module_load@load.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-tgl-1115g4/igt@i915_module_load@load.html
    - fi-cfl-guc:         [PASS][55] -> [ABORT][56] ([i915#8141])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-cfl-guc/igt@i915_module_load@load.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-cfl-guc/igt@i915_module_load@load.html
    - bat-dg2-9:          [PASS][57] -> [ABORT][58] ([i915#7953] / [i915#8189])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-dg2-9/igt@i915_module_load@load.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-dg2-9/igt@i915_module_load@load.html
    - fi-cfl-8109u:       [PASS][59] -> [ABORT][60] ([i915#8141])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-cfl-8109u/igt@i915_module_load@load.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-cfl-8109u/igt@i915_module_load@load.html
    - bat-dg2-8:          [PASS][61] -> [ABORT][62] ([i915#7953] / [i915#8189])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-dg2-8/igt@i915_module_load@load.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-dg2-8/igt@i915_module_load@load.html

  * igt@kms_force_connector_basic@force-connector-state:
    - bat-rpls-1:         [PASS][63] -> [ABORT][64] ([i915#7953])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/bat-rpls-1/igt@kms_force_connector_basic@force-connector-state.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/bat-rpls-1/igt@kms_force_connector_basic@force-connector-state.html
    - fi-kbl-x1275:       [PASS][65] -> [ABORT][66] ([i915#8299])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html
    - fi-kbl-guc:         [PASS][67] -> [ABORT][68] ([i915#8299])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13142/fi-kbl-guc/igt@kms_force_connector_basic@force-connector-state.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/fi-kbl-guc/igt@kms_force_connector_basic@force-connector-state.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#7953]: https://gitlab.freedesktop.org/drm/intel/issues/7953
  [i915#8141]: https://gitlab.freedesktop.org/drm/intel/issues/8141
  [i915#8143]: https://gitlab.freedesktop.org/drm/intel/issues/8143
  [i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
  [i915#8299]: https://gitlab.freedesktop.org/drm/intel/issues/8299


Build changes
-------------

  * Linux: CI_DRM_13142 -> Patchwork_117685v1

  CI-20190529: 20190529
  CI_DRM_13142: feb7ce5e6311c1fe13bd46dbcd38385643323e37 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7286: a482779488f11c432d7ddcb1980691ab1603f356 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_117685v1: feb7ce5e6311c1fe13bd46dbcd38385643323e37 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

c2973dfb901e drm/i915/display: add i915 parameter to I915_STATE_WARN()
56a181355bad drm/i915/display: remove I915_STATE_WARN_ON()
a6580d03f82a drm/i915/crtc: replace I915_STATE_WARN_ON() with I915_STATE_WARN()
c61e3534abee drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v1/index.html

[-- Attachment #2: Type: text/html, Size: 14771 bytes --]

Re: [Intel-gfx] [PATCH 1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

[Rodrigo Vivi]

On Fri, May 12, 2023 at 02:04:41PM +0300, Jani Nikula wrote:
> In general, we don't do assertions that a function gets called on the
> right platforms, and if we did, it should not be a state warn.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index ed372d227aa7..936b8de9e439 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -464,8 +464,6 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)
>  	u32 val;
>  	bool enabled;
>  
> -	I915_STATE_WARN_ON(!(HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)));
> -
>  	val = intel_de_read(dev_priv, PCH_DREF_CONTROL);
>  	enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |
>  			    DREF_SUPERSPREAD_SOURCE_MASK));
> -- 
> 2.39.2
> 

Re: [Intel-gfx] [PATCH 1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

[Jani Nikula]

On Fri, 12 May 2023, Rodrigo Vivi <rodrigo.vivi@kernel.org> wrote:
> On Fri, May 12, 2023 at 02:04:41PM +0300, Jani Nikula wrote:
>> In general, we don't do assertions that a function gets called on the
>> right platforms, and if we did, it should not be a state warn.
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Thanks for the review, pushed to din.

BR,
Jani.


>> ---
>>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 --
>>  1 file changed, 2 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
>> index ed372d227aa7..936b8de9e439 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
>> @@ -464,8 +464,6 @@ static void ibx_assert_pch_refclk_enabled(struct drm_i915_private *dev_priv)
>>  	u32 val;
>>  	bool enabled;
>>  
>> -	I915_STATE_WARN_ON(!(HAS_PCH_IBX(dev_priv) || HAS_PCH_CPT(dev_priv)));
>> -
>>  	val = intel_de_read(dev_priv, PCH_DREF_CONTROL);
>>  	enabled = !!(val & (DREF_SSC_SOURCE_MASK | DREF_NONSPREAD_SOURCE_MASK |
>>  			    DREF_SUPERSPREAD_SOURCE_MASK));
>> -- 
>> 2.39.2
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON() (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON() (rev2)
URL   : https://patchwork.freedesktop.org/series/117685/
State : warning

== Summary ==

Error: dim checkpatch failed
c7e4ac68951f drm/i915/dpll: drop a useless I915_STATE_WARN_ON()
828667e88c08 drm/i915/crtc: replace I915_STATE_WARN_ON() with I915_STATE_WARN()
4f60e04a5946 drm/i915/display: remove I915_STATE_WARN_ON()
b8924587748c drm/i915/display: add i915 parameter to I915_STATE_WARN()
-:180: WARNING:LONG_LINE: line length of 146 exceeds 100 columns
#180: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1197:
+			(intel_de_read(dev_priv, UTIL_PIN_CTL) & (UTIL_PIN_ENABLE | UTIL_PIN_MODE_MASK)) == (UTIL_PIN_ENABLE | UTIL_PIN_MODE_PWM),

-:502: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#502: FILE: drivers/gpu/drm/i915/display/intel_pch_display.c:90:
+			intel_lvds_port_enabled(dev_priv, PCH_LVDS, &port_pipe) && port_pipe == pipe,

total: 0 errors, 2 warnings, 0 checks, 467 lines checked

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON() (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6344 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON() (rev2)
URL   : https://patchwork.freedesktop.org/series/117685/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13143 -> Patchwork_117685v2
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/index.html

Participating hosts (38 -> 36)
------------------------------

  Missing    (2): fi-apl-guc fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_117685v2 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_backlight@basic-brightness@edp-1:
    - bat-rplp-1:         NOTRUN -> [ABORT][1] ([i915#7077])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-rplp-1/igt@i915_pm_backlight@basic-brightness@edp-1.html

  * igt@i915_selftest@live@gt_engines:
    - bat-atsm-1:         [PASS][2] -> [FAIL][3] ([i915#6268])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/bat-atsm-1/igt@i915_selftest@live@gt_engines.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-atsm-1/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         NOTRUN -> [DMESG-WARN][4] ([i915#6367] / [i915#7953])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-rpls-1/igt@i915_selftest@live@slpc.html

  * igt@i915_suspend@basic-s3-without-i915:
    - bat-rpls-1:         NOTRUN -> [ABORT][5] ([i915#6687] / [i915#7953] / [i915#7978])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-rpls-1/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
    - bat-dg2-8:          [PASS][6] -> [FAIL][7] ([i915#7932])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1:
    - fi-rkl-11600:       [PASS][8] -> [FAIL][9] ([fdo#103375])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@reset:
    - bat-rpls-1:         [ABORT][10] ([i915#4983] / [i915#7461] / [i915#7953] / [i915#8347] / [i915#8384]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/bat-rpls-1/igt@i915_selftest@live@reset.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-rpls-1/igt@i915_selftest@live@reset.html

  * igt@i915_selftest@live@slpc:
    - {bat-mtlp-6}:       [DMESG-WARN][12] ([i915#6367] / [i915#7953]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/bat-mtlp-6/igt@i915_selftest@live@slpc.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-mtlp-6/igt@i915_selftest@live@slpc.html

  
#### Warnings ####

  * igt@i915_selftest@live@reset:
    - bat-rpls-2:         [ABORT][14] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#8347]) -> [ABORT][15] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#7981] / [i915#8347])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/bat-rpls-2/igt@i915_selftest@live@reset.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-rpls-2/igt@i915_selftest@live@reset.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-rplp-1:         [ABORT][16] ([i915#4579] / [i915#8260]) -> [SKIP][17] ([i915#3555] / [i915#4579])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
  [i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#7953]: https://gitlab.freedesktop.org/drm/intel/issues/7953
  [i915#7978]: https://gitlab.freedesktop.org/drm/intel/issues/7978
  [i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
  [i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
  [i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
  [i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384


Build changes
-------------

  * Linux: CI_DRM_13143 -> Patchwork_117685v2

  CI-20190529: 20190529
  CI_DRM_13143: 222ff19f23b0bd6aca0b52001d69699f78f5a206 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7286: a482779488f11c432d7ddcb1980691ab1603f356 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_117685v2: 222ff19f23b0bd6aca0b52001d69699f78f5a206 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

7d0e3ab99a5e drm/i915/display: add i915 parameter to I915_STATE_WARN()
bc118e16c37b drm/i915/display: remove I915_STATE_WARN_ON()
4e64563900c1 drm/i915/crtc: replace I915_STATE_WARN_ON() with I915_STATE_WARN()
14502441ac3f drm/i915/dpll: drop a useless I915_STATE_WARN_ON()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/index.html

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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON() (rev2)

[Patchwork]

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== Series Details ==

Series: series starting with [1/4] drm/i915/dpll: drop a useless I915_STATE_WARN_ON() (rev2)
URL   : https://patchwork.freedesktop.org/series/117685/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13143_full -> Patchwork_117685v2_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (7 -> 7)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in Patchwork_117685v2_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-apl:          [PASS][1] -> [FAIL][2] ([i915#2842])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [PASS][3] -> [FAIL][4] ([i915#2842])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-glk2/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_lmem_swapping@massive-random:
    - shard-glk:          NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk6/igt@gem_lmem_swapping@massive-random.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-glk:          NOTRUN -> [SKIP][6] ([fdo#109271]) +26 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk6/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_content_protection@atomic:
    - shard-glk:          NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4579])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk6/igt@kms_content_protection@atomic.html

  
#### Possible fixes ####

  * igt@gem_barrier_race@remote-request@rcs0:
    - shard-glk:          [ABORT][8] ([i915#7461] / [i915#8211]) -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-glk2/igt@gem_barrier_race@remote-request@rcs0.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk4/igt@gem_barrier_race@remote-request@rcs0.html

  * igt@gem_ctx_freq@sysfs:
    - {shard-dg1}:        [FAIL][10] ([i915#6786]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-dg1-15/igt@gem_ctx_freq@sysfs.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-dg1-12/igt@gem_ctx_freq@sysfs.html

  * igt@gem_eio@hibernate:
    - {shard-dg1}:        [ABORT][12] ([i915#7975] / [i915#8213]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-dg1-14/igt@gem_eio@hibernate.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-dg1-15/igt@gem_eio@hibernate.html

  * igt@gem_eio@in-flight-contexts-10ms:
    - {shard-tglu}:       [TIMEOUT][14] ([i915#3063] / [i915#7941]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-tglu-3/igt@gem_eio@in-flight-contexts-10ms.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-tglu-3/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [FAIL][16] ([i915#2846]) -> [PASS][17]
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-glk2/igt@gem_exec_fair@basic-deadline.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk1/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - {shard-rkl}:        [FAIL][18] ([i915#2842]) -> [PASS][19] +1 similar issue
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-rkl-1/igt@gem_exec_fair@basic-pace@rcs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - {shard-dg1}:        [TIMEOUT][20] ([i915#5493]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-dg1-17/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-dg1-12/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-glk:          [ABORT][22] ([i915#5566]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-glk1/igt@gen9_exec_parse@allowed-single.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk6/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - {shard-rkl}:        [SKIP][24] ([i915#1397]) -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-rkl-2/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-rkl-7/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
    - shard-glk:          [FAIL][26] ([i915#79]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html

  
#### Warnings ####

  * igt@kms_content_protection@mei_interface:
    - shard-snb:          [SKIP][28] ([fdo#109271] / [i915#4579]) -> [SKIP][29] ([fdo#109271])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13143/shard-snb4/igt@kms_content_protection@mei_interface.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/shard-snb2/igt@kms_content_protection@mei_interface.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
  [i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6786]: https://gitlab.freedesktop.org/drm/intel/issues/6786
  [i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#7941]: https://gitlab.freedesktop.org/drm/intel/issues/7941
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
  [i915#8211]: https://gitlab.freedesktop.org/drm/intel/issues/8211
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8224]: https://gitlab.freedesktop.org/drm/intel/issues/8224
  [i915#8311]: https://gitlab.freedesktop.org/drm/intel/issues/8311


Build changes
-------------

  * Linux: CI_DRM_13143 -> Patchwork_117685v2

  CI-20190529: 20190529
  CI_DRM_13143: 222ff19f23b0bd6aca0b52001d69699f78f5a206 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7286: a482779488f11c432d7ddcb1980691ab1603f356 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_117685v2: 222ff19f23b0bd6aca0b52001d69699f78f5a206 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_117685v2/index.html

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