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From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 2/7] drm/i915/pmu: Support PMU for all engines
Date: Tue, 16 May 2023 16:35:29 -0700	[thread overview]
Message-ID: <20230516233534.3610598-3-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20230516233534.3610598-1-umesh.nerlige.ramappa@intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Given how the metrics are already exported, we also need to run sampling
over engines from all GTs.

Problem of GT frequencies is left for later.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 96543dce2db1..9edf87ee5d10 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -10,6 +10,7 @@
 #include "gt/intel_engine_pm.h"
 #include "gt/intel_engine_regs.h"
 #include "gt/intel_engine_user.h"
+#include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_gt_regs.h"
 #include "gt/intel_rc6.h"
@@ -425,8 +426,9 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
 	struct drm_i915_private *i915 =
 		container_of(hrtimer, struct drm_i915_private, pmu.timer);
 	struct i915_pmu *pmu = &i915->pmu;
-	struct intel_gt *gt = to_gt(i915);
 	unsigned int period_ns;
+	struct intel_gt *gt;
+	unsigned int i;
 	ktime_t now;
 
 	if (!READ_ONCE(pmu->timer_enabled))
@@ -442,8 +444,13 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
 	 * grabbing the forcewake. However the potential error from timer call-
 	 * back delay greatly dominates this so we keep it simple.
 	 */
-	engines_sample(gt, period_ns);
-	frequency_sample(gt, period_ns);
+
+	for_each_gt(gt, i915, i) {
+		engines_sample(gt, period_ns);
+
+		if (i == 0) /* FIXME */
+			frequency_sample(gt, period_ns);
+	}
 
 	hrtimer_forward(hrtimer, now, ns_to_ktime(PERIOD));
 
-- 
2.36.1


  parent reply	other threads:[~2023-05-16 23:35 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-16 23:35 [Intel-gfx] [PATCH v5 0/7] Add MTL PMU support for multi-gt Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 1/7] drm/i915/pmu: Change bitmask of enabled events to u32 Umesh Nerlige Ramappa
2023-05-17  0:25   ` Dixit, Ashutosh
2023-05-17  6:55     ` Umesh Nerlige Ramappa
2023-05-17  8:26       ` Tvrtko Ursulin
2023-05-17 16:25         ` Dixit, Ashutosh
2023-05-17 20:15           ` Umesh Nerlige Ramappa
2023-05-17 20:15             ` Dixit, Ashutosh
2023-05-18  9:07           ` Tvrtko Ursulin
2023-05-19  5:02             ` Dixit, Ashutosh
2023-05-16 23:35 ` Umesh Nerlige Ramappa [this message]
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 3/7] drm/i915/pmu: Skip sampling engines with no enabled counters Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 4/7] drm/i915/pmu: Transform PMU parking code to be GT based Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 5/7] drm/i915/pmu: Add reference counting to the sampling timer Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 6/7] drm/i915/pmu: Prepare for multi-tile non-engine counters Umesh Nerlige Ramappa
2023-05-17  0:39   ` Dixit, Ashutosh
2023-05-17  6:57     ` Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 7/7] drm/i915/pmu: Export counters from all tiles Umesh Nerlige Ramappa
2023-05-17  0:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add MTL PMU support for multi-gt Patchwork
2023-05-17 11:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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