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From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 5/7] drm/i915/pmu: Add reference counting to the sampling timer
Date: Tue, 16 May 2023 16:35:32 -0700	[thread overview]
Message-ID: <20230516233534.3610598-6-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20230516233534.3610598-1-umesh.nerlige.ramappa@intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

We do not want to have timers per tile and waste CPU cycles and energy via
multiple wake-up sources, for a relatively un-important task of PMU
sampling, so keeping a single timer works well. But we also do not want
the first GT which goes idle to turn off the timer.

Add some reference counting, via a mask of unparked GTs, to solve this.

v2: Drop the check for unparked in i915_sample (Ashutosh)
v3: Revert v2 (Tvrtko)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 12 ++++++++++--
 drivers/gpu/drm/i915/i915_pmu.h |  4 ++++
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 890693fdaf9e..ecb57a94143e 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -262,7 +262,9 @@ void i915_pmu_gt_parked(struct intel_gt *gt)
 	 * Signal sampling timer to stop if only engine events are enabled and
 	 * GPU went idle.
 	 */
-	pmu->timer_enabled = pmu_needs_timer(pmu, false);
+	pmu->unparked &= ~BIT(gt->info.id);
+	if (pmu->unparked == 0)
+		pmu->timer_enabled = pmu_needs_timer(pmu, false);
 
 	spin_unlock_irq(&pmu->lock);
 }
@@ -279,7 +281,10 @@ void i915_pmu_gt_unparked(struct intel_gt *gt)
 	/*
 	 * Re-enable sampling timer when GPU goes active.
 	 */
-	__i915_pmu_maybe_start_timer(pmu);
+	if (pmu->unparked == 0)
+		__i915_pmu_maybe_start_timer(pmu);
+
+	pmu->unparked |= BIT(gt->info.id);
 
 	spin_unlock_irq(&pmu->lock);
 }
@@ -449,6 +454,9 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
 	 */
 
 	for_each_gt(gt, i915, i) {
+		if (!(pmu->unparked & BIT(i)))
+			continue;
+
 		engines_sample(gt, period_ns);
 
 		if (i == 0) /* FIXME */
diff --git a/drivers/gpu/drm/i915/i915_pmu.h b/drivers/gpu/drm/i915/i915_pmu.h
index a686fd7ccedf..3a811266ac6a 100644
--- a/drivers/gpu/drm/i915/i915_pmu.h
+++ b/drivers/gpu/drm/i915/i915_pmu.h
@@ -76,6 +76,10 @@ struct i915_pmu {
 	 * @lock: Lock protecting enable mask and ref count handling.
 	 */
 	spinlock_t lock;
+	/**
+	 * @unparked: GT unparked mask.
+	 */
+	unsigned int unparked;
 	/**
 	 * @timer: Timer for internal i915 PMU sampling.
 	 */
-- 
2.36.1


  parent reply	other threads:[~2023-05-16 23:35 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-16 23:35 [Intel-gfx] [PATCH v5 0/7] Add MTL PMU support for multi-gt Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 1/7] drm/i915/pmu: Change bitmask of enabled events to u32 Umesh Nerlige Ramappa
2023-05-17  0:25   ` Dixit, Ashutosh
2023-05-17  6:55     ` Umesh Nerlige Ramappa
2023-05-17  8:26       ` Tvrtko Ursulin
2023-05-17 16:25         ` Dixit, Ashutosh
2023-05-17 20:15           ` Umesh Nerlige Ramappa
2023-05-17 20:15             ` Dixit, Ashutosh
2023-05-18  9:07           ` Tvrtko Ursulin
2023-05-19  5:02             ` Dixit, Ashutosh
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 2/7] drm/i915/pmu: Support PMU for all engines Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 3/7] drm/i915/pmu: Skip sampling engines with no enabled counters Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 4/7] drm/i915/pmu: Transform PMU parking code to be GT based Umesh Nerlige Ramappa
2023-05-16 23:35 ` Umesh Nerlige Ramappa [this message]
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 6/7] drm/i915/pmu: Prepare for multi-tile non-engine counters Umesh Nerlige Ramappa
2023-05-17  0:39   ` Dixit, Ashutosh
2023-05-17  6:57     ` Umesh Nerlige Ramappa
2023-05-16 23:35 ` [Intel-gfx] [PATCH v5 7/7] drm/i915/pmu: Export counters from all tiles Umesh Nerlige Ramappa
2023-05-17  0:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add MTL PMU support for multi-gt Patchwork
2023-05-17 11:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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