* [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation
@ 2023-05-25 16:25 Andi Shyti
0 siblings, 0 replies; 6+ messages in thread
From: Andi Shyti @ 2023-05-25 16:25 UTC (permalink / raw)
To: Intel GFX
From: Fei Yang <fei.yang@intel.com>
[ Just resending this patch to in order to have the results from the igt's
written for this patch ]
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased on https://patchwork.freedesktop.org/series/117082/
v4: fix missing unlock introduced in v3, and
solve a rebase conflict
v5: replace obj->cache_level with pat_set_by_user,
fix i915_cache_level_str() for legacy platforms.
v6: rebased on https://patchwork.freedesktop.org/series/117480/
v7: rebased on https://patchwork.freedesktop.org/series/117528/
v8: dropped the two dependent patches that has been merged
separately. Add IGT link and Tested-by (MESA).
v9: addressing comments (Andi)
v10: acked-by and tested-by MESA
v11: drop "end support for set caching ioctl" (merged)
remove tools/include/uapi/drm/i915_drm.h
v12: drop Bspec reference in comment. add to commit message instead
Test-with: 20230524155610.360748-2-fei.yang@intel.com
Fei Yang (1):
drm/i915: Allow user to set cache at BO creation
drivers/gpu/drm/i915/gem/i915_gem_create.c | 36 +++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 ++++
include/uapi/drm/i915_drm.h | 41 ++++++++++++++++++++++
3 files changed, 83 insertions(+)
--
2.40.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation
@ 2023-05-26 17:29 Andi Shyti
2023-05-26 17:29 ` [Intel-gfx] [CI v12 1/1] " Andi Shyti
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Andi Shyti @ 2023-05-26 17:29 UTC (permalink / raw)
To: Intel GFX, Andi Shyti, Fei Yang
From: Fei Yang <fei.yang@intel.com>
[ Just resending this patch to in order to have the results from the igt's
written for this patch ]
This series introduce a new extension for GEM_CREATE,
1. end support for set caching ioctl [PATCH 1/2]
2. add set_pat extension for gem_create [PATCH 2/2]
v2: drop one patch that was merged separately
commit 341ad0e8e254 ("drm/i915/mtl: Add PTE encode function")
v3: rebased on https://patchwork.freedesktop.org/series/117082/
v4: fix missing unlock introduced in v3, and
solve a rebase conflict
v5: replace obj->cache_level with pat_set_by_user,
fix i915_cache_level_str() for legacy platforms.
v6: rebased on https://patchwork.freedesktop.org/series/117480/
v7: rebased on https://patchwork.freedesktop.org/series/117528/
v8: dropped the two dependent patches that has been merged
separately. Add IGT link and Tested-by (MESA).
v9: addressing comments (Andi)
v10: acked-by and tested-by MESA
v11: drop "end support for set caching ioctl" (merged)
remove tools/include/uapi/drm/i915_drm.h
v12: drop Bspec reference in comment. add to commit message instead
Test-with: 20230526172221.1438998-2-fei.yang@intel.com
Fei Yang (1):
drm/i915: Allow user to set cache at BO creation
drivers/gpu/drm/i915/gem/i915_gem_create.c | 36 +++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 ++++
include/uapi/drm/i915_drm.h | 41 ++++++++++++++++++++++
3 files changed, 83 insertions(+)
--
2.40.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] [CI v12 1/1] drm/i915: Allow user to set cache at BO creation
2023-05-26 17:29 [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation Andi Shyti
@ 2023-05-26 17:29 ` Andi Shyti
2023-05-26 19:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Allow user to set cache at BO creation (rev14) Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Andi Shyti @ 2023-05-26 17:29 UTC (permalink / raw)
To: Intel GFX, Andi Shyti, Fei Yang
From: Fei Yang <fei.yang@intel.com>
To comply with the design that buffer objects shall have immutable
cache setting through out their life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at object creation time. The current code
applies a default (platform dependent) cache setting for all objects.
However this is not optimal for performance tuning. The patch extends
the existing gem_create uAPI to let user set PAT index for the object
at creation time.
The new extension is platform independent, so UMD's can switch to using
this extension for older platforms as well, while {set, get}_caching are
still supported on these legacy paltforms for compatibility reason.
BSpec: 45101
Test igt@gem_create@create_ext_set_pat posted at
https://patchwork.freedesktop.org/series/118314/
Tested with https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878
Signed-off-by: Fei Yang <fei.yang@intel.com>
Cc: Chris Wilson <chris.p.wilson@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 36 +++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_object.c | 6 ++++
include/uapi/drm/i915_drm.h | 41 ++++++++++++++++++++++
3 files changed, 83 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index bfe1dbda4cb75..644a936248ad5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -245,6 +245,7 @@ struct create_ext {
unsigned int n_placements;
unsigned int placement_mask;
unsigned long flags;
+ unsigned int pat_index;
};
static void repr_placements(char *buf, size_t size,
@@ -394,11 +395,39 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data
return 0;
}
+static int ext_set_pat(struct i915_user_extension __user *base, void *data)
+{
+ struct create_ext *ext_data = data;
+ struct drm_i915_private *i915 = ext_data->i915;
+ struct drm_i915_gem_create_ext_set_pat ext;
+ unsigned int max_pat_index;
+
+ BUILD_BUG_ON(sizeof(struct drm_i915_gem_create_ext_set_pat) !=
+ offsetofend(struct drm_i915_gem_create_ext_set_pat, rsvd));
+
+ if (copy_from_user(&ext, base, sizeof(ext)))
+ return -EFAULT;
+
+ max_pat_index = INTEL_INFO(i915)->max_pat_index;
+
+ if (ext.pat_index > max_pat_index) {
+ drm_dbg(&i915->drm, "PAT index is invalid: %u\n",
+ ext.pat_index);
+ return -EINVAL;
+ }
+
+ ext_data->pat_index = ext.pat_index;
+
+ return 0;
+}
+
static const i915_user_extension_fn create_extensions[] = {
[I915_GEM_CREATE_EXT_MEMORY_REGIONS] = ext_set_placements,
[I915_GEM_CREATE_EXT_PROTECTED_CONTENT] = ext_set_protected,
+ [I915_GEM_CREATE_EXT_SET_PAT] = ext_set_pat,
};
+#define PAT_INDEX_NOT_SET 0xffff
/**
* i915_gem_create_ext_ioctl - Creates a new mm object and returns a handle to it.
* @dev: drm device pointer
@@ -418,6 +447,7 @@ i915_gem_create_ext_ioctl(struct drm_device *dev, void *data,
if (args->flags & ~I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS)
return -EINVAL;
+ ext_data.pat_index = PAT_INDEX_NOT_SET;
ret = i915_user_extensions(u64_to_user_ptr(args->extensions),
create_extensions,
ARRAY_SIZE(create_extensions),
@@ -454,5 +484,11 @@ i915_gem_create_ext_ioctl(struct drm_device *dev, void *data,
if (IS_ERR(obj))
return PTR_ERR(obj);
+ if (ext_data.pat_index != PAT_INDEX_NOT_SET) {
+ i915_gem_object_set_pat_index(obj, ext_data.pat_index);
+ /* Mark pat_index is set by UMD */
+ obj->pat_set_by_user = true;
+ }
+
return i915_gem_publish(obj, file, &args->size, &args->handle);
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 46a19b099ec88..97ac6fb37958f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -208,6 +208,12 @@ bool i915_gem_object_can_bypass_llc(struct drm_i915_gem_object *obj)
if (!(obj->flags & I915_BO_ALLOC_USER))
return false;
+ /*
+ * Always flush cache for UMD objects at creation time.
+ */
+ if (obj->pat_set_by_user)
+ return true;
+
/*
* EHL and JSL add the 'Bypass LLC' MOCS entry, which should make it
* possible for userspace to bypass the GTT caching bits set by the
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index f31dfacde6014..4083a23e0614f 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -3679,9 +3679,13 @@ struct drm_i915_gem_create_ext {
*
* For I915_GEM_CREATE_EXT_PROTECTED_CONTENT usage see
* struct drm_i915_gem_create_ext_protected_content.
+ *
+ * For I915_GEM_CREATE_EXT_SET_PAT usage see
+ * struct drm_i915_gem_create_ext_set_pat.
*/
#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
#define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1
+#define I915_GEM_CREATE_EXT_SET_PAT 2
__u64 extensions;
};
@@ -3796,6 +3800,43 @@ struct drm_i915_gem_create_ext_protected_content {
__u32 flags;
};
+/**
+ * struct drm_i915_gem_create_ext_set_pat - The
+ * I915_GEM_CREATE_EXT_SET_PAT extension.
+ *
+ * If this extension is provided, the specified caching policy (PAT index) is
+ * applied to the buffer object.
+ *
+ * Below is an example on how to create an object with specific caching policy:
+ *
+ * .. code-block:: C
+ *
+ * struct drm_i915_gem_create_ext_set_pat set_pat_ext = {
+ * .base = { .name = I915_GEM_CREATE_EXT_SET_PAT },
+ * .pat_index = 0,
+ * };
+ * struct drm_i915_gem_create_ext create_ext = {
+ * .size = PAGE_SIZE,
+ * .extensions = (uintptr_t)&set_pat_ext,
+ * };
+ *
+ * int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
+ * if (err) ...
+ */
+struct drm_i915_gem_create_ext_set_pat {
+ /** @base: Extension link. See struct i915_user_extension. */
+ struct i915_user_extension base;
+ /**
+ * @pat_index: PAT index to be set
+ * PAT index is a bit field in Page Table Entry to control caching
+ * behaviors for GPU accesses. The definition of PAT index is
+ * platform dependent and can be found in hardware specifications,
+ */
+ __u32 pat_index;
+ /** @rsvd: reserved for future use */
+ __u32 rsvd;
+};
+
/* ID of the protected content session managed by i915 when PXP is active */
#define I915_PROTECTED_CONTENT_DEFAULT_SESSION 0xf
--
2.40.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Allow user to set cache at BO creation (rev14)
2023-05-26 17:29 [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation Andi Shyti
2023-05-26 17:29 ` [Intel-gfx] [CI v12 1/1] " Andi Shyti
@ 2023-05-26 19:47 ` Patchwork
2023-05-26 19:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-27 20:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2023-05-26 19:47 UTC (permalink / raw)
To: fei.yang; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation (rev14)
URL : https://patchwork.freedesktop.org/series/116870/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Allow user to set cache at BO creation (rev14)
2023-05-26 17:29 [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation Andi Shyti
2023-05-26 17:29 ` [Intel-gfx] [CI v12 1/1] " Andi Shyti
2023-05-26 19:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Allow user to set cache at BO creation (rev14) Patchwork
@ 2023-05-26 19:58 ` Patchwork
2023-05-27 20:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2023-05-26 19:58 UTC (permalink / raw)
To: fei.yang; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6857 bytes --]
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation (rev14)
URL : https://patchwork.freedesktop.org/series/116870/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13196 -> Patchwork_116870v14
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_116870v14 need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_116870v14, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/index.html
Participating hosts (39 -> 38)
------------------------------
Additional (1): bat-mtlp-6
Missing (2): fi-kbl-soraka fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_116870v14:
### IGT changes ###
#### Warnings ####
* igt@kms_psr@sprite_plane_onoff:
- bat-rplp-1: [SKIP][1] ([i915#1072]) -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/bat-rplp-1/igt@kms_psr@sprite_plane_onoff.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/bat-rplp-1/igt@kms_psr@sprite_plane_onoff.html
Known issues
------------
Here are the changes found in Patchwork_116870v14 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@reset:
- bat-rpls-1: [PASS][3] -> [ABORT][4] ([i915#4983] / [i915#7461] / [i915#8347] / [i915#8384])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/bat-rpls-1/igt@i915_selftest@live@reset.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/bat-rpls-1/igt@i915_selftest@live@reset.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- fi-skl-6600u: NOTRUN -> [SKIP][5] ([fdo#109271])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/fi-skl-6600u/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1:
- fi-rkl-11600: [PASS][6] -> [FAIL][7] ([fdo#103375])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/fi-rkl-11600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-hdmi-a-1.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-skl-6600u: [ABORT][8] -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@slpc:
- {bat-mtlp-8}: [DMESG-WARN][10] ([i915#6367]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/bat-mtlp-8/igt@i915_selftest@live@slpc.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/bat-mtlp-8/igt@i915_selftest@live@slpc.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [FAIL][12] ([i915#7932]) -> [PASS][13] +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4342]: https://gitlab.freedesktop.org/drm/intel/issues/4342
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384
[i915#8497]: https://gitlab.freedesktop.org/drm/intel/issues/8497
Build changes
-------------
* IGT: IGT_7307 -> IGTPW_9050
* Linux: CI_DRM_13196 -> Patchwork_116870v14
CI-20190529: 20190529
CI_DRM_13196: 9e0c716f834ec17dbf96c47c8b5a2b32c4f483cd @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9050: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9050/index.html
IGT_7307: f0714273cd896c637759b3790f485308c4c97008 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_116870v14: 9e0c716f834ec17dbf96c47c8b5a2b32c4f483cd @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
0bbe0112bcfb drm/i915: Allow user to set cache at BO creation
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/index.html
[-- Attachment #2: Type: text/html, Size: 5963 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Allow user to set cache at BO creation (rev14)
2023-05-26 17:29 [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation Andi Shyti
` (2 preceding siblings ...)
2023-05-26 19:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-05-27 20:04 ` Patchwork
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2023-05-27 20:04 UTC (permalink / raw)
To: fei.yang; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 16023 bytes --]
== Series Details ==
Series: drm/i915: Allow user to set cache at BO creation (rev14)
URL : https://patchwork.freedesktop.org/series/116870/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13196_full -> Patchwork_116870v14_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
New tests
---------
New tests have been introduced between CI_DRM_13196_full and Patchwork_116870v14_full:
### New IGT tests (1) ###
* igt@gem_create@create-ext-set-pat:
- Statuses : 6 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_116870v14_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][1] -> [FAIL][2] ([i915#2842]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-apl: [PASS][3] -> [FAIL][4] ([i915#2842])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-apl2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-apl1/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-snb: [PASS][5] -> [FAIL][6] ([i915#8295])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-snb2/igt@gem_ppgtt@blt-vs-render-ctxn.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-snb1/igt@gem_ppgtt@blt-vs-render-ctxn.html
* igt@gem_userptr_blits@vma-merge:
- shard-snb: NOTRUN -> [FAIL][7] ([i915#2724])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-snb4/igt@gem_userptr_blits@vma-merge.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: [PASS][8] -> [ABORT][9] ([i915#5566])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-apl2/igt@gen9_exec_parse@allowed-all.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-apl2/igt@gen9_exec_parse@allowed-all.html
* igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_mtl_mc_ccs:
- shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271]) +70 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-snb7/igt@kms_ccs@pipe-c-crc-primary-rotation-180-4_tiled_mtl_mc_ccs.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][11] -> [FAIL][12] ([IGT#6] / [i915#2346])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-glk5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [SKIP][13] ([fdo#109271])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-glk6/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4579]) +16 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-snb6/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1.html
#### Possible fixes ####
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-rkl}: [FAIL][15] ([i915#6268]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-rkl-1/igt@gem_ctx_exec@basic-nohangcheck.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html
- {shard-tglu}: [FAIL][17] ([i915#6268]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-tglu-8/igt@gem_ctx_exec@basic-nohangcheck.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-tglu-10/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@unwedge-stress:
- {shard-dg1}: [FAIL][19] ([i915#5784]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-dg1-15/igt@gem_eio@unwedge-stress.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-dg1-18/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [FAIL][21] ([i915#2846]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-glk8/igt@gem_exec_fair@basic-deadline.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-glk8/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- {shard-rkl}: [FAIL][23] ([i915#2842]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-rkl-2/igt@gem_exec_fair@basic-pace-share@rcs0.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-rkl-6/igt@gem_exec_fair@basic-pace-share@rcs0.html
- {shard-tglu}: [FAIL][25] ([i915#2842]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-tglu-8/igt@gem_exec_fair@basic-pace-share@rcs0.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-tglu-8/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- {shard-dg1}: [DMESG-WARN][27] ([i915#4936] / [i915#5493]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-dg1-18/igt@gem_lmem_swapping@smem-oom@lmem0.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-dg1-14/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@i915_module_load@reload-no-display:
- shard-snb: [ABORT][29] ([i915#4528] / [i915#8393]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-snb4/igt@i915_module_load@reload-no-display.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-snb1/igt@i915_module_load@reload-no-display.html
* igt@i915_pm_dc@dc6-dpms:
- {shard-tglu}: [FAIL][31] ([i915#3989] / [i915#454]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-tglu-3/igt@i915_pm_dc@dc6-dpms.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-tglu-9/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- {shard-dg1}: [FAIL][33] ([i915#3591]) -> [PASS][34] +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-dg1-18/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait:
- {shard-rkl}: [SKIP][35] ([i915#1397]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-rkl-4/igt@i915_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-glk: [FAIL][37] ([IGT#6] / [i915#2346]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-glk7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@single-bo@pipe-b:
- {shard-rkl}: [INCOMPLETE][39] ([i915#8011]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-rkl-7/igt@kms_cursor_legacy@single-bo@pipe-b.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-rkl-6/igt@kms_cursor_legacy@single-bo@pipe-b.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2:
- shard-glk: [FAIL][41] ([i915#79]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html
#### Warnings ####
* igt@kms_content_protection@mei_interface:
- shard-apl: [SKIP][43] ([IGT#6] / [fdo#109271] / [i915#4579]) -> [SKIP][44] ([IGT#6] / [fdo#109271])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-apl7/igt@kms_content_protection@mei_interface.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-apl4/igt@kms_content_protection@mei_interface.html
- shard-snb: [SKIP][45] ([fdo#109271] / [i915#4579]) -> [SKIP][46] ([fdo#109271])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-snb5/igt@kms_content_protection@mei_interface.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-snb4/igt@kms_content_protection@mei_interface.html
- shard-glk: [SKIP][47] ([IGT#6] / [fdo#109271] / [i915#4579]) -> [SKIP][48] ([IGT#6] / [fdo#109271])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13196/shard-glk8/igt@kms_content_protection@mei_interface.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/shard-glk2/igt@kms_content_protection@mei_interface.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2724]: https://gitlab.freedesktop.org/drm/intel/issues/2724
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4936]: https://gitlab.freedesktop.org/drm/intel/issues/4936
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5234]: https://gitlab.freedesktop.org/drm/intel/issues/5234
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8295]: https://gitlab.freedesktop.org/drm/intel/issues/8295
[i915#8311]: https://gitlab.freedesktop.org/drm/intel/issues/8311
[i915#8393]: https://gitlab.freedesktop.org/drm/intel/issues/8393
Build changes
-------------
* IGT: IGT_7307 -> IGTPW_9050
* Linux: CI_DRM_13196 -> Patchwork_116870v14
CI-20190529: 20190529
CI_DRM_13196: 9e0c716f834ec17dbf96c47c8b5a2b32c4f483cd @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_9050: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_9050/index.html
IGT_7307: f0714273cd896c637759b3790f485308c4c97008 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_116870v14: 9e0c716f834ec17dbf96c47c8b5a2b32c4f483cd @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116870v14/index.html
[-- Attachment #2: Type: text/html, Size: 14884 bytes --]
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2023-05-26 17:29 [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation Andi Shyti
2023-05-26 17:29 ` [Intel-gfx] [CI v12 1/1] " Andi Shyti
2023-05-26 19:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Allow user to set cache at BO creation (rev14) Patchwork
2023-05-26 19:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-27 20:04 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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2023-05-25 16:25 [Intel-gfx] [CI v12 0/1] drm/i915: Allow user to set cache at BO creation Andi Shyti
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