* [Intel-gfx] [PATCH] drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
@ 2023-06-06 17:28 Imre Deak
2023-06-06 21:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2023-06-19 11:50 ` [Intel-gfx] [PATCH] " Shankar, Uma
0 siblings, 2 replies; 4+ messages in thread
From: Imre Deak @ 2023-06-06 17:28 UTC (permalink / raw)
To: intel-gfx
A recent bspec update added a restriction on when DC states can be enabled:
[Before enabling DC states:]
"""
PG2 can be kept enabled only because PGB requires PG2.
Do not use PG2 functions, such as type-C DDIs.
DMC will dynamically control PG1, PGA, PG2, PGB.
"""
Accordingly prevent DC states if PW2 (aka PG2) is enabled for any other
functionality.
Bpsec: 49193
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
.../drm/i915/display/intel_display_power_map.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c
index 1118ee9d224ca..5ad04cd42c158 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
@@ -1252,10 +1252,18 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
POWER_DOMAIN_INIT);
#define XELPD_DC_OFF_PORT_POWER_DOMAINS \
+ POWER_DOMAIN_PORT_DDI_LANES_C, \
+ POWER_DOMAIN_PORT_DDI_LANES_D, \
+ POWER_DOMAIN_PORT_DDI_LANES_E, \
POWER_DOMAIN_PORT_DDI_LANES_TC1, \
POWER_DOMAIN_PORT_DDI_LANES_TC2, \
POWER_DOMAIN_PORT_DDI_LANES_TC3, \
POWER_DOMAIN_PORT_DDI_LANES_TC4, \
+ POWER_DOMAIN_VGA, \
+ POWER_DOMAIN_AUDIO_PLAYBACK, \
+ POWER_DOMAIN_AUX_IO_C, \
+ POWER_DOMAIN_AUX_IO_D, \
+ POWER_DOMAIN_AUX_IO_E, \
POWER_DOMAIN_AUX_C, \
POWER_DOMAIN_AUX_D, \
POWER_DOMAIN_AUX_E, \
@@ -1272,14 +1280,6 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
XELPD_PW_B_POWER_DOMAINS, \
XELPD_PW_C_POWER_DOMAINS, \
XELPD_PW_D_POWER_DOMAINS, \
- POWER_DOMAIN_PORT_DDI_LANES_C, \
- POWER_DOMAIN_PORT_DDI_LANES_D, \
- POWER_DOMAIN_PORT_DDI_LANES_E, \
- POWER_DOMAIN_VGA, \
- POWER_DOMAIN_AUDIO_PLAYBACK, \
- POWER_DOMAIN_AUX_IO_C, \
- POWER_DOMAIN_AUX_IO_D, \
- POWER_DOMAIN_AUX_IO_E, \
XELPD_DC_OFF_PORT_POWER_DOMAINS
I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_2,
--
2.37.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
2023-06-06 17:28 [Intel-gfx] [PATCH] drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality Imre Deak
@ 2023-06-06 21:55 ` Patchwork
2023-06-20 12:56 ` Imre Deak
2023-06-19 11:50 ` [Intel-gfx] [PATCH] " Shankar, Uma
1 sibling, 1 reply; 4+ messages in thread
From: Patchwork @ 2023-06-06 21:55 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5884 bytes --]
== Series Details ==
Series: drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
URL : https://patchwork.freedesktop.org/series/118951/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13238 -> Patchwork_118951v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_118951v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_118951v1, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/index.html
Participating hosts (41 -> 39)
------------------------------
Missing (2): bat-rpls-2 fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_118951v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@hangcheck:
- fi-skl-guc: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html
Known issues
------------
Here are the changes found in Patchwork_118951v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@hangcheck:
- bat-rpls-1: [PASS][4] -> [ABORT][5] ([i915#7677])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#7828])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-11/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- bat-adlm-1: NOTRUN -> [SKIP][7] ([i915#7828])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-adlm-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [PASS][8] -> [FAIL][9] ([i915#7932])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][10] ([i915#1845])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-adlm-1/igt@kms_pipe_crc_basic@suspend-read-crc.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- bat-dg2-11: [ABORT][11] ([i915#7913] / [i915#7979]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-dg2-11/igt@i915_selftest@live@hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-11/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@workarounds:
- bat-adlm-1: [INCOMPLETE][13] ([i915#4983] / [i915#7677]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-adlm-1/igt@i915_selftest@live@workarounds.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-adlm-1/igt@i915_selftest@live@workarounds.html
#### Warnings ####
* igt@kms_psr@primary_mmap_gtt:
- bat-rplp-1: [SKIP][15] ([i915#1072]) -> [ABORT][16] ([i915#8442])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
[i915#7677]: https://gitlab.freedesktop.org/drm/intel/issues/7677
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7979]: https://gitlab.freedesktop.org/drm/intel/issues/7979
[i915#8442]: https://gitlab.freedesktop.org/drm/intel/issues/8442
Build changes
-------------
* Linux: CI_DRM_13238 -> Patchwork_118951v1
CI-20190529: 20190529
CI_DRM_13238: 8c0b302811d744b945dcb6d78164a76188914db9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7320: 1c96b08a4cde6f2d49824a8cc3303bd860617b52 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_118951v1: 8c0b302811d744b945dcb6d78164a76188914db9 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
80638da0a7d3 drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/index.html
[-- Attachment #2: Type: text/html, Size: 6685 bytes --]
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
2023-06-06 17:28 [Intel-gfx] [PATCH] drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality Imre Deak
2023-06-06 21:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2023-06-19 11:50 ` Shankar, Uma
1 sibling, 0 replies; 4+ messages in thread
From: Shankar, Uma @ 2023-06-19 11:50 UTC (permalink / raw)
To: Deak, Imre, intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Imre Deak
> Sent: Tuesday, June 6, 2023 10:58 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH] drm/i915/adlp+: Allow DC states along with PW2 only
> for PWB functionality
>
> A recent bspec update added a restriction on when DC states can be enabled:
>
> [Before enabling DC states:]
>
> """
> PG2 can be kept enabled only because PGB requires PG2.
> Do not use PG2 functions, such as type-C DDIs.
>
> DMC will dynamically control PG1, PGA, PG2, PGB.
> """
>
> Accordingly prevent DC states if PW2 (aka PG2) is enabled for any other
> functionality.
>
> Bpsec: 49193
Change looks good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> .../drm/i915/display/intel_display_power_map.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c
> b/drivers/gpu/drm/i915/display/intel_display_power_map.c
> index 1118ee9d224ca..5ad04cd42c158 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
> @@ -1252,10 +1252,18 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
> POWER_DOMAIN_INIT);
>
> #define XELPD_DC_OFF_PORT_POWER_DOMAINS \
> + POWER_DOMAIN_PORT_DDI_LANES_C, \
> + POWER_DOMAIN_PORT_DDI_LANES_D, \
> + POWER_DOMAIN_PORT_DDI_LANES_E, \
> POWER_DOMAIN_PORT_DDI_LANES_TC1, \
> POWER_DOMAIN_PORT_DDI_LANES_TC2, \
> POWER_DOMAIN_PORT_DDI_LANES_TC3, \
> POWER_DOMAIN_PORT_DDI_LANES_TC4, \
> + POWER_DOMAIN_VGA, \
> + POWER_DOMAIN_AUDIO_PLAYBACK, \
> + POWER_DOMAIN_AUX_IO_C, \
> + POWER_DOMAIN_AUX_IO_D, \
> + POWER_DOMAIN_AUX_IO_E, \
> POWER_DOMAIN_AUX_C, \
> POWER_DOMAIN_AUX_D, \
> POWER_DOMAIN_AUX_E, \
> @@ -1272,14 +1280,6 @@ I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_a,
> XELPD_PW_B_POWER_DOMAINS, \
> XELPD_PW_C_POWER_DOMAINS, \
> XELPD_PW_D_POWER_DOMAINS, \
> - POWER_DOMAIN_PORT_DDI_LANES_C, \
> - POWER_DOMAIN_PORT_DDI_LANES_D, \
> - POWER_DOMAIN_PORT_DDI_LANES_E, \
> - POWER_DOMAIN_VGA, \
> - POWER_DOMAIN_AUDIO_PLAYBACK, \
> - POWER_DOMAIN_AUX_IO_C, \
> - POWER_DOMAIN_AUX_IO_D, \
> - POWER_DOMAIN_AUX_IO_E, \
> XELPD_DC_OFF_PORT_POWER_DOMAINS
>
> I915_DECL_PW_DOMAINS(xelpd_pwdoms_pw_2,
> --
> 2.37.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
2023-06-06 21:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2023-06-20 12:56 ` Imre Deak
0 siblings, 0 replies; 4+ messages in thread
From: Imre Deak @ 2023-06-20 12:56 UTC (permalink / raw)
To: intel-gfx, Uma Shankar
On Tue, Jun 06, 2023 at 09:55:53PM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
> URL : https://patchwork.freedesktop.org/series/118951/
> State : failure
Thanks for the review, pushed the patch to drm-intel-next also adding
the missing Fixes/Tested-by tags.
The failure is unrelated, see below.
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_13238 -> Patchwork_118951v1
> ====================================================
>
> Summary
> -------
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_118951v1 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_118951v1, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/index.html
>
> Participating hosts (41 -> 39)
> ------------------------------
>
> Missing (2): bat-rpls-2 fi-snb-2520m
>
> Possible new issues
> -------------------
>
> Here are the unknown changes that may have been introduced in Patchwork_118951v1:
>
> ### IGT changes ###
>
> #### Possible regressions ####
>
> * igt@i915_selftest@live@hangcheck:
> - fi-skl-guc: [PASS][1] -> [DMESG-FAIL][2]
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
SKL's power well mapping is different than what the patch changes.
>
> * igt@kms_pipe_crc_basic@read-crc-frame-sequence:
> - bat-dg2-11: NOTRUN -> [INCOMPLETE][3]
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html
(kms_pipe_crc_basic:5629) igt_kms-CRITICAL: At least one pipe/output combo needed.
This is due to the known behavior of the LG monitor disconnecting itself
just before the test starts, reconnecting after a 1 sec delay:
<7>[ 254.244962] i915 0000:03:00.0: [drm:intel_encoder_hotplug [i915]] [CONNECTOR:255:HDMI-A-3] status updated from disconnected to connected (epoch counter 2->3)
...
<7>[ 263.208101] i915 0000:03:00.0: [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00020000, dig 0x000088a8, pins 0x00000020, long 0x00000020
...
<7>[ 263.214564] i915 0000:03:00.0: [drm:intel_encoder_hotplug [i915]] [CONNECTOR:255:HDMI-A-3] status updated from connected to disconnected (epoch counter 3->4)
...
<7>[ 263.215505] [IGT] kms_pipe_crc_basic: starting subtest read-crc-frame-sequence
...
<7>[ 264.237679] i915 0000:03:00.0: [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00020000, dig 0x000088a8, pins 0x00000020, long 0x00000020
...
<7>[ 264.268216] i915 0000:03:00.0: [drm:intel_encoder_hotplug [i915]] [CONNECTOR:255:HDMI-A-3] status updated from disconnected to connected (epoch counter 5->6)
This ADLP host seems to have a configuration issue for the first two TC
ports as well, as they indicate a native DP/HDMI sink being connected,
while VBT configures them in DP-alt/TBT mode (probably a wrong BIOS or
BIOS setup issue):
<7>[ 129.813837] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port D VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7>[ 129.814193] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port E VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7>[ 129.814549] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port F VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
<7>[ 129.814880] i915 0000:00:02.0: [drm:intel_bios_init [i915]] Port G VBT info: CRT:0 DVI:0 HDMI:0 DP:1 eDP:0 DSI:0 DP++:0 LSPCON:0 USB-Type-C:1 TBT:1 DSC:0
...
<7>[ 130.849579] i915 0000:00:02.0: [drm:intel_tc_port_update_mode [i915]] Port D/TC#1: live status 00000008 mismatches the legacy port flag 00000006, fixing flag
<7>[ 130.901821] i915 0000:00:02.0: [drm:intel_tc_port_update_mode [i915]] Port E/TC#2: live status 00000008 mismatches the legacy port flag 00000006, fixing flag
> Known issues
> ------------
>
> Here are the changes found in Patchwork_118951v1 that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@i915_selftest@live@hangcheck:
> - bat-rpls-1: [PASS][4] -> [ABORT][5] ([i915#7677])
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
>
> * igt@kms_chamelium_hpd@common-hpd-after-suspend:
> - bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#7828])
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-11/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
> - bat-adlm-1: NOTRUN -> [SKIP][7] ([i915#7828])
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-adlm-1/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
>
> * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
> - bat-dg2-8: [PASS][8] -> [FAIL][9] ([i915#7932])
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
>
> * igt@kms_pipe_crc_basic@suspend-read-crc:
> - bat-adlm-1: NOTRUN -> [SKIP][10] ([i915#1845])
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-adlm-1/igt@kms_pipe_crc_basic@suspend-read-crc.html
>
>
> #### Possible fixes ####
>
> * igt@i915_selftest@live@hangcheck:
> - bat-dg2-11: [ABORT][11] ([i915#7913] / [i915#7979]) -> [PASS][12]
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-dg2-11/igt@i915_selftest@live@hangcheck.html
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-dg2-11/igt@i915_selftest@live@hangcheck.html
>
> * igt@i915_selftest@live@workarounds:
> - bat-adlm-1: [INCOMPLETE][13] ([i915#4983] / [i915#7677]) -> [PASS][14]
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-adlm-1/igt@i915_selftest@live@workarounds.html
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-adlm-1/igt@i915_selftest@live@workarounds.html
>
>
> #### Warnings ####
>
> * igt@kms_psr@primary_mmap_gtt:
> - bat-rplp-1: [SKIP][15] ([i915#1072]) -> [ABORT][16] ([i915#8442])
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13238/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html
>
>
> {name}: This element is suppressed. This means it is ignored when computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
> [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
> [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
> [i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
> [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
> [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
> [i915#7059]: https://gitlab.freedesktop.org/drm/intel/issues/7059
> [i915#7677]: https://gitlab.freedesktop.org/drm/intel/issues/7677
> [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
> [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
> [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
> [i915#7979]: https://gitlab.freedesktop.org/drm/intel/issues/7979
> [i915#8442]: https://gitlab.freedesktop.org/drm/intel/issues/8442
>
>
> Build changes
> -------------
>
> * Linux: CI_DRM_13238 -> Patchwork_118951v1
>
> CI-20190529: 20190529
> CI_DRM_13238: 8c0b302811d744b945dcb6d78164a76188914db9 @ git://anongit.freedesktop.org/gfx-ci/linux
> IGT_7320: 1c96b08a4cde6f2d49824a8cc3303bd860617b52 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> Patchwork_118951v1: 8c0b302811d744b945dcb6d78164a76188914db9 @ git://anongit.freedesktop.org/gfx-ci/linux
>
>
> ### Linux commits
>
> 80638da0a7d3 drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_118951v1/index.html
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-06-20 12:56 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-06-06 17:28 [Intel-gfx] [PATCH] drm/i915/adlp+: Allow DC states along with PW2 only for PWB functionality Imre Deak
2023-06-06 21:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2023-06-20 12:56 ` Imre Deak
2023-06-19 11:50 ` [Intel-gfx] [PATCH] " Shankar, Uma
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