From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 16/19] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC
Date: Fri, 30 Jun 2023 18:16:48 +0530 [thread overview]
Message-ID: <20230630124652.4140932-17-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20230630124652.4140932-1-ankit.k.nautiyal@intel.com>
Currently we check if pipe_bpp is max the min DSC bpc requirements.
Add checks for max DSC BPC/BPP constraints while computing the
pipe_bpp when DSC is in use.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 34 +++++++++++++++++--------
1 file changed, 24 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 633dba7885fd..f6f9b061fc0b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1683,13 +1683,27 @@ u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
}
static
-bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915, int pipe_bpp)
+bool is_dsc_pipe_bpp_sufficient(struct drm_i915_private *i915,
+ struct drm_connector_state *conn_state,
+ struct link_config_limits *limits,
+ int pipe_bpp)
{
- return pipe_bpp >= intel_dp_dsc_min_src_input_bpc(i915) * 3;
+ u8 dsc_max_bpc, dsc_min_bpc, dsc_max_pipe_bpp, dsc_min_pipe_bpp;
+
+ dsc_max_bpc = min(intel_dp_dsc_max_src_input_bpc(i915), conn_state->max_requested_bpc);
+ dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915);
+
+ dsc_max_pipe_bpp = min(dsc_max_bpc * 3, limits->max_bpp);
+ dsc_min_pipe_bpp = max(dsc_min_bpc * 3, limits->min_bpp);
+
+ return pipe_bpp >= dsc_min_pipe_bpp &&
+ pipe_bpp <= dsc_max_pipe_bpp;
}
static
-int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp)
+int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp,
+ struct drm_connector_state *conn_state,
+ struct link_config_limits *limits)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
int forced_bpp;
@@ -1699,7 +1713,7 @@ int intel_dp_force_dsc_pipe_bpp(struct intel_dp *intel_dp)
forced_bpp = intel_dp->force_dsc_bpc * 3;
- if (is_dsc_pipe_bpp_sufficient(i915, forced_bpp)) {
+ if (is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, forced_bpp)) {
drm_dbg_kms(&i915->drm, "Input DSC BPC forced to %d\n", intel_dp->force_dsc_bpc);
return forced_bpp;
}
@@ -1720,16 +1734,16 @@ static int intel_dp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
u16 output_bpp, dsc_max_compressed_bpp = 0;
int forced_bpp, pipe_bpp;
- forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp);
+ forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits);
if (forced_bpp) {
pipe_bpp = forced_bpp;
} else {
pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, conn_state->max_requested_bpc);
- if (!is_dsc_pipe_bpp_sufficient(i915, pipe_bpp)) {
+ if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) {
drm_dbg_kms(&i915->drm,
- "Computed BPC less than min supported by source for DSC\n");
+ "Computed BPC is not in DSC BPC limits\n");
return -EINVAL;
}
}
@@ -1771,7 +1785,7 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
int pipe_bpp, forced_bpp;
- forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp);
+ forced_bpp = intel_dp_force_dsc_pipe_bpp(intel_dp, conn_state, limits);
if (forced_bpp) {
pipe_bpp = forced_bpp;
@@ -1779,9 +1793,9 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
/* For eDP use max bpp that can be supported with DSC. */
pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp,
conn_state->max_requested_bpc);
- if (!is_dsc_pipe_bpp_sufficient(i915, pipe_bpp)) {
+ if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) {
drm_dbg_kms(&i915->drm,
- "Computed BPC less than min supported by source for DSC\n");
+ "Computed BPC is not in DSC BPC limits\n");
return -EINVAL;
}
}
--
2.40.1
next prev parent reply other threads:[~2023-06-30 12:51 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 12:46 [Intel-gfx] [PATCH 00/19] DSC misc fixes Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 01/19] drm/i915/dp: Consider output_format while computing dsc bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 02/19] drm/i915/dp: Move compressed bpp check with 420 format inside the helper Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 03/19] drm/i915/dp_mst: Use output_format to get the final link bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 04/19] drm/i915/dp: Use consistent name for link bpp and compressed bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 05/19] drm/i915/dp: Update Bigjoiner interface bits for computing " Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 06/19] drm/i915/display: Account for DSC not split case while computing cdclk Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 07/19] drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 08/19] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 09/19] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 10/19] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 11/19] drm/i915/dp: Add functions to get min/max src input bpc with DSC Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 12/19] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 13/19] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 14/19] drm/i915/dp: Rename helper to get DSC max pipe_bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 15/19] drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp Ankit Nautiyal
2023-06-30 12:46 ` Ankit Nautiyal [this message]
2023-06-30 12:46 ` [Intel-gfx] [PATCH 17/19] drm/i915/dp: Separate out function to get compressed bpp with joiner Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 18/19] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 19/19] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Ankit Nautiyal
2023-06-30 13:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC misc fixes (rev3) Patchwork
2023-06-30 13:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-06-30 13:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-01 3:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-07-13 10:33 [Intel-gfx] [PATCH 00/19] DSC misc fixes Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 16/19] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC Ankit Nautiyal
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