Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 05/19] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp
Date: Fri, 30 Jun 2023 18:16:37 +0530	[thread overview]
Message-ID: <20230630124652.4140932-6-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20230630124652.4140932-1-ankit.k.nautiyal@intel.com>

In Bigjoiner check for DSC, bigjoiner interface bits for DP for
DISPLAY > 13 is 36 (Bspec: 49259).

v2: Corrected Display ver to 13.

v3: Follow convention for conditional statement. (Ville)

v4: Fix check for display ver. (Ville)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c4e0a2704860..8edac9462f5a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -793,8 +793,9 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
 	bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram);
 
 	if (bigjoiner) {
+		int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24;
 		u32 max_bpp_bigjoiner =
-			i915->display.cdclk.max_cdclk_freq * 48 /
+			i915->display.cdclk.max_cdclk_freq * 2 * bigjoiner_interface_bits /
 			intel_dp_mode_to_fec_clock(mode_clock);
 
 		bits_per_pixel = min(bits_per_pixel, max_bpp_bigjoiner);
-- 
2.40.1


  parent reply	other threads:[~2023-06-30 12:51 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-30 12:46 [Intel-gfx] [PATCH 00/19] DSC misc fixes Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 01/19] drm/i915/dp: Consider output_format while computing dsc bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 02/19] drm/i915/dp: Move compressed bpp check with 420 format inside the helper Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 03/19] drm/i915/dp_mst: Use output_format to get the final link bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 04/19] drm/i915/dp: Use consistent name for link bpp and compressed bpp Ankit Nautiyal
2023-06-30 12:46 ` Ankit Nautiyal [this message]
2023-06-30 12:46 ` [Intel-gfx] [PATCH 06/19] drm/i915/display: Account for DSC not split case while computing cdclk Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 07/19] drm/i915/intel_cdclk: Add vdsc with bigjoiner constraints on min_cdlck Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 08/19] drm/i915/dp: Remove extra logs for printing DSC info Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 09/19] drm/display/dp: Fix the DP DSC Receiver cap size Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 10/19] drm/i915/dp: Avoid forcing DSC BPC for MST case Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 11/19] drm/i915/dp: Add functions to get min/max src input bpc with DSC Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 12/19] drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 13/19] drm/i915/dp: Avoid left shift of DSC output bpp by 4 Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 14/19] drm/i915/dp: Rename helper to get DSC max pipe_bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 15/19] drm/i915/dp: Separate out functions for edp/DP for computing DSC bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 16/19] drm/i915/dp: Add DSC BPC/BPP constraints while selecting pipe bpp with DSC Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 17/19] drm/i915/dp: Separate out function to get compressed bpp with joiner Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 18/19] drm/i915/dp: Get optimal link config to have best compressed bpp Ankit Nautiyal
2023-06-30 12:46 ` [Intel-gfx] [PATCH 19/19] drm/i915: Query compressed bpp properly using correct DPCD and DP Spec info Ankit Nautiyal
2023-06-30 13:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DSC misc fixes (rev3) Patchwork
2023-06-30 13:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-06-30 13:32 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-01  3:26 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2023-07-13 10:33 [Intel-gfx] [PATCH 00/19] DSC misc fixes Ankit Nautiyal
2023-07-13 10:33 ` [Intel-gfx] [PATCH 05/19] drm/i915/dp: Update Bigjoiner interface bits for computing compressed bpp Ankit Nautiyal
2023-07-20  9:29   ` Lisovskiy, Stanislav
2023-07-24 12:19     ` Nautiyal, Ankit K
2023-07-25 10:13       ` Lisovskiy, Stanislav
2023-07-25 11:19         ` Nautiyal, Ankit K
2023-07-28  4:18           ` Nautiyal, Ankit K

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20230630124652.4140932-6-ankit.k.nautiyal@intel.com \
    --to=ankit.k.nautiyal@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox