From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: <intel-gfx@lists.freedesktop.org>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [Intel-gfx] [PATCH 4/4] drm/xe: Only init runtime PM after all d3cold config is in place.
Date: Thu, 20 Jul 2023 17:03:53 -0400 [thread overview]
Message-ID: <20230720210353.214385-4-rodrigo.vivi@intel.com> (raw)
In-Reply-To: <20230720210353.214385-1-rodrigo.vivi@intel.com>
We cannot allow runtime pm suspend after we configured the
d3cold capable and threshold.
Cc: Anshuman Gupta <anshuman.gupta@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/xe/xe_pm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 73bcb76c2d42..366ee446af38 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -152,10 +152,12 @@ void xe_pm_init(struct xe_device *xe)
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
drmm_mutex_init(&xe->drm, &xe->d3cold.lock);
- xe_pm_runtime_init(xe);
+
xe->d3cold.capable = xe_pm_pci_d3cold_capable(pdev);
xe_device_sysfs_init(xe);
xe_pm_set_vram_threshold(xe, DEFAULT_VRAM_THRESHOLD);
+
+ xe_pm_runtime_init(xe);
}
void xe_pm_runtime_fini(struct xe_device *xe)
--
2.41.0
next prev parent reply other threads:[~2023-07-20 21:04 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-20 21:03 [Intel-gfx] [PATCH 1/4] drm/xe: Only set PCI d3cold_allowed when we are really allowing Rodrigo Vivi
2023-07-20 21:03 ` [Intel-gfx] [PATCH 2/4] drm/xe: Move d3cold_allowed decision all together Rodrigo Vivi
2023-07-21 7:42 ` Gupta, Anshuman
2023-07-20 21:03 ` [Intel-gfx] [PATCH 3/4] drm/xe: Fix the runtime_idle call and d3cold.allowed decision Rodrigo Vivi
2023-07-21 6:00 ` Gupta, Anshuman
2023-07-21 19:07 ` Rodrigo Vivi
2023-07-20 21:03 ` Rodrigo Vivi [this message]
2023-07-21 7:27 ` [Intel-gfx] [PATCH 4/4] drm/xe: Only init runtime PM after all d3cold config is in place Gupta, Anshuman
2023-07-20 21:13 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/4] drm/xe: Only set PCI d3cold_allowed when we are really allowing Patchwork
2023-07-21 7:39 ` [Intel-gfx] [PATCH 1/4] " Gupta, Anshuman
2023-07-21 19:00 ` Rodrigo Vivi
2023-07-25 5:08 ` Gupta, Anshuman
2023-07-25 21:18 ` Rodrigo Vivi
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