From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
matthew.d.roper@intel.com
Subject: [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines
Date: Thu, 27 Jul 2023 01:03:31 +0530 [thread overview]
Message-ID: <20230726193333.2759197-13-dnyaneshwar.bhadane@intel.com> (raw)
In-Reply-To: <20230726193333.2759197-1-dnyaneshwar.bhadane@intel.com>
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P
v2:
- Replace IS_ADLP_RPLU with IS_RAPTORLAKE_U (Tvrtko/Lucas)
- Change the subject
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 57113fb01fb2..2fb030b1ff1d 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3570,7 +3570,7 @@ void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
if (IS_ALDERLAKE_P(dev_priv) && IS_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) {
dev_priv->display.cdclk.table = adlp_a_step_cdclk_table;
dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
- } else if (IS_ADLP_RPLU(dev_priv)) {
+ } else if (IS_RAPTORLAKE_U(dev_priv)) {
dev_priv->display.cdclk.table = rplu_cdclk_table;
dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
} else {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4e07ba69642d..d3a621e5a36b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -590,7 +590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
#define IS_RAPTORLAKE_P(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
-#define IS_ADLP_RPLU(i915) \
+#define IS_RAPTORLAKE_U(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
#define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
(INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
--
2.34.1
next prev parent reply other threads:[~2023-07-26 19:34 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-26 19:33 [Intel-gfx] [PATCH v4 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 01/14] drm/i915/hsw: s/HSW/HASWELL for platform/subplatform defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 02/14] drm/i915/bdw: s/BDW/BROADWELL " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 03/14] drm/i915/skl: s/SKL/SKYLAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 04/14] drm/i915/kbl: s/KBL/KABYLAKE " Dnyaneshwar Bhadane
2023-07-31 15:14 ` Srivatsa, Anusha
2023-07-31 15:23 ` Srivatsa, Anusha
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 05/14] drm/i915/cfl: s/CFL/COFFEELAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 06/14] drm/i915/cml: s/CML/COMETLAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v3 07/14] drm/i915/rkl: s/RKL/ROCKETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:20 ` Srivatsa, Anusha
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 08/14] drm/i915/jsl: s/JSL/JASPERLAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 09/14] drm/i915/tgl: s/TGL/TIGERLAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v3 10/14] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v2 11/14] drm/i915/rplp: s/ADLP_RPLP/RAPTORLAKE_P for RPLP defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` Dnyaneshwar Bhadane [this message]
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 13/14] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane
2023-07-26 19:37 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Replace acronym with full platform name in defines Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-07-26 20:06 [Intel-gfx] [PATCH v4 00/14] " Dnyaneshwar Bhadane
2023-07-26 20:06 ` [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines Dnyaneshwar Bhadane
2023-07-31 15:49 ` Srivatsa, Anusha
2023-08-01 13:53 [Intel-gfx] [PATCH v1 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-08-01 13:53 ` [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines Dnyaneshwar Bhadane
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