From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
matthew.d.roper@intel.com
Subject: [Intel-gfx] [PATCH v1 06/14] drm/i915/cml: s/CML/COMETLAKE for platform/subplatform defines
Date: Thu, 27 Jul 2023 01:03:25 +0530 [thread overview]
Message-ID: <20230726193333.2759197-7-dnyaneshwar.bhadane@intel.com> (raw)
In-Reply-To: <20230726193333.2759197-1-dnyaneshwar.bhadane@intel.com>
Follow consistent naming convention. Replace CML with
COMETLAKE.
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index cd85b9fed129..35e6e3a5ddf1 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1740,9 +1740,9 @@ void intel_ddi_buf_trans_init(struct intel_encoder *encoder)
encoder->get_buf_trans = icl_get_mg_buf_trans;
} else if (IS_GEMINILAKE(i915) || IS_BROXTON(i915)) {
encoder->get_buf_trans = bxt_get_buf_trans;
- } else if (IS_CML_ULX(i915) || IS_COFFEELAKE_ULX(i915) || IS_KABYLAKE_ULX(i915)) {
+ } else if (IS_COMETLAKE_ULX(i915) || IS_COFFEELAKE_ULX(i915) || IS_KABYLAKE_ULX(i915)) {
encoder->get_buf_trans = kbl_y_get_buf_trans;
- } else if (IS_CML_ULT(i915) || IS_COFFEELAKE_ULT(i915) || IS_KABYLAKE_ULT(i915)) {
+ } else if (IS_COMETLAKE_ULT(i915) || IS_COFFEELAKE_ULT(i915) || IS_KABYLAKE_ULT(i915)) {
encoder->get_buf_trans = kbl_u_get_buf_trans;
} else if (IS_COMETLAKE(i915) || IS_COFFEELAKE(i915) || IS_KABYLAKE(i915)) {
encoder->get_buf_trans = kbl_get_buf_trans;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 04107696e966..e6f77498d46c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -636,11 +636,11 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_COFFEELAKE_GT3(i915) (IS_COFFEELAKE(i915) && \
INTEL_INFO(i915)->gt == 3)
-#define IS_CML_ULT(i915) \
+#define IS_COMETLAKE_ULT(i915) \
IS_SUBPLATFORM(i915, INTEL_COMETLAKE, INTEL_SUBPLATFORM_ULT)
-#define IS_CML_ULX(i915) \
+#define IS_COMETLAKE_ULX(i915) \
IS_SUBPLATFORM(i915, INTEL_COMETLAKE, INTEL_SUBPLATFORM_ULX)
-#define IS_CML_GT2(i915) (IS_COMETLAKE(i915) && \
+#define IS_COMETLAKE_GT2(i915) (IS_COMETLAKE(i915) && \
INTEL_INFO(i915)->gt == 2)
#define IS_ICL_WITH_PORT_F(i915) \
--
2.34.1
next prev parent reply other threads:[~2023-07-26 19:34 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-26 19:33 [Intel-gfx] [PATCH v4 00/14] Replace acronym with full platform name in defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 01/14] drm/i915/hsw: s/HSW/HASWELL for platform/subplatform defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 02/14] drm/i915/bdw: s/BDW/BROADWELL " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 03/14] drm/i915/skl: s/SKL/SKYLAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 04/14] drm/i915/kbl: s/KBL/KABYLAKE " Dnyaneshwar Bhadane
2023-07-31 15:14 ` Srivatsa, Anusha
2023-07-31 15:23 ` Srivatsa, Anusha
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 05/14] drm/i915/cfl: s/CFL/COFFEELAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` Dnyaneshwar Bhadane [this message]
2023-07-26 19:33 ` [Intel-gfx] [PATCH v3 07/14] drm/i915/rkl: s/RKL/ROCKETLAKE " Dnyaneshwar Bhadane
2023-07-31 15:20 ` Srivatsa, Anusha
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 08/14] drm/i915/jsl: s/JSL/JASPERLAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v4 09/14] drm/i915/tgl: s/TGL/TIGERLAKE " Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v3 10/14] drm/i915/adlp: s/ADLP/ALDERLAKE_P for display and graphics step Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v2 11/14] drm/i915/rplp: s/ADLP_RPLP/RAPTORLAKE_P for RPLP defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v1 13/14] drm/i915/adln: s/ADLP/ALDERLAKE_P in ADLN defines Dnyaneshwar Bhadane
2023-07-26 19:33 ` [Intel-gfx] [PATCH v3 14/14] drm/i915/adls: s/ADLS_RPLS/RAPTORLAKE_S in platform and subplatform defines Dnyaneshwar Bhadane
2023-07-26 19:37 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Replace acronym with full platform name in defines Patchwork
-- strict thread matches above, loose matches on Subject: below --
2023-08-01 13:53 [Intel-gfx] [PATCH v1 00/14] " Dnyaneshwar Bhadane
2023-08-01 13:53 ` [Intel-gfx] [PATCH v1 06/14] drm/i915/cml: s/CML/COMETLAKE for platform/subplatform defines Dnyaneshwar Bhadane
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