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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Matt Roper" <matthew.d.roper@intel.com>,
	"Matthew Auld" <matthew.auld@intel.com>
Subject: [Intel-gfx] [RFC 1/8] drm/i915: Skip clflush after GPU writes on Meteorlake
Date: Thu, 27 Jul 2023 15:54:57 +0100	[thread overview]
Message-ID: <20230727145504.1919316-2-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20230727145504.1919316-1-tvrtko.ursulin@linux.intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

On Meteorlake CPU cache will not contain stale data after GPU access since
write-invalidate protocol is used, which means there is no need to flush
before potentially transitioning the buffer to a non-coherent domain.

Use the opportunity to documet the situation on discrete too.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Fei Yang <fei.yang@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_domain.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index ffddec1d2a76..57db9c581bf6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -24,9 +24,22 @@ static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
 {
 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
 
+	/*
+	 * Discrete GPUs never dirty the CPU cache.
+	 */
 	if (IS_DGFX(i915))
 		return false;
 
+	/*
+	 * Cache snooping on Meteorlake is using write-invalidate so GPU writes
+	 * never end up in the CPU cache.
+	 *
+	 * QQQ: Do other snooping platforms behave identicaly and could we
+	 *      therefore write this as "if !HAS_LLC(i915) && HAS_SNOOP(i915)"?
+	 */
+	if (IS_METEORLAKE(i915))
+		return false;
+
 	/*
 	 * For objects created by userspace through GEM_CREATE with pat_index
 	 * set by set_pat extension, i915_gem_object_has_cache_level() will
-- 
2.39.2


  reply	other threads:[~2023-07-27 14:55 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-27 14:54 [Intel-gfx] [RFC 0/8] Another take on PAT/object cache mode refactoring Tvrtko Ursulin
2023-07-27 14:54 ` Tvrtko Ursulin [this message]
2023-07-27 22:19   ` [Intel-gfx] [RFC 1/8] drm/i915: Skip clflush after GPU writes on Meteorlake Matt Roper
2023-07-28  5:50   ` Yang, Fei
2023-07-27 14:54 ` [Intel-gfx] [RFC 2/8] drm/i915: Split PTE encode between Gen12 and Meteorlake Tvrtko Ursulin
2023-07-27 22:25   ` Matt Roper
2023-07-28  8:18     ` Tvrtko Ursulin
2023-07-28 14:41       ` Matt Roper
2023-07-27 14:54 ` [Intel-gfx] [RFC 3/8] drm/i915: Cache PAT index used by the driver Tvrtko Ursulin
2023-07-27 22:44   ` Matt Roper
2023-07-28 12:03     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 4/8] drm/i915: Refactor PAT/object cache handling Tvrtko Ursulin
2023-07-27 23:57   ` Matt Roper
2023-07-28  0:17     ` Matt Roper
2023-07-28 12:35       ` Tvrtko Ursulin
2023-07-28 12:23     ` Tvrtko Ursulin
2023-07-28 12:39     ` Tvrtko Ursulin
2023-07-28 14:53       ` Matt Roper
2023-07-28  7:14   ` Yang, Fei
2023-07-28 12:55     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 5/8] drm/i915: Improve the vm_fault_gtt user PAT index restriction Tvrtko Ursulin
2023-07-28  0:04   ` Matt Roper
2023-07-28 12:28     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 6/8] drm/i915: Lift the user PAT restriction from gpu_write_needs_clflush Tvrtko Ursulin
2023-07-28  0:05   ` Matt Roper
2023-07-27 14:55 ` [Intel-gfx] [RFC 7/8] drm/i915: Lift the user PAT restriction from use_cpu_reloc Tvrtko Ursulin
2023-07-28  0:09   ` Matt Roper
2023-07-28 12:45     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 8/8] drm/i915: Refine the caching check in i915_gem_object_can_bypass_llc Tvrtko Ursulin
2023-07-27 19:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Another take on PAT/object cache mode refactoring Patchwork
2023-07-27 19:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-07-27 20:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-28  1:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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