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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [RFC 2/8] drm/i915: Split PTE encode between Gen12 and Meteorlake
Date: Fri, 28 Jul 2023 09:18:36 +0100	[thread overview]
Message-ID: <fcca49f6-158d-1504-bc33-263095690e95@linux.intel.com> (raw)
In-Reply-To: <20230727222544.GB138014@mdroper-desk1.amr.corp.intel.com>


On 27/07/2023 23:25, Matt Roper wrote:
> On Thu, Jul 27, 2023 at 03:54:58PM +0100, Tvrtko Ursulin wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>
>> No need to run extra instructions which will never trigger on platforms
>> before Meteorlake.
>>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 26 ++++++++++++++++++++++++++
>>   1 file changed, 26 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>> index c8568e5d1147..862ac1d2de25 100644
>> --- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>> +++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
>> @@ -63,6 +63,30 @@ static u64 gen12_pte_encode(dma_addr_t addr,
>>   {
>>   	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
>>   
>> +	if (unlikely(flags & PTE_READ_ONLY))
>> +		pte &= ~GEN8_PAGE_RW;
>> +
>> +	if (flags & PTE_LM)
>> +		pte |= GEN12_PPGTT_PTE_LM;
>> +
>> +	if (pat_index & BIT(0))
>> +		pte |= GEN12_PPGTT_PTE_PAT0;
>> +
>> +	if (pat_index & BIT(1))
>> +		pte |= GEN12_PPGTT_PTE_PAT1;
>> +
>> +	if (pat_index & BIT(2))
>> +		pte |= GEN12_PPGTT_PTE_PAT2;
>> +
>> +	return pte;
>> +}
>> +
>> +static u64 mtl_pte_encode(dma_addr_t addr,
>> +			  unsigned int pat_index,
>> +			  u32 flags)
>> +{
>> +	gen8_pte_t pte = addr | GEN8_PAGE_PRESENT | GEN8_PAGE_RW;
>> +
> 
> Would it be more readable to start with
> 
>          gen8_pte_t pte = gen12_pte_encode(addr, pat_index, flags);
> 
> and then |-in only the MTL-specific bit(s) as appropriate?
> 
>>   	if (unlikely(flags & PTE_READ_ONLY))
>>   		pte &= ~GEN8_PAGE_RW;
>>   
>> @@ -995,6 +1019,8 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
>>   	 */
>>   	ppgtt->vm.alloc_scratch_dma = alloc_pt_dma;
>>   
>> +	if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70))
>> +		ppgtt->vm.pte_encode = mtl_pte_encode;
>>   	if (GRAPHICS_VER(gt->i915) >= 12)
>>   		ppgtt->vm.pte_encode = gen12_pte_encode;
> 
> I think you wanted 'else if' here.  Otherwise you clobber the MTL
> function pointer.

Doh this was a strong fail.. Yes and yes.. I even had it like you 
suggest in that patch I mentioned to you earlier.. 
https://patchwork.freedesktop.org/patch/546013/?series=120341&rev=2.

Do you have an opinion on that one perhaps?

Thanks,

Tvrtko

  reply	other threads:[~2023-07-28  8:18 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-27 14:54 [Intel-gfx] [RFC 0/8] Another take on PAT/object cache mode refactoring Tvrtko Ursulin
2023-07-27 14:54 ` [Intel-gfx] [RFC 1/8] drm/i915: Skip clflush after GPU writes on Meteorlake Tvrtko Ursulin
2023-07-27 22:19   ` Matt Roper
2023-07-28  5:50   ` Yang, Fei
2023-07-27 14:54 ` [Intel-gfx] [RFC 2/8] drm/i915: Split PTE encode between Gen12 and Meteorlake Tvrtko Ursulin
2023-07-27 22:25   ` Matt Roper
2023-07-28  8:18     ` Tvrtko Ursulin [this message]
2023-07-28 14:41       ` Matt Roper
2023-07-27 14:54 ` [Intel-gfx] [RFC 3/8] drm/i915: Cache PAT index used by the driver Tvrtko Ursulin
2023-07-27 22:44   ` Matt Roper
2023-07-28 12:03     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 4/8] drm/i915: Refactor PAT/object cache handling Tvrtko Ursulin
2023-07-27 23:57   ` Matt Roper
2023-07-28  0:17     ` Matt Roper
2023-07-28 12:35       ` Tvrtko Ursulin
2023-07-28 12:23     ` Tvrtko Ursulin
2023-07-28 12:39     ` Tvrtko Ursulin
2023-07-28 14:53       ` Matt Roper
2023-07-28  7:14   ` Yang, Fei
2023-07-28 12:55     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 5/8] drm/i915: Improve the vm_fault_gtt user PAT index restriction Tvrtko Ursulin
2023-07-28  0:04   ` Matt Roper
2023-07-28 12:28     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 6/8] drm/i915: Lift the user PAT restriction from gpu_write_needs_clflush Tvrtko Ursulin
2023-07-28  0:05   ` Matt Roper
2023-07-27 14:55 ` [Intel-gfx] [RFC 7/8] drm/i915: Lift the user PAT restriction from use_cpu_reloc Tvrtko Ursulin
2023-07-28  0:09   ` Matt Roper
2023-07-28 12:45     ` Tvrtko Ursulin
2023-07-27 14:55 ` [Intel-gfx] [RFC 8/8] drm/i915: Refine the caching check in i915_gem_object_can_bypass_llc Tvrtko Ursulin
2023-07-27 19:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Another take on PAT/object cache mode refactoring Patchwork
2023-07-27 19:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-07-27 20:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-28  1:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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