From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 06/17] drm/i915: Add helper to modeset a set of pipes
Date: Thu, 17 Aug 2023 19:14:45 +0300 [thread overview]
Message-ID: <20230817161456.3857111-7-imre.deak@intel.com> (raw)
In-Reply-To: <20230817161456.3857111-1-imre.deak@intel.com>
Add intel_modeset_pipes_in_mask() to modeset a provided set of pipes,
used in a follow-up patch.
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++++---
drivers/gpu/drm/i915/display/intel_display.h | 2 ++
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 763ab569d8f32..c35e5d7e45a3b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5420,8 +5420,8 @@ intel_verify_planes(struct intel_atomic_state *state)
plane_state->uapi.visible);
}
-int intel_modeset_all_pipes(struct intel_atomic_state *state,
- const char *reason)
+int intel_modeset_pipes_in_mask(struct intel_atomic_state *state,
+ const char *reason, u8 mask)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc *crtc;
@@ -5430,7 +5430,7 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state,
* Add all pipes to the state, and force
* a modeset on all the active ones.
*/
- for_each_intel_crtc(&dev_priv->drm, crtc) {
+ for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, crtc, mask) {
struct intel_crtc_state *crtc_state;
int ret;
@@ -5469,6 +5469,12 @@ int intel_modeset_all_pipes(struct intel_atomic_state *state,
return 0;
}
+int intel_modeset_all_pipes(struct intel_atomic_state *state,
+ const char *reason)
+{
+ return intel_modeset_pipes_in_mask(state, reason, -1);
+}
+
/*
* This implements the workaround described in the "notes" section of the mode
* set sequence documentation. When going from no pipes or single pipe to
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 49ac8473b988b..ffbabfc9e1e10 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -515,6 +515,8 @@ void intel_update_watermarks(struct drm_i915_private *i915);
/* modesetting */
int intel_modeset_all_pipes(struct intel_atomic_state *state,
const char *reason);
+int intel_modeset_pipes_in_mask(struct intel_atomic_state *state,
+ const char *reason, u8 pipe_mask);
void intel_modeset_get_crtc_power_domains(struct intel_crtc_state *crtc_state,
struct intel_power_domain_mask *old_domains);
void intel_modeset_put_crtc_power_domains(struct intel_crtc *crtc,
--
2.37.2
next prev parent reply other threads:[~2023-08-17 16:16 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-17 16:14 [Intel-gfx] [PATCH 00/17] drm/i915: Improve BW management on shared display links Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 01/17] drm/i915/dp: Factor out helpers to compute the link limits Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 02/17] drm/i915/dp: Track the pipe and link bpp limits separately Imre Deak
2023-08-17 16:27 ` Jani Nikula
2023-08-18 8:24 ` Kandpal, Suraj
2023-08-18 14:06 ` Imre Deak
2023-08-18 13:26 ` Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 03/17] drm/i915/dp: Skip computing a non-DSC link config if DSC is needed Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 04/17] drm/i915/dp: Update the link bpp limits for DSC mode Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 05/17] drm/i915/dp: Limit the output link bpp in " Imre Deak
2023-08-17 16:14 ` Imre Deak [this message]
2023-08-17 16:14 ` [Intel-gfx] [PATCH 07/17] drm/i915: Factor out a helper to check/compute all the CRTC states Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 08/17] drm/i915/fdi: Improve FDI BW sharing between pipe B and C Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 09/17] drm/dp_mst: Fix fractional bpp scaling in drm_dp_calc_pbn_mode() Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 10/17] drm/dp_mst: Add a way to calculate PBN values with FEC overhead Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 11/17] drm/dp_mst: Add helper to determine if an MST port is downstream of another port Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 12/17] drm/dp_mst: Factor out a helper to check the atomic state of a topology manager Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 13/17] drm/dp_mst: Swap the order of checking root vs. non-root port BW limitations Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 14/17] drm/i915/dp_mst: Fix PBN calculation with FEC overhead Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 15/17] drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 16/17] drm/i915/dp_mst: Improve BW sharing between MST streams Imre Deak
2023-08-17 16:14 ` [Intel-gfx] [PATCH 17/17] drm/i915/dp_mst: Check BW limitations only when all streams are computed Imre Deak
2023-08-18 1:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Improve BW management on shared display links Patchwork
2023-08-18 1:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-08-18 1:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-08-19 2:20 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230817161456.3857111-7-imre.deak@intel.com \
--to=imre.deak@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox