From: Alexander Usyskin <alexander.usyskin@intel.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Alexander Usyskin <alexander.usyskin@intel.com>,
intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>,
linux-mtd@lists.infradead.org,
Tomas Winkler <tomas.winkler@intel.com>,
Vitaly Lubart <vitaly.lubart@intel.com>
Subject: [Intel-gfx] [PATCH 06/10] drm/i915/spi: spi register with mtd
Date: Sun, 10 Sep 2023 15:39:45 +0300 [thread overview]
Message-ID: <20230910123949.1251964-7-alexander.usyskin@intel.com> (raw)
In-Reply-To: <20230910123949.1251964-1-alexander.usyskin@intel.com>
From: Tomas Winkler <tomas.winkler@intel.com>
Register the on-die spi device with the mtd subsystem.
Refcount spi object on _get and _put mtd callbacks.
CC: Rodrigo Vivi <rodrigo.vivi@intel.com>
CC: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
drivers/gpu/drm/i915/spi/intel_spi_drv.c | 118 +++++++++++++++++++++++
1 file changed, 118 insertions(+)
diff --git a/drivers/gpu/drm/i915/spi/intel_spi_drv.c b/drivers/gpu/drm/i915/spi/intel_spi_drv.c
index e3b78128ba76..355f9ad71602 100644
--- a/drivers/gpu/drm/i915/spi/intel_spi_drv.c
+++ b/drivers/gpu/drm/i915/spi/intel_spi_drv.c
@@ -15,8 +15,13 @@
#include <linux/delay.h>
#include "spi/intel_spi.h"
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
struct i915_spi {
struct kref refcnt;
+ struct mtd_info mtd;
+ struct mutex lock; /* region access lock */
void __iomem *base;
size_t size;
unsigned int nregions;
@@ -407,6 +412,29 @@ static int i915_spi_init(struct i915_spi *spi, struct device *device)
return n;
}
+static int i915_spi_erase(struct mtd_info *mtd, struct erase_info *info)
+{
+ dev_err(&mtd->dev, "erasing %lld %lld\n", info->addr, info->len);
+
+ return 0;
+}
+
+static int i915_spi_read(struct mtd_info *mtd, loff_t from, size_t len,
+ size_t *retlen, u_char *buf)
+{
+ dev_err(&mtd->dev, "read %lld %zd\n", from, len);
+
+ return 0;
+}
+
+static int i915_spi_write(struct mtd_info *mtd, loff_t to, size_t len,
+ size_t *retlen, const u_char *buf)
+{
+ dev_err(&mtd->dev, "writing %lld %zd\n", to, len);
+
+ return 0;
+}
+
static void i915_spi_release(struct kref *kref)
{
struct i915_spi *spi = container_of(kref, struct i915_spi, refcnt);
@@ -415,9 +443,90 @@ static void i915_spi_release(struct kref *kref)
pr_debug("freeing spi memory\n");
for (i = 0; i < spi->nregions; i++)
kfree(spi->regions[i].name);
+ mutex_destroy(&spi->lock);
kfree(spi);
}
+static int i915_spi_get_device(struct mtd_info *mtd)
+{
+ struct mtd_info *master;
+ struct i915_spi *spi;
+
+ if (!mtd)
+ return -ENODEV;
+
+ master = mtd_get_master(mtd);
+ spi = master->priv;
+ if (WARN_ON(!spi))
+ return -EINVAL;
+ pr_debug("get spi %s %d\n", mtd->name, kref_read(&spi->refcnt));
+ kref_get(&spi->refcnt);
+
+ return 0;
+}
+
+static void i915_spi_put_device(struct mtd_info *mtd)
+{
+ struct mtd_info *master;
+ struct i915_spi *spi;
+
+ if (!mtd)
+ return;
+
+ master = mtd_get_master(mtd);
+ spi = master->priv;
+ if (WARN_ON(!spi))
+ return;
+ pr_debug("put spi %s %d\n", mtd->name, kref_read(&spi->refcnt));
+ kref_put(&spi->refcnt, i915_spi_release);
+}
+
+static int i915_spi_init_mtd(struct i915_spi *spi, struct device *device,
+ unsigned int nparts)
+{
+ unsigned int i;
+ unsigned int n;
+ struct mtd_partition *parts = NULL;
+ int ret;
+
+ dev_dbg(device, "registering with mtd\n");
+
+ spi->mtd.owner = THIS_MODULE;
+ spi->mtd.dev.parent = device;
+ spi->mtd.flags = MTD_CAP_NORFLASH | MTD_WRITEABLE;
+ spi->mtd.type = MTD_DATAFLASH;
+ spi->mtd.priv = spi;
+ spi->mtd._write = i915_spi_write;
+ spi->mtd._read = i915_spi_read;
+ spi->mtd._erase = i915_spi_erase;
+ spi->mtd._get_device = i915_spi_get_device;
+ spi->mtd._put_device = i915_spi_put_device;
+ spi->mtd.writesize = SZ_1; /* 1 byte granularity */
+ spi->mtd.erasesize = SZ_4K; /* 4K bytes granularity */
+ spi->mtd.size = spi->size;
+
+ parts = kcalloc(spi->nregions, sizeof(*parts), GFP_KERNEL);
+ if (!parts)
+ return -ENOMEM;
+
+ for (i = 0, n = 0; i < spi->nregions && n < nparts; i++) {
+ if (!spi->regions[i].is_readable)
+ continue;
+ parts[n].name = spi->regions[i].name;
+ parts[n].offset = spi->regions[i].offset;
+ parts[n].size = spi->regions[i].size;
+ if (!spi->regions[i].is_writable)
+ parts[n].mask_flags = MTD_WRITEABLE;
+ n++;
+ }
+
+ ret = mtd_device_register(&spi->mtd, parts, n);
+
+ kfree(parts);
+
+ return ret;
+}
+
static int i915_spi_probe(struct auxiliary_device *aux_dev,
const struct auxiliary_device_id *aux_dev_id)
{
@@ -449,6 +558,7 @@ static int i915_spi_probe(struct auxiliary_device *aux_dev,
if (!spi)
return -ENOMEM;
+ mutex_init(&spi->lock);
kref_init(&spi->refcnt);
spi->nregions = nregions;
@@ -481,6 +591,12 @@ static int i915_spi_probe(struct auxiliary_device *aux_dev,
goto err;
}
+ ret = i915_spi_init_mtd(spi, device, ret);
+ if (ret) {
+ dev_err(device, "i915-spi failed init mtd %d\n", ret);
+ goto err;
+ }
+
dev_set_drvdata(&aux_dev->dev, spi);
dev_dbg(device, "i915-spi is bound\n");
@@ -499,6 +615,8 @@ static void i915_spi_remove(struct auxiliary_device *aux_dev)
if (!spi)
return;
+ mtd_device_unregister(&spi->mtd);
+
dev_set_drvdata(&aux_dev->dev, NULL);
kref_put(&spi->refcnt, i915_spi_release);
--
2.34.1
next prev parent reply other threads:[~2023-09-10 12:44 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-10 12:39 [Intel-gfx] [PATCH 00/10] drm/i915/spi: spi access for discrete graphics Alexander Usyskin
2023-09-10 12:39 ` [Intel-gfx] [PATCH 01/10] drm/i915/spi: add spi device " Alexander Usyskin
2023-09-11 15:41 ` Jani Nikula
2023-09-12 10:47 ` Usyskin, Alexander
2023-09-10 12:39 ` [Intel-gfx] [PATCH 02/10] drm/i915/spi: add intel_spi_region map Alexander Usyskin
2023-09-10 12:39 ` [Intel-gfx] [PATCH 03/10] drm/i915/spi: add driver for on-die spi device Alexander Usyskin
2023-09-10 12:39 ` [Intel-gfx] [PATCH 04/10] drm/i915/spi: implement region enumeration Alexander Usyskin
2023-09-10 12:39 ` [Intel-gfx] [PATCH 05/10] drm/i915/spi: implement spi access functions Alexander Usyskin
2023-09-10 12:39 ` Alexander Usyskin [this message]
2023-10-16 8:39 ` [Intel-gfx] [PATCH 06/10] drm/i915/spi: spi register with mtd Miquel Raynal
2023-10-17 11:54 ` Usyskin, Alexander
2023-10-17 13:55 ` Miquel Raynal
2023-10-17 14:20 ` Usyskin, Alexander
2023-10-17 14:46 ` Miquel Raynal
2023-11-14 8:47 ` Usyskin, Alexander
2023-11-14 9:13 ` Miquel Raynal
2024-02-14 12:16 ` Usyskin, Alexander
2024-02-19 9:09 ` Miquel Raynal
2023-09-10 12:39 ` [Intel-gfx] [PATCH 07/10] drm/i915/spi: mtd: implement access handlers Alexander Usyskin
2023-09-10 12:39 ` [Intel-gfx] [PATCH 08/10] drm/i915/spi: align 64bit read and write Alexander Usyskin
2023-09-10 12:39 ` [Intel-gfx] [PATCH 09/10] drm/i915/spi: wake card on operations Alexander Usyskin
2023-09-10 12:39 ` [Intel-gfx] [PATCH 10/10] drm/i915/spi: add support for access mode Alexander Usyskin
2023-09-10 13:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/spi: spi access for discrete graphics Patchwork
2023-09-10 13:11 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-09-11 7:42 ` [Intel-gfx] [PATCH 00/10] " Miquel Raynal
2023-09-12 10:50 ` Usyskin, Alexander
2023-09-12 12:14 ` Mark Brown
2023-09-12 13:15 ` Usyskin, Alexander
2023-09-12 13:21 ` Miquel Raynal
2023-09-12 13:36 ` Mark Brown
2023-09-20 13:52 ` Usyskin, Alexander
2023-09-20 15:54 ` Mark Brown
2023-09-20 21:00 ` Winkler, Tomas
2023-09-21 11:29 ` Mark Brown
2023-09-27 14:11 ` Usyskin, Alexander
2023-09-27 14:37 ` Mark Brown
2023-09-27 14:54 ` Miquel Raynal
2023-09-28 6:33 ` Usyskin, Alexander
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