From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: janusz.krzysztofik@intel.com, andi.shyti@intel.com,
matthew.d.roper@intel.com, jonathan.cavitt@intel.com,
chris.p.wilson@linux.intel.com, nirmoy.das@intel.com
Subject: [Intel-gfx] [PATCH v7 4/5] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck
Date: Thu, 5 Oct 2023 12:35:35 -0700 [thread overview]
Message-ID: <20231005193536.1463159-6-jonathan.cavitt@intel.com> (raw)
In-Reply-To: <20231005193536.1463159-1-jonathan.cavitt@intel.com>
For the gt_tlb live selftest, increase the timeout from 10 ms to 200 ms.
200 ms should be more than enough time, and 10 ms was too aggressive.
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_tlb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_tlb.c b/drivers/gpu/drm/i915/gt/selftest_tlb.c
index 7e41f69fc818f..46e0a1dbecc8d 100644
--- a/drivers/gpu/drm/i915/gt/selftest_tlb.c
+++ b/drivers/gpu/drm/i915/gt/selftest_tlb.c
@@ -137,7 +137,7 @@ pte_tlbinv(struct intel_context *ce,
i915_request_add(rq);
/* Short sleep to sanitycheck the batch is spinning before we begin */
- msleep(10);
+ msleep(200);
if (va == vb) {
if (!i915_request_completed(rq)) {
pr_err("%s(%s): Semaphore sanitycheck failed %llx, with alignment %llx, using PTE size %x (phys %x, sg %x)\n",
--
2.25.1
next prev parent reply other threads:[~2023-10-05 19:46 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-05 19:35 [Intel-gfx] [PATCH dii-client v6 0/5] Subject: [PATCH dii-client v6 0/4] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-05 19:35 ` [Intel-gfx] [PATCH v7 0/5] " Jonathan Cavitt
2023-10-05 19:35 ` [Intel-gfx] [PATCH v7 1/5] drm/i915: Add GuC TLB Invalidation device info flags Jonathan Cavitt
2023-10-06 2:24 ` John Harrison
2023-10-06 10:22 ` Nirmoy Das
2023-10-05 19:35 ` [Intel-gfx] [PATCH v7 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-06 2:19 ` John Harrison
2023-10-06 11:57 ` Andi Shyti
2023-10-06 10:11 ` Tvrtko Ursulin
2023-10-06 10:20 ` Nirmoy Das
2023-10-06 16:18 ` John Harrison
2023-10-06 16:44 ` John Harrison
2023-10-06 13:04 ` Tvrtko Ursulin
2023-10-06 18:38 ` Cavitt, Jonathan
2023-10-05 19:35 ` [Intel-gfx] [PATCH v7 3/5] drm/i915: No TLB invalidation on wedged or suspended GT Jonathan Cavitt
2023-10-06 10:23 ` Tvrtko Ursulin
2023-10-06 17:30 ` John Harrison
2023-10-05 19:35 ` Jonathan Cavitt [this message]
2023-10-06 17:57 ` [Intel-gfx] [PATCH v7 4/5] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck John Harrison
2023-10-05 19:35 ` [Intel-gfx] [PATCH v7 5/5] drm/i915: Enable GuC TLB invalidations for MTL Jonathan Cavitt
2023-10-06 1:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Subject: [PATCH dii-client v6 0/4] drm/i915: Define and use GuC and CTB TLB invalidation routines (rev2) Patchwork
2023-10-06 1:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-06 1:39 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-06 10:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Subject: [PATCH dii-client v6 0/4] drm/i915: Define and use GuC and CTB TLB invalidation routines (rev3) Patchwork
2023-10-06 10:15 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-06 10:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-06 22:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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