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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 06/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_max_bpp()
Date: Fri,  6 Oct 2023 16:37:14 +0300	[thread overview]
Message-ID: <20231006133727.1822579-7-imre.deak@intel.com> (raw)
In-Reply-To: <20231006133727.1822579-1-imre.deak@intel.com>

Use the connector's DSC DPCD capabilities in intel_dp_dsc_compute_max_bpp()
instead of the version stored in the encoder.

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 13 ++++++++-----
 drivers/gpu/drm/i915/display/intel_dp.h     |  3 ++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c |  2 +-
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 6e6b3fe593453..00f5fecdbf386 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1215,7 +1215,7 @@ intel_dp_mode_valid(struct drm_connector *_connector,
 		 * TBD pass the connector BPC,
 		 * for now U8_MAX so that max BPC on that platform would be picked
 		 */
-		pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, U8_MAX);
+		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, U8_MAX);
 
 		/*
 		 * Output bpp is stored in 6.4 format so right shift by 4 to get the
@@ -1577,9 +1577,10 @@ u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
 	return 0;
 }
 
-int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 max_req_bpc)
+int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector,
+				 u8 max_req_bpc)
 {
-	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	int i, num_bpc;
 	u8 dsc_bpc[3] = {0};
 	u8 dsc_max_bpc;
@@ -1591,7 +1592,7 @@ int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 max_req_bpc)
 
 	dsc_max_bpc = min_t(u8, dsc_max_bpc, max_req_bpc);
 
-	num_bpc = drm_dp_dsc_sink_supported_input_bpcs(intel_dp->dsc_dpcd,
+	num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
 						       dsc_bpc);
 	for (i = 0; i < num_bpc; i++) {
 		if (dsc_max_bpc >= dsc_bpc[i])
@@ -2056,6 +2057,8 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
 					  struct link_config_limits *limits)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	struct intel_connector *connector =
+		to_intel_connector(conn_state->connector);
 	int pipe_bpp, forced_bpp;
 	int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp;
 	int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp;
@@ -2068,7 +2071,7 @@ static int intel_edp_dsc_compute_pipe_bpp(struct intel_dp *intel_dp,
 		int max_bpc = min(limits->pipe.max_bpp / 3, (int)conn_state->max_requested_bpc);
 
 		/* For eDP use max bpp that can be supported with DSC. */
-		pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, max_bpc);
+		pipe_bpp = intel_dp_dsc_compute_max_bpp(connector, max_bpc);
 		if (!is_dsc_pipe_bpp_sufficient(i915, conn_state, limits, pipe_bpp)) {
 			drm_dbg_kms(&i915->drm,
 				    "Computed BPC is not in DSC BPC limits\n");
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index bd9cb9680b4cd..af87aa2a5ed67 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -116,7 +116,8 @@ void intel_read_dp_sdp(struct intel_encoder *encoder,
 		       struct intel_crtc_state *crtc_state,
 		       unsigned int type);
 bool intel_digital_port_connected(struct intel_encoder *encoder);
-int intel_dp_dsc_compute_max_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc);
+int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector,
+				 u8 dsc_max_bpc);
 u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
 					u32 link_clock, u32 lane_count,
 					u32 mode_clock, u32 mode_hdisplay,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index e01f669d2c8a1..3ff429c30f300 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1003,7 +1003,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
 		 * TBD pass the connector BPC,
 		 * for now U8_MAX so that max BPC on that platform would be picked
 		 */
-		int pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_dp, U8_MAX);
+		int pipe_bpp = intel_dp_dsc_compute_max_bpp(intel_connector, U8_MAX);
 
 		if (drm_dp_sink_supports_fec(intel_dp->fec_capable)) {
 			dsc_max_compressed_bpp =
-- 
2.39.2


  parent reply	other threads:[~2023-10-06 13:37 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-06 13:37 [Intel-gfx] [PATCH 00/19] drm/i915: Store DSC DPCD capabilities in the connector Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 01/19] drm/i915/dp: Sanitize DPCD revision check in intel_dp_get_dsc_sink_cap() Imre Deak
2023-10-06 14:59   ` Lisovskiy, Stanislav
2023-10-10 10:14     ` Imre Deak
2023-10-09 14:48   ` Ville Syrjälä
2023-10-10  9:20     ` Imre Deak
2023-10-10 11:25   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-11 17:16     ` [Intel-gfx] [PATCH v3 " Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 02/19] drm/i915/dp: Store DSC DPCD capabilities in the connector Imre Deak
2023-10-09 11:17   ` Lisovskiy, Stanislav
2023-10-10 11:25   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-11 17:16     ` [Intel-gfx] [PATCH v3 " Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 03/19] drm/i915/dp_mst: Set connector DSC capabilities and decompression AUX Imre Deak
2023-10-09 13:51   ` Lisovskiy, Stanislav
2023-10-10 11:25   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 04/19] drm/i915/dp: Use i915/intel connector local variables in i915_dsc_fec_support_show() Imre Deak
2023-10-09 13:58   ` Lisovskiy, Stanislav
2023-10-06 13:37 ` [Intel-gfx] [PATCH 05/19] drm/i915/dp: Use connector DSC DPCD " Imre Deak
2023-10-09 14:04   ` Lisovskiy, Stanislav
2023-10-06 13:37 ` Imre Deak [this message]
2023-10-09 20:16   ` [Intel-gfx] [PATCH 06/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_max_bpp() Lisovskiy, Stanislav
2023-10-06 13:37 ` [Intel-gfx] [PATCH 07/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_supports_fec() Imre Deak
2023-10-09 20:17   ` Lisovskiy, Stanislav
2023-10-06 13:37 ` [Intel-gfx] [PATCH 08/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_supports_dsc() Imre Deak
2023-10-09 20:18   ` Lisovskiy, Stanislav
2023-10-06 13:37 ` [Intel-gfx] [PATCH 09/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_max_sink_compressed_bppx16() Imre Deak
2023-10-09 20:19   ` Lisovskiy, Stanislav
2023-10-06 13:37 ` [Intel-gfx] [PATCH 10/19] drm/i915/dp: Pass connector DSC DPCD to drm_dp_dsc_sink_supported_input_bpcs() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 11/19] drm/i915/dp: Pass only the required i915 to intel_dp_source_dsc_version_minor() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 12/19] drm/i915/dp: Pass only the required DSC DPCD to intel_dp_sink_dsc_version_minor() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 13/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_params() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 14/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_supports_format() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 15/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_get_slice_count() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 16/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_mode_valid() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 17/19] drm/i915/dp: Use connector DSC DPCD in intel_dp_dsc_compute_config() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 18/19] drm/i915/dp_mst: Use connector DSC DPCD in intel_dp_mst_mode_valid_ctx() Imre Deak
2023-10-06 13:37 ` [Intel-gfx] [PATCH 19/19] drm/i915/dp: Remove unused DSC caps from intel_dp Imre Deak
2023-10-09 14:05   ` Lisovskiy, Stanislav
2023-10-10 11:25   ` [Intel-gfx] [PATCH v2 " Imre Deak
2023-10-11 17:16     ` [Intel-gfx] [PATCH v3 " Imre Deak
2023-10-06 17:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Store DSC DPCD capabilities in the connector Patchwork
2023-10-06 18:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-07  7:23 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-10-10 16:17 ` [Intel-gfx] [PATCH 00/19] " Ville Syrjälä
2023-10-10 21:50 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Store DSC DPCD capabilities in the connector (rev5) Patchwork
2023-10-10 22:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-11 10:02 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-10-13  5:33 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Store DSC DPCD capabilities in the connector (rev9) Patchwork
2023-10-13  5:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-14  5:20 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-10-16 14:15   ` Imre Deak

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