From: Andrzej Hajda <andrzej.hajda@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Chris Wilson <chris.p.wilson@linux.intel.com>
Subject: [Intel-gfx] [PATCH v4 1/4] drm/i915: Reserve some kernel space per vm
Date: Mon, 23 Oct 2023 22:21:45 +0200 [thread overview]
Message-ID: <20231023-wabb-v4-1-f75dec962b7d@intel.com> (raw)
In-Reply-To: <20231023-wabb-v4-0-f75dec962b7d@intel.com>
Reserve one page in each vm for kernel space to use for things
such as workarounds.
v2: use real memory, do not decrease vm.total
v4: reserve only one page and explain flag
Suggested-by: Chris Wilson <chris.p.wilson@linux.intel.com>
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 38 ++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/gt/intel_gtt.h | 1 +
2 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index 9895e18df0435a..1ac619a02a8567 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -5,6 +5,7 @@
#include <linux/log2.h>
+#include "gem/i915_gem_internal.h"
#include "gem/i915_gem_lmem.h"
#include "gen8_ppgtt.h"
@@ -950,6 +951,39 @@ gen8_alloc_top_pd(struct i915_address_space *vm)
return ERR_PTR(err);
}
+static int gen8_init_rsvd(struct i915_address_space *vm)
+{
+ struct drm_i915_private *i915 = vm->i915;
+ struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
+ int ret;
+
+ /* The memory will be used only by GPU. */
+ obj = i915_gem_object_create_lmem(i915, PAGE_SIZE,
+ I915_BO_ALLOC_VOLATILE |
+ I915_BO_ALLOC_GPU_ONLY);
+ if (IS_ERR(obj))
+ obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
+ if (IS_ERR(obj))
+ return PTR_ERR(obj);
+
+ vma = i915_vma_instance(obj, vm, NULL);
+ if (IS_ERR(vma)) {
+ ret = PTR_ERR(vma);
+ goto unref;
+ }
+
+ ret = i915_vma_pin(vma, 0, 0, PIN_USER | PIN_HIGH);
+ if (ret)
+ goto unref;
+
+ vm->rsvd = i915_vma_make_unshrinkable(vma);
+
+unref:
+ i915_gem_object_put(obj);
+ return ret;
+}
+
/*
* GEN8 legacy ppgtt programming is accomplished through a max 4 PDP registers
* with a net effect resembling a 2-level page table in normal x86 terms. Each
@@ -1031,6 +1065,10 @@ struct i915_ppgtt *gen8_ppgtt_create(struct intel_gt *gt,
if (intel_vgpu_active(gt->i915))
gen8_ppgtt_notify_vgt(ppgtt, true);
+ err = gen8_init_rsvd(&ppgtt->vm);
+ if (err)
+ goto err_put;
+
return ppgtt;
err_put:
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index b471edac269920..5ac079e5f12f67 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -249,6 +249,7 @@ struct i915_address_space {
struct work_struct release_work;
struct drm_mm mm;
+ struct i915_vma *rsvd;
struct intel_gt *gt;
struct drm_i915_private *i915;
struct device *dma;
--
2.34.1
next prev parent reply other threads:[~2023-10-23 20:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 20:21 [Intel-gfx] [PATCH v4 0/4] Apply Wa_16018031267 / Wa_16018063123 Andrzej Hajda
2023-10-23 20:21 ` Andrzej Hajda [this message]
2023-10-24 8:14 ` [Intel-gfx] [PATCH v4 1/4] drm/i915: Reserve some kernel space per vm Nirmoy Das
2023-10-24 9:10 ` Andi Shyti
2023-10-23 20:21 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123 Andrzej Hajda
2023-10-24 11:37 ` Andi Shyti
2023-10-23 20:21 ` [Intel-gfx] [PATCH v4 3/4] drm/i915/gt: add selftest to exercise WABB Andrzej Hajda
2023-10-24 8:19 ` Nirmoy Das
2023-10-24 11:39 ` Andi Shyti
2023-10-23 20:21 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Set copy engine arbitration for Wa_16018031267 / Wa_16018063123 Andrzej Hajda
2023-10-24 8:16 ` Nirmoy Das
2023-10-24 11:41 ` Andi Shyti
2023-10-24 19:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Apply " Patchwork
2023-10-24 19:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-24 20:06 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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