From: Nirmoy Das <nirmoy.das@linux.intel.com>
To: Andrzej Hajda <andrzej.hajda@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>,
Nirmoy Das <nirmoy.das@intel.com>
Subject: Re: [Intel-gfx] [PATCH v4 4/4] drm/i915: Set copy engine arbitration for Wa_16018031267 / Wa_16018063123
Date: Tue, 24 Oct 2023 10:16:42 +0200 [thread overview]
Message-ID: <5fc7f788-5877-fa85-b7e9-4b6b9f0484c2@linux.intel.com> (raw)
In-Reply-To: <20231023-wabb-v4-4-f75dec962b7d@intel.com>
On 10/23/2023 10:21 PM, Andrzej Hajda wrote:
> From: Jonathan Cavitt <jonathan.cavitt@intel.com>
>
> Set copy engine arbitration into round robin mode
> for part of Wa_16018031267 / Wa_16018063123 mitigation.
>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_engine_regs.h | 3 +++
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_regs.h b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
> index b8618ee3e3041a..c0c8c12edea104 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_regs.h
> @@ -124,6 +124,9 @@
> #define RING_INDIRECT_CTX(base) _MMIO((base) + 0x1c4) /* gen8+ */
> #define RING_INDIRECT_CTX_OFFSET(base) _MMIO((base) + 0x1c8) /* gen8+ */
> #define ECOSKPD(base) _MMIO((base) + 0x1d0)
> +#define XEHP_BLITTER_SCHEDULING_MODE_MASK REG_GENMASK(12, 11)
> +#define XEHP_BLITTER_ROUND_ROBIN_MODE \
> + REG_FIELD_PREP(XEHP_BLITTER_SCHEDULING_MODE_MASK, 1)
> #define ECO_CONSTANT_BUFFER_SR_DISABLE REG_BIT(4)
> #define ECO_GATING_CX_ONLY REG_BIT(3)
> #define GEN6_BLITTER_FBC_NOTIFY REG_BIT(3)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 192ac0e59afa13..108d9326735910 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -2782,6 +2782,11 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> RING_SEMA_WAIT_POLL(engine->mmio_base),
> 1);
> }
> + /* Wa_16018031267, Wa_16018063123 */
> + if (NEEDS_FASTCOLOR_BLT_WABB(engine))
> + wa_masked_field_set(wal, ECOSKPD(engine->mmio_base),
> + XEHP_BLITTER_SCHEDULING_MODE_MASK,
> + XEHP_BLITTER_ROUND_ROBIN_MODE);
> }
>
> static void
>
next prev parent reply other threads:[~2023-10-24 8:16 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-23 20:21 [Intel-gfx] [PATCH v4 0/4] Apply Wa_16018031267 / Wa_16018063123 Andrzej Hajda
2023-10-23 20:21 ` [Intel-gfx] [PATCH v4 1/4] drm/i915: Reserve some kernel space per vm Andrzej Hajda
2023-10-24 8:14 ` Nirmoy Das
2023-10-24 9:10 ` Andi Shyti
2023-10-23 20:21 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123 Andrzej Hajda
2023-10-24 11:37 ` Andi Shyti
2023-10-23 20:21 ` [Intel-gfx] [PATCH v4 3/4] drm/i915/gt: add selftest to exercise WABB Andrzej Hajda
2023-10-24 8:19 ` Nirmoy Das
2023-10-24 11:39 ` Andi Shyti
2023-10-23 20:21 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Set copy engine arbitration for Wa_16018031267 / Wa_16018063123 Andrzej Hajda
2023-10-24 8:16 ` Nirmoy Das [this message]
2023-10-24 11:41 ` Andi Shyti
2023-10-24 19:48 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Apply " Patchwork
2023-10-24 19:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-24 20:06 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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