From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/4] drm/i915/mst: Fix .mode_valid_ctx() return values
Date: Mon, 27 Nov 2023 16:50:26 +0200 [thread overview]
Message-ID: <20231127145028.4899-2-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20231127145028.4899-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
.mode_valid_ctx() returns an errno, not the mode status. Fix
the code to do the right thing.
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Fixes: d51f25eb479a ("drm/i915: Add DSC support to MST path")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 0514f825baf5..0680a42f7d2a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1366,11 +1366,15 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
* Big joiner configuration needs DSC for TGL which is not true for
* XE_LPD where uncompressed joiner is supported.
*/
- if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc)
- return MODE_CLOCK_HIGH;
+ if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc) {
+ *status = MODE_CLOCK_HIGH;
+ return 0;
+ }
- if (mode_rate > max_rate && !dsc)
- return MODE_CLOCK_HIGH;
+ if (mode_rate > max_rate && !dsc) {
+ *status = MODE_CLOCK_HIGH;
+ return 0;
+ }
*status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
return 0;
--
2.41.0
next prev parent reply other threads:[~2023-11-27 14:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-27 14:50 [Intel-gfx] [PATCH 1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders Ville Syrjala
2023-11-27 14:50 ` Ville Syrjala [this message]
2023-11-28 12:24 ` [Intel-gfx] [PATCH 2/4] drm/i915/mst: Fix .mode_valid_ctx() return values Jani Nikula
2023-11-27 14:50 ` [Intel-gfx] [PATCH 3/4] drm/i915/mst: Reject modes that require the bigjoiner Ville Syrjala
2023-11-28 12:24 ` Jani Nikula
2023-11-27 14:50 ` [Intel-gfx] [PATCH 4/4] drm/i915: Clean up some DISPLAY_VER checks Ville Syrjala
2023-11-28 12:28 ` Jani Nikula
2023-11-27 16:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders Patchwork
2023-11-27 16:31 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-11-28 12:22 ` [Intel-gfx] [PATCH 1/4] " Jani Nikula
2023-11-28 12:40 ` Ville Syrjälä
2023-11-28 12:47 ` Jani Nikula
2023-11-28 12:57 ` Ville Syrjälä
2023-11-28 14:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Skip some timing checks on BXT/GLK DSI transcoders (rev2) Patchwork
2023-11-28 15:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-11-28 17:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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