From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/3] drm/i915: Add meaningful traces for QGV point info error handling
Date: Tue, 28 Nov 2023 10:37:52 +0200 [thread overview]
Message-ID: <20231128083754.20096-2-stanislav.lisovskiy@intel.com> (raw)
In-Reply-To: <20231128083754.20096-1-stanislav.lisovskiy@intel.com>
For debug purposes we need those - error path won't flood the log,
however there has been already numerous cases, when due to lack
of debugs, we couldn't immediately tell what was the problem on
customer machine, which slowed down the investigation, requiring
to get access to target device and adding those traces manually.
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 4 +++-
drivers/gpu/drm/i915/soc/intel_dram.c | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bef96db62c80..583cd2ebdf89 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -289,8 +289,10 @@ static int icl_get_qgv_points(struct drm_i915_private *dev_priv,
struct intel_qgv_point *sp = &qi->points[i];
ret = intel_read_qgv_point_info(dev_priv, sp, i);
- if (ret)
+ if (ret) {
+ drm_dbg_kms(&dev_priv->drm, "Could not read QGV %d info\n", i);
return ret;
+ }
drm_dbg_kms(&dev_priv->drm,
"QGV %d: DCLK=%d tRP=%d tRDPRE=%d tRAS=%d tRCD=%d tRC=%d\n",
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 15492b69f698..37d61dff50a8 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -647,6 +647,8 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915)
dram_info->num_channels = REG_FIELD_GET(MTL_N_OF_POPULATED_CH_MASK, val);
dram_info->num_qgv_points = REG_FIELD_GET(MTL_N_OF_ENABLED_QGV_POINTS_MASK, val);
+ drm_dbg_kms(&i915->drm, "Num qgv points from MTL_N_OF_ENABLED_QGV_POINTS_MASK reg: %d\n",
+ dram_info->num_qgv_points);
/* PSF GV points not supported in D14+ */
return 0;
--
2.37.3
next prev parent reply other threads:[~2023-11-28 8:38 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-28 8:37 [Intel-gfx] [PATCH 0/3] QGV/SAGV related fixes Stanislav Lisovskiy
2023-11-28 8:37 ` Stanislav Lisovskiy [this message]
2023-11-28 12:53 ` [Intel-gfx] [PATCH 1/3] drm/i915: Add meaningful traces for QGV point info error handling Gustavo Sousa
2023-11-28 8:37 ` [Intel-gfx] [PATCH 2/3] drm/i915: Extract code required to calculate max qgv/psf gv point Stanislav Lisovskiy
2024-01-12 17:35 ` Ville Syrjälä
2024-01-17 10:12 ` Lisovskiy, Stanislav
2024-01-17 11:12 ` Ville Syrjälä
2024-01-17 11:23 ` Lisovskiy, Stanislav
2023-11-28 8:37 ` [Intel-gfx] [PATCH 3/3] drm/i915: Disable SAGV on bw init, to force QGV point recalculation Stanislav Lisovskiy
2023-11-29 9:21 ` Stanislav Lisovskiy
2023-12-01 14:35 ` Stanislav Lisovskiy
2023-11-28 9:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for QGV/SAGV related fixes Patchwork
2023-11-28 9:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-28 9:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-11-29 14:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for QGV/SAGV related fixes (rev2) Patchwork
2023-11-29 14:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-29 14:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-12-02 1:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for QGV/SAGV related fixes (rev3) Patchwork
2023-12-02 1:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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