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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/3] drm/i915: Extract code required to calculate max qgv/psf gv point
Date: Fri, 12 Jan 2024 19:35:24 +0200	[thread overview]
Message-ID: <ZaF4XLoYDDmcJcbE@intel.com> (raw)
In-Reply-To: <20231128083754.20096-3-stanislav.lisovskiy@intel.com>

On Tue, Nov 28, 2023 at 10:37:53AM +0200, Stanislav Lisovskiy wrote:
> We need that in order to force disable SAGV in next patch.
> Also it is beneficial to separate that code, as in majority cases,
> when SAGV is enabled, we don't even need those calculations.
> Also we probably need to determine max PSF GV point as well, however
> currently we don't do that when we disable SAGV, which might be
> actually causing some issues in that case.
> 
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 82 ++++++++++++++++++++-----
>  1 file changed, 65 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 583cd2ebdf89..efd408e96e8a 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -805,6 +805,64 @@ intel_atomic_get_bw_state(struct intel_atomic_state *state)
>  	return to_intel_bw_state(bw_state);
>  }
>  
> +static unsigned int icl_max_bw_qgv_point(struct drm_i915_private *i915,
> +					 int num_active_planes)
> +{
> +	unsigned int max_bw_point = 0;
> +	unsigned int max_bw = 0;
> +	unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points;
> +	int i;
> +
> +	for (i = 0; i < num_qgv_points; i++) {
> +		unsigned int idx;
> +		unsigned int max_data_rate;
> +
> +		if (DISPLAY_VER(i915) > 11)
> +			idx = tgl_max_bw_index(i915, num_active_planes, i);
> +		else
> +			idx = icl_max_bw_index(i915, num_active_planes, i);
> +
> +		if (idx >= ARRAY_SIZE(i915->display.bw.max))
> +			continue;
> +
> +		max_data_rate = i915->display.bw.max[idx].deratedbw[i];

Looks like that that part could be extracted to a helper
to be used by both codepaths (would be a natural counterpart
to adl_psf_bw()).

> +
> +		/*
> +		 * We need to know which qgv point gives us
> +		 * maximum bandwidth in order to disable SAGV
> +		 * if we find that we exceed SAGV block time
> +		 * with watermarks. By that moment we already
> +		 * have those, as it is calculated earlier in
> +		 * intel_atomic_check,
> +		 */
> +		if (max_data_rate > max_bw) {
> +			max_bw_point = i;
> +			max_bw = max_data_rate;
> +		}
> +	}
> +
> +	return max_bw_point;
> +}
> +
> +unsigned int icl_max_bw_psf_gv_point(struct drm_i915_private *i915)
> +{
> +	unsigned int num_psf_gv_points = i915->display.bw.max[0].num_psf_gv_points;
> +	unsigned int max_bw = 0;
> +	unsigned int max_bw_point = 0;
> +	int i;
> +
> +	for (i = 0; i < num_psf_gv_points; i++) {
> +		unsigned int max_data_rate = adl_psf_bw(i915, i);
> +
> +		if (max_data_rate > max_bw) {
> +			max_bw_point = i;
> +			max_bw = max_data_rate;
> +		}
> +	}
> +
> +	return max_bw_point;
> +}
> +
>  static int mtl_find_qgv_points(struct drm_i915_private *i915,
>  			       unsigned int data_rate,
>  			       unsigned int num_active_planes,
> @@ -882,8 +940,6 @@ static int icl_find_qgv_points(struct drm_i915_private *i915,
>  			       const struct intel_bw_state *old_bw_state,
>  			       struct intel_bw_state *new_bw_state)
>  {
> -	unsigned int max_bw_point = 0;
> -	unsigned int max_bw = 0;
>  	unsigned int num_psf_gv_points = i915->display.bw.max[0].num_psf_gv_points;
>  	unsigned int num_qgv_points = i915->display.bw.max[0].num_qgv_points;
>  	u16 psf_points = 0;
> @@ -909,18 +965,6 @@ static int icl_find_qgv_points(struct drm_i915_private *i915,
>  
>  		max_data_rate = i915->display.bw.max[idx].deratedbw[i];
>  
> -		/*
> -		 * We need to know which qgv point gives us
> -		 * maximum bandwidth in order to disable SAGV
> -		 * if we find that we exceed SAGV block time
> -		 * with watermarks. By that moment we already
> -		 * have those, as it is calculated earlier in
> -		 * intel_atomic_check,
> -		 */
> -		if (max_data_rate > max_bw) {
> -			max_bw_point = i;
> -			max_bw = max_data_rate;
> -		}
>  		if (max_data_rate >= data_rate)
>  			qgv_points |= BIT(i);
>  
> @@ -964,9 +1008,13 @@ static int icl_find_qgv_points(struct drm_i915_private *i915,
>  	 * cause.
>  	 */
>  	if (!intel_can_enable_sagv(i915, new_bw_state)) {
> -		qgv_points = BIT(max_bw_point);
> -		drm_dbg_kms(&i915->drm, "No SAGV, using single QGV point %d\n",
> -			    max_bw_point);
> +		unsigned int max_bw_qgv_point = icl_max_bw_qgv_point(i915, num_active_planes);
> +		unsigned int max_bw_psf_gv_point = icl_max_bw_psf_gv_point(i915);
> +
> +		qgv_points = BIT(max_bw_qgv_point);
> +		psf_points = BIT(max_bw_psf_gv_point);

We didn't restrict the PSF here previously.

> +		drm_dbg_kms(&i915->drm, "No SAGV, using single QGV point %d PSF GV point %d\n",
> +			    max_bw_qgv_point, max_bw_psf_gv_point);
>  	}
>  
>  	/*
> -- 
> 2.37.3

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2024-01-12 17:35 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-28  8:37 [Intel-gfx] [PATCH 0/3] QGV/SAGV related fixes Stanislav Lisovskiy
2023-11-28  8:37 ` [Intel-gfx] [PATCH 1/3] drm/i915: Add meaningful traces for QGV point info error handling Stanislav Lisovskiy
2023-11-28 12:53   ` Gustavo Sousa
2023-11-28  8:37 ` [Intel-gfx] [PATCH 2/3] drm/i915: Extract code required to calculate max qgv/psf gv point Stanislav Lisovskiy
2024-01-12 17:35   ` Ville Syrjälä [this message]
2024-01-17 10:12     ` Lisovskiy, Stanislav
2024-01-17 11:12       ` Ville Syrjälä
2024-01-17 11:23         ` Lisovskiy, Stanislav
2023-11-28  8:37 ` [Intel-gfx] [PATCH 3/3] drm/i915: Disable SAGV on bw init, to force QGV point recalculation Stanislav Lisovskiy
2023-11-29  9:21   ` Stanislav Lisovskiy
2023-12-01 14:35     ` Stanislav Lisovskiy
2023-11-28  9:20 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for QGV/SAGV related fixes Patchwork
2023-11-28  9:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-28  9:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-11-29 14:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for QGV/SAGV related fixes (rev2) Patchwork
2023-11-29 14:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-11-29 14:21 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-12-02  1:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for QGV/SAGV related fixes (rev3) Patchwork
2023-12-02  1:47 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2024-01-17 15:57 [PATCH 0/3] QGV/SAGV related fixes Stanislav Lisovskiy
2024-01-17 15:57 ` [PATCH 2/3] drm/i915: Extract code required to calculate max qgv/psf gv point Stanislav Lisovskiy
2024-01-18  8:24   ` Ville Syrjälä
2024-02-19  9:18 [PATCH 0/3] QGV/SAGV related fixes Stanislav Lisovskiy
2024-02-19  9:18 ` [PATCH 2/3] drm/i915: Extract code required to calculate max qgv/psf gv point Stanislav Lisovskiy
2024-02-20  9:31 [PATCH 0/3] QGV/SAGV related fixes Stanislav Lisovskiy
2024-02-20  9:31 ` [PATCH 2/3] drm/i915: Extract code required to calculate max qgv/psf gv point Stanislav Lisovskiy
2024-03-20 22:07   ` Govindapillai, Vinod

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