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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Alan Previn Teres Alexis <alan.previn.teres.alexis@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Subject: [Intel-gfx] [PATCH 1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile
Date: Fri,  1 Dec 2023 12:21:08 +0000	[thread overview]
Message-ID: <20231201122109.729006-1-tvrtko.ursulin@linux.intel.com> (raw)

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Engine->id namespace is per-tile so struct igt_live_test->reset_engine[]
needs to be two-dimensional so engine reset counts from all tiles can be
stored with no aliasing. With aliasing, if we had a real multi-tile
platform, the reset counts would be incorrect for same engine instance on
different tiles.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Fixes: 0c29efa23f5c ("drm/i915/selftests: Consider multi-gt instead of to_gt()")
Reported-by: Alan Previn Teres Alexis <alan.previn.teres.alexis@intel.com>
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Andi Shyti <andi.shyti@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/i915/selftests/igt_live_test.c | 9 +++++----
 drivers/gpu/drm/i915/selftests/igt_live_test.h | 3 ++-
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.c b/drivers/gpu/drm/i915/selftests/igt_live_test.c
index 4ddc6d902752..7d41874a49c5 100644
--- a/drivers/gpu/drm/i915/selftests/igt_live_test.c
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.c
@@ -37,8 +37,9 @@ int igt_live_test_begin(struct igt_live_test *t,
 		}
 
 		for_each_engine(engine, gt, id)
-			t->reset_engine[id] =
-			i915_reset_engine_count(&i915->gpu_error, engine);
+			t->reset_engine[i][id] =
+				i915_reset_engine_count(&i915->gpu_error,
+							engine);
 	}
 
 	t->reset_global = i915_reset_count(&i915->gpu_error);
@@ -66,14 +67,14 @@ int igt_live_test_end(struct igt_live_test *t)
 
 	for_each_gt(gt, i915, i) {
 		for_each_engine(engine, gt, id) {
-			if (t->reset_engine[id] ==
+			if (t->reset_engine[i][id] ==
 			    i915_reset_engine_count(&i915->gpu_error, engine))
 				continue;
 
 			gt_err(gt, "%s(%s): engine '%s' was reset %d times!\n",
 			       t->func, t->name, engine->name,
 			       i915_reset_engine_count(&i915->gpu_error, engine) -
-			       t->reset_engine[id]);
+			       t->reset_engine[i][id]);
 			return -EIO;
 		}
 	}
diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h b/drivers/gpu/drm/i915/selftests/igt_live_test.h
index 36ed42736c52..83e3ad430922 100644
--- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
@@ -7,6 +7,7 @@
 #ifndef IGT_LIVE_TEST_H
 #define IGT_LIVE_TEST_H
 
+#include "gt/intel_gt_defines.h" /* for I915_MAX_GT */
 #include "gt/intel_engine.h" /* for I915_NUM_ENGINES */
 
 struct drm_i915_private;
@@ -17,7 +18,7 @@ struct igt_live_test {
 	const char *name;
 
 	unsigned int reset_global;
-	unsigned int reset_engine[I915_NUM_ENGINES];
+	unsigned int reset_engine[I915_MAX_GT][I915_NUM_ENGINES];
 };
 
 /*
-- 
2.40.1


             reply	other threads:[~2023-12-01 12:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-01 12:21 Tvrtko Ursulin [this message]
2023-12-01 12:21 ` [Intel-gfx] [PATCH 2/2] drm/i915: Use internal class when counting engine resets Tvrtko Ursulin
2023-12-06  0:52   ` Daniele Ceraolo Spurio
2023-12-07 11:12     ` Tvrtko Ursulin
2023-12-01 23:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile Patchwork
2023-12-01 23:08 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-12-01 23:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-12-03  4:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-12-04 19:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile (rev2) Patchwork
2023-12-04 19:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-12-04 20:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-12-05  1:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-12-07 11:26 ` [PATCH 1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile Andi Shyti
2023-12-07 11:43   ` Tvrtko Ursulin
2023-12-07 11:46     ` Andi Shyti
2023-12-07 13:45       ` Tvrtko Ursulin

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