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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 03/21] drm/i915/dp: Move link train fallback to intel_dp_link_training.c
Date: Mon, 20 May 2024 21:58:01 +0300	[thread overview]
Message-ID: <20240520185822.3725844-4-imre.deak@intel.com> (raw)
In-Reply-To: <20240520185822.3725844-1-imre.deak@intel.com>

Move the functions used to reduce the link parameters during link
training to intel_dp_link_training.c .

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c       | 76 +------------------
 drivers/gpu/drm/i915/display/intel_dp.h       |  4 +-
 .../drm/i915/display/intel_dp_link_training.c | 73 ++++++++++++++++++
 3 files changed, 77 insertions(+), 76 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ceedd3ef41946..81e620dd33bb7 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -329,7 +329,7 @@ static int intel_dp_common_len_rate_limit(const struct intel_dp *intel_dp,
 				       intel_dp->num_common_rates, max_rate);
 }
 
-static int intel_dp_common_rate(struct intel_dp *intel_dp, int index)
+int intel_dp_common_rate(struct intel_dp *intel_dp, int index)
 {
 	if (drm_WARN_ON(&dp_to_i915(intel_dp)->drm,
 			index < 0 || index >= intel_dp->num_common_rates))
@@ -604,7 +604,7 @@ static int intersect_rates(const int *source_rates, int source_len,
 }
 
 /* return index of rate in rates array, or -1 if not found */
-static int intel_dp_rate_index(const int *rates, int len, int rate)
+int intel_dp_rate_index(const int *rates, int len, int rate)
 {
 	int i;
 
@@ -654,78 +654,6 @@ static bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
 	return true;
 }
 
-static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,
-						     int link_rate,
-						     u8 lane_count)
-{
-	/* FIXME figure out what we actually want here */
-	const struct drm_display_mode *fixed_mode =
-		intel_panel_preferred_fixed_mode(intel_dp->attached_connector);
-	int mode_rate, max_rate;
-
-	mode_rate = intel_dp_link_required(fixed_mode->clock, 18);
-	max_rate = intel_dp_max_link_data_rate(intel_dp, link_rate, lane_count);
-	if (mode_rate > max_rate)
-		return false;
-
-	return true;
-}
-
-int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
-					    int link_rate, u8 lane_count)
-{
-	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-	int index;
-
-	/*
-	 * TODO: Enable fallback on MST links once MST link compute can handle
-	 * the fallback params.
-	 */
-	if (intel_dp->is_mst) {
-		drm_err(&i915->drm, "Link Training Unsuccessful\n");
-		return -1;
-	}
-
-	if (intel_dp_is_edp(intel_dp) && !intel_dp->use_max_params) {
-		drm_dbg_kms(&i915->drm,
-			    "Retrying Link training for eDP with max parameters\n");
-		intel_dp->use_max_params = true;
-		return 0;
-	}
-
-	index = intel_dp_rate_index(intel_dp->common_rates,
-				    intel_dp->num_common_rates,
-				    link_rate);
-	if (index > 0) {
-		if (intel_dp_is_edp(intel_dp) &&
-		    !intel_dp_can_link_train_fallback_for_edp(intel_dp,
-							      intel_dp_common_rate(intel_dp, index - 1),
-							      lane_count)) {
-			drm_dbg_kms(&i915->drm,
-				    "Retrying Link training for eDP with same parameters\n");
-			return 0;
-		}
-		intel_dp->link.max_rate = intel_dp_common_rate(intel_dp, index - 1);
-		intel_dp->link.max_lane_count = lane_count;
-	} else if (lane_count > 1) {
-		if (intel_dp_is_edp(intel_dp) &&
-		    !intel_dp_can_link_train_fallback_for_edp(intel_dp,
-							      intel_dp_max_common_rate(intel_dp),
-							      lane_count >> 1)) {
-			drm_dbg_kms(&i915->drm,
-				    "Retrying Link training for eDP with same parameters\n");
-			return 0;
-		}
-		intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
-		intel_dp->link.max_lane_count = lane_count >> 1;
-	} else {
-		drm_err(&i915->drm, "Link Training Unsuccessful\n");
-		return -1;
-	}
-
-	return 0;
-}
-
 u32 intel_dp_mode_to_fec_clock(u32 mode_clock)
 {
 	return div_u64(mul_u32_u32(mode_clock, DP_DSC_FEC_OVERHEAD_FACTOR),
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index aad2223df2a35..e7b47e7bcd98b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -55,8 +55,6 @@ void intel_dp_connector_sync_state(struct intel_connector *connector,
 				   const struct intel_crtc_state *crtc_state);
 void intel_dp_set_link_params(struct intel_dp *intel_dp,
 			      int link_rate, int lane_count);
-int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
-					    int link_rate, u8 lane_count);
 int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
 			      struct drm_modeset_acquire_ctx *ctx,
 			      u8 *pipe_mask);
@@ -107,6 +105,8 @@ int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state);
 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
 int intel_dp_max_common_rate(struct intel_dp *intel_dp);
 int intel_dp_max_common_lane_count(struct intel_dp *intel_dp);
+int intel_dp_common_rate(struct intel_dp *intel_dp, int index);
+int intel_dp_rate_index(const int *rates, int len, int rate);
 void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
 
 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 947575140059d..4db293f256896 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -25,6 +25,7 @@
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_dp_link_training.h"
+#include "intel_panel.h"
 
 #define LT_MSG_PREFIX			"[CONNECTOR:%d:%s][ENCODER:%d:%s][%s] "
 #define LT_MSG_ARGS(_intel_dp, _dp_phy)	(_intel_dp)->attached_connector->base.base.id, \
@@ -1091,6 +1092,78 @@ intel_dp_link_train_phy(struct intel_dp *intel_dp,
 	return ret;
 }
 
+static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,
+						     int link_rate,
+						     u8 lane_count)
+{
+	/* FIXME figure out what we actually want here */
+	const struct drm_display_mode *fixed_mode =
+		intel_panel_preferred_fixed_mode(intel_dp->attached_connector);
+	int mode_rate, max_rate;
+
+	mode_rate = intel_dp_link_required(fixed_mode->clock, 18);
+	max_rate = intel_dp_max_link_data_rate(intel_dp, link_rate, lane_count);
+	if (mode_rate > max_rate)
+		return false;
+
+	return true;
+}
+
+static int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
+						   int link_rate, u8 lane_count)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	int index;
+
+	/*
+	 * TODO: Enable fallback on MST links once MST link compute can handle
+	 * the fallback params.
+	 */
+	if (intel_dp->is_mst) {
+		drm_err(&i915->drm, "Link Training Unsuccessful\n");
+		return -1;
+	}
+
+	if (intel_dp_is_edp(intel_dp) && !intel_dp->use_max_params) {
+		drm_dbg_kms(&i915->drm,
+			    "Retrying Link training for eDP with max parameters\n");
+		intel_dp->use_max_params = true;
+		return 0;
+	}
+
+	index = intel_dp_rate_index(intel_dp->common_rates,
+				    intel_dp->num_common_rates,
+				    link_rate);
+	if (index > 0) {
+		if (intel_dp_is_edp(intel_dp) &&
+		    !intel_dp_can_link_train_fallback_for_edp(intel_dp,
+							      intel_dp_common_rate(intel_dp, index - 1),
+							      lane_count)) {
+			drm_dbg_kms(&i915->drm,
+				    "Retrying Link training for eDP with same parameters\n");
+			return 0;
+		}
+		intel_dp->link.max_rate = intel_dp_common_rate(intel_dp, index - 1);
+		intel_dp->link.max_lane_count = lane_count;
+	} else if (lane_count > 1) {
+		if (intel_dp_is_edp(intel_dp) &&
+		    !intel_dp_can_link_train_fallback_for_edp(intel_dp,
+							      intel_dp_max_common_rate(intel_dp),
+							      lane_count >> 1)) {
+			drm_dbg_kms(&i915->drm,
+				    "Retrying Link training for eDP with same parameters\n");
+			return 0;
+		}
+		intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
+		intel_dp->link.max_lane_count = lane_count >> 1;
+	} else {
+		drm_err(&i915->drm, "Link Training Unsuccessful\n");
+		return -1;
+	}
+
+	return 0;
+}
+
 static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
 						     const struct intel_crtc_state *crtc_state)
 {
-- 
2.43.3


  parent reply	other threads:[~2024-05-20 18:58 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-20 18:57 [PATCH v2 00/21] drm/i915/dp_mst: Enable link training fallback Imre Deak
2024-05-20 18:57 ` [PATCH v2 01/21] drm/i915/dp_mst: Align TUs to avoid splitting symbols across MTPs Imre Deak
2024-05-22 18:22   ` Ville Syrjälä
2024-05-20 18:58 ` [PATCH v2 02/21] drm/i915/dp: Move link train params to a substruct in intel_dp Imre Deak
2024-05-20 18:58 ` Imre Deak [this message]
2024-05-22 18:23   ` [PATCH v2 03/21] drm/i915/dp: Move link train fallback to intel_dp_link_training.c Ville Syrjälä
2024-06-10 16:13     ` Manasi Navare
2024-05-20 18:58 ` [PATCH v2 04/21] drm/i915/dp: Sanitize intel_dp_get_link_train_fallback_values() Imre Deak
2024-05-22 18:23   ` Ville Syrjälä
2024-05-22 18:45     ` Imre Deak
2024-05-23 15:48     ` Jani Nikula
2024-05-20 18:58 ` [PATCH v2 05/21] drm/i915: Factor out function to modeset commit a set of pipes Imre Deak
2024-05-22 18:23   ` Ville Syrjälä
2024-05-20 18:58 ` [PATCH v2 06/21] drm/i915/dp: Use a commit modeset for link retraining MST links Imre Deak
2024-05-23 12:58   ` Ville Syrjälä
2024-05-23 13:26     ` Imre Deak
2024-05-20 18:58 ` [PATCH v2 07/21] drm/i915/dp: Recheck link state after modeset Imre Deak
2024-05-22 13:38   ` Imre Deak
2024-05-23 13:23     ` Ville Syrjälä
2024-05-23 13:27       ` Ville Syrjälä
2024-05-23 13:30   ` Ville Syrjälä
2024-05-23 13:46     ` Imre Deak
2024-05-23 13:58       ` Ville Syrjälä
2024-05-23 14:12         ` Imre Deak
2024-05-20 18:58 ` [PATCH v2 08/21] drm/i915/dp: Reduce link params only after retrying with unchanged params Imre Deak
2024-05-20 18:58 ` [PATCH v2 09/21] drm/i915/dp: Pass atomic state to link training function Imre Deak
2024-05-23 14:41   ` Ville Syrjälä
2024-05-23 14:47     ` Imre Deak
2024-05-23 14:54       ` Ville Syrjälä
2024-05-23 14:58         ` Imre Deak
2024-05-23 15:05         ` Ville Syrjälä
2024-05-20 18:58 ` [PATCH v2 10/21] drm/i915/dp: Send a link training modeset-retry uevent to all MST connectors Imre Deak
2024-05-20 18:58 ` [PATCH v2 11/21] drm/i915/dp: Use check link state work in the hotplug handler Imre Deak
2024-05-20 18:58 ` [PATCH v2 12/21] drm/i915/dp: Use check link state work in the detect handler Imre Deak
2024-05-23 15:08   ` Ville Syrjälä
2024-05-23 15:29     ` Imre Deak
2024-05-23 15:43       ` Ville Syrjälä
2024-05-23 15:54         ` Imre Deak
2024-05-27  5:14   ` gareth.yu
2024-05-27 11:30     ` Imre Deak
2024-05-28  5:33       ` Yu, Gareth
2024-05-20 18:58 ` [PATCH v2 13/21] drm/i915/dp: Use check link state work in the HPD IRQ handler Imre Deak
2024-05-20 18:58 ` [PATCH v2 14/21] drm/i915/dp: Disable link retraining after the last fallback step Imre Deak
2024-05-23 15:28   ` Ville Syrjälä
2024-05-23 16:36     ` Imre Deak
2024-05-20 18:58 ` [PATCH v2 15/21] drm/i915/dp_mst: Reset intel_dp->link_trained during disabling Imre Deak
2024-05-20 18:58 ` [PATCH v2 16/21] drm/i915/dp_mst: Enable link training fallback for MST Imre Deak
2024-05-20 18:58 ` [PATCH v2 17/21] drm/i915/dp: Add debugfs entries to set a target link rate/lane count Imre Deak
2024-05-23 15:25   ` Ville Syrjälä
2024-05-23 16:15     ` Imre Deak
2024-05-20 18:58 ` [PATCH v2 18/21] drm/i915/dp: Add debugfs entries to get the max " Imre Deak
2024-05-20 18:58 ` [PATCH v2 19/21] drm/i915/dp: Add debugfs entry to force link training failure Imre Deak
2024-05-23 15:29   ` Ville Syrjälä
2024-05-23 16:32     ` Imre Deak
2024-05-20 18:58 ` [PATCH v2 20/21] drm/i915/dp: Add debugfs entry to force link retrain Imre Deak
2024-05-20 18:58 ` [PATCH v2 21/21] drm/i915/dp: Add debugfs entry for link training info Imre Deak
2024-05-20 19:30 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dp_mst: Enable link training fallback (rev3) Patchwork
2024-05-20 19:30 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-05-20 19:41 ` ✓ Fi.CI.BAT: success " Patchwork
2024-05-21  5:58 ` ✗ Fi.CI.IGT: failure " Patchwork
2024-05-22  4:20 ` ✓ Fi.CI.IGT: success " Patchwork

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