From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 5/7] drm/i915: Move intel_crtc_scanline_offset()
Date: Tue, 28 May 2024 21:56:45 +0300 [thread overview]
Message-ID: <20240528185647.7765-6-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20240528185647.7765-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
I want to use intel_crtc_scanline_offset() in
intel_crtc_scanline_to_hw(). Relocate intel_crtc_scanline_offset()
a bit to avoid a forward declaration.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_vblank.c | 76 ++++++++++-----------
1 file changed, 38 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index b0e95a4c680d..eb80952b0cfd 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -188,6 +188,44 @@ static u32 __intel_get_crtc_scanline_from_timestamp(struct intel_crtc *crtc)
return scanline;
}
+static int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+
+ /*
+ * The scanline counter increments at the leading edge of hsync.
+ *
+ * On most platforms it starts counting from vtotal-1 on the
+ * first active line. That means the scanline counter value is
+ * always one less than what we would expect. Ie. just after
+ * start of vblank, which also occurs at start of hsync (on the
+ * last active line), the scanline counter will read vblank_start-1.
+ *
+ * On gen2 the scanline counter starts counting from 1 instead
+ * of vtotal-1, so we have to subtract one.
+ *
+ * On HSW+ the behaviour of the scanline counter depends on the output
+ * type. For DP ports it behaves like most other platforms, but on HDMI
+ * there's an extra 1 line difference. So we need to add two instead of
+ * one to the value.
+ *
+ * On VLV/CHV DSI the scanline counter would appear to increment
+ * approx. 1/3 of a scanline before start of vblank. Unfortunately
+ * that means we can't tell whether we're in vblank or not while
+ * we're on that particular line. We must still set scanline_offset
+ * to 1 so that the vblank timestamps come out correct when we query
+ * the scanline counter from within the vblank interrupt handler.
+ * However if queried just before the start of vblank we'll get an
+ * answer that's slightly in the future.
+ */
+ if (DISPLAY_VER(i915) == 2)
+ return -1;
+ else if (HAS_DDI(i915) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
+ return 2;
+ else
+ return 1;
+}
+
/*
* intel_de_read_fw(), only for fast reads of display block, no need for
* forcewake etc.
@@ -467,44 +505,6 @@ void intel_wait_for_pipe_scanline_moving(struct intel_crtc *crtc)
wait_for_pipe_scanline_moving(crtc, true);
}
-static int intel_crtc_scanline_offset(const struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
-
- /*
- * The scanline counter increments at the leading edge of hsync.
- *
- * On most platforms it starts counting from vtotal-1 on the
- * first active line. That means the scanline counter value is
- * always one less than what we would expect. Ie. just after
- * start of vblank, which also occurs at start of hsync (on the
- * last active line), the scanline counter will read vblank_start-1.
- *
- * On gen2 the scanline counter starts counting from 1 instead
- * of vtotal-1, so we have to subtract one.
- *
- * On HSW+ the behaviour of the scanline counter depends on the output
- * type. For DP ports it behaves like most other platforms, but on HDMI
- * there's an extra 1 line difference. So we need to add two instead of
- * one to the value.
- *
- * On VLV/CHV DSI the scanline counter would appear to increment
- * approx. 1/3 of a scanline before start of vblank. Unfortunately
- * that means we can't tell whether we're in vblank or not while
- * we're on that particular line. We must still set scanline_offset
- * to 1 so that the vblank timestamps come out correct when we query
- * the scanline counter from within the vblank interrupt handler.
- * However if queried just before the start of vblank we'll get an
- * answer that's slightly in the future.
- */
- if (DISPLAY_VER(i915) == 2)
- return -1;
- else if (HAS_DDI(i915) && intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- return 2;
- else
- return 1;
-}
-
void intel_crtc_update_active_timings(const struct intel_crtc_state *crtc_state,
bool vrr_enable)
{
--
2.44.1
next prev parent reply other threads:[~2024-05-28 18:57 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-28 18:56 [PATCH 0/7] drm/i915: Cleanups around scanline arithmetic Ville Syrjala
2024-05-28 18:56 ` [PATCH 1/7] drm/i915: Reuse intel_mode_vblank_start() Ville Syrjala
2024-05-29 9:03 ` Jani Nikula
2024-05-28 18:56 ` [PATCH 2/7] drm/i915: Extract intel_mode_vblank_end() Ville Syrjala
2024-05-29 9:05 ` Jani Nikula
2024-05-28 18:56 ` [PATCH 3/7] drm/i915: Extract intel_mode_vtotal() Ville Syrjala
2024-05-29 9:06 ` Jani Nikula
2024-05-28 18:56 ` [PATCH 4/7] drm/i915: Simplify scanline_offset handling for gen2 Ville Syrjala
2024-05-29 9:20 ` Jani Nikula
2024-05-28 18:56 ` Ville Syrjala [this message]
2024-05-29 9:22 ` [PATCH 5/7] drm/i915: Move intel_crtc_scanline_offset() Jani Nikula
2024-05-28 18:56 ` [PATCH 6/7] drm/i915: Switch intel_usecs_to_scanlines() to 64bit maths Ville Syrjala
2024-05-29 9:22 ` Jani Nikula
2024-05-28 18:56 ` [PATCH 7/7] drm/i915/dsb: Convert dewake_scanline to a hw scanline number earlier Ville Syrjala
2024-05-29 9:32 ` Jani Nikula
2024-05-28 20:01 ` ✓ Fi.CI.BAT: success for drm/i915: Cleanups around scanline arithmetic Patchwork
2024-05-29 14:15 ` ✓ Fi.CI.IGT: " Patchwork
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